if_rtw_cardbus.c revision 1.35
1 /* $NetBSD: if_rtw_cardbus.c,v 1.35 2010/02/24 22:37:57 dyoung Exp $ */ 2 3 /*- 4 * Copyright (c) 2004, 2005 David Young. All rights reserved. 5 * 6 * Adapted for the RTL8180 by David Young. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY David Young ``AS IS'' AND ANY 18 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 19 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A 20 * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL David 21 * Young BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 22 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 23 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 25 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 28 * OF SUCH DAMAGE. 29 */ 30 /*- 31 * Copyright (c) 1999, 2000 The NetBSD Foundation, Inc. 32 * All rights reserved. 33 * 34 * This code is derived from software contributed to The NetBSD Foundation 35 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 36 * NASA Ames Research Center. 37 * 38 * Redistribution and use in source and binary forms, with or without 39 * modification, are permitted provided that the following conditions 40 * are met: 41 * 1. Redistributions of source code must retain the above copyright 42 * notice, this list of conditions and the following disclaimer. 43 * 2. Redistributions in binary form must reproduce the above copyright 44 * notice, this list of conditions and the following disclaimer in the 45 * documentation and/or other materials provided with the distribution. 46 * 47 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 48 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 49 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 50 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 51 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 52 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 53 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 54 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 55 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 56 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 57 * POSSIBILITY OF SUCH DAMAGE. 58 */ 59 60 /* 61 * Cardbus front-end for the Realtek RTL8180 802.11 MAC/BBP driver. 62 * 63 * TBD factor with atw, tlp Cardbus front-ends? 64 */ 65 66 #include <sys/cdefs.h> 67 __KERNEL_RCSID(0, "$NetBSD: if_rtw_cardbus.c,v 1.35 2010/02/24 22:37:57 dyoung Exp $"); 68 69 #include "opt_inet.h" 70 71 #include <sys/param.h> 72 #include <sys/systm.h> 73 #include <sys/mbuf.h> 74 #include <sys/malloc.h> 75 #include <sys/kernel.h> 76 #include <sys/socket.h> 77 #include <sys/ioctl.h> 78 #include <sys/errno.h> 79 #include <sys/device.h> 80 81 #include <machine/endian.h> 82 83 #include <net/if.h> 84 #include <net/if_dl.h> 85 #include <net/if_media.h> 86 #include <net/if_ether.h> 87 88 #include <net80211/ieee80211_netbsd.h> 89 #include <net80211/ieee80211_radiotap.h> 90 #include <net80211/ieee80211_var.h> 91 92 #ifdef INET 93 #include <netinet/in.h> 94 #include <netinet/if_inarp.h> 95 #endif 96 97 98 #include <sys/bus.h> 99 #include <sys/intr.h> 100 101 #include <dev/ic/rtwreg.h> 102 #include <dev/ic/rtwvar.h> 103 104 #include <dev/pci/pcivar.h> 105 #include <dev/pci/pcireg.h> 106 #include <dev/pci/pcidevs.h> 107 108 #include <dev/cardbus/cardbusvar.h> 109 #include <dev/pci/pcidevs.h> 110 111 /* 112 * PCI configuration space registers used by the RTL8180. 113 */ 114 #define RTW_PCI_IOBA 0x10 /* i/o mapped base */ 115 #define RTW_PCI_MMBA 0x14 /* memory mapped base */ 116 117 struct rtw_cardbus_softc { 118 struct rtw_softc sc_rtw; /* real RTL8180 softc */ 119 120 /* CardBus-specific goo. */ 121 void *sc_ih; /* interrupt handle */ 122 cardbus_devfunc_t sc_ct; /* our CardBus devfuncs */ 123 cardbustag_t sc_tag; /* our CardBus tag */ 124 int sc_csr; /* CSR bits */ 125 bus_size_t sc_mapsize; /* size of the mapped bus space 126 * region 127 */ 128 129 int sc_bar_reg; /* which BAR to use */ 130 pcireg_t sc_bar_val; /* value of the BAR */ 131 132 cardbus_intr_line_t sc_intrline; /* interrupt line */ 133 }; 134 135 int rtw_cardbus_match(device_t, cfdata_t, void *); 136 void rtw_cardbus_attach(device_t, device_t, void *); 137 int rtw_cardbus_detach(device_t, int); 138 139 CFATTACH_DECL_NEW(rtw_cardbus, sizeof(struct rtw_cardbus_softc), 140 rtw_cardbus_match, rtw_cardbus_attach, rtw_cardbus_detach, NULL); 141 142 void rtw_cardbus_setup(struct rtw_cardbus_softc *); 143 144 bool rtw_cardbus_resume(device_t, const pmf_qual_t *); 145 bool rtw_cardbus_suspend(device_t, const pmf_qual_t *); 146 147 const struct rtw_cardbus_product *rtw_cardbus_lookup( 148 const struct cardbus_attach_args *); 149 150 const struct rtw_cardbus_product { 151 u_int32_t rcp_vendor; /* PCI vendor ID */ 152 u_int32_t rcp_product; /* PCI product ID */ 153 const char *rcp_product_name; 154 } rtw_cardbus_products[] = { 155 { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8180, 156 "Realtek RTL8180 802.11 MAC/BBP" }, 157 158 { PCI_VENDOR_BELKIN, PCI_PRODUCT_BELKIN_F5D6020V3, 159 "Belkin F5D6020v3 802.11b (RTL8180 MAC/BBP)" }, 160 161 { PCI_VENDOR_DLINK, PCI_PRODUCT_DLINK_DWL610, 162 "DWL-610 D-Link Air 802.11b (RTL8180 MAC/BBP)" }, 163 164 { 0, 0, NULL }, 165 }; 166 167 const struct rtw_cardbus_product * 168 rtw_cardbus_lookup(const struct cardbus_attach_args *ca) 169 { 170 const struct rtw_cardbus_product *rcp; 171 172 for (rcp = rtw_cardbus_products; rcp->rcp_product_name != NULL; rcp++) { 173 if (PCI_VENDOR(ca->ca_id) == rcp->rcp_vendor && 174 PCI_PRODUCT(ca->ca_id) == rcp->rcp_product) 175 return rcp; 176 } 177 return NULL; 178 } 179 180 int 181 rtw_cardbus_match(device_t parent, cfdata_t match, void *aux) 182 { 183 struct cardbus_attach_args *ca = aux; 184 185 if (rtw_cardbus_lookup(ca) != NULL) 186 return 1; 187 188 return 0; 189 } 190 191 static void 192 rtw_cardbus_funcregen(struct rtw_regs *regs, int enable) 193 { 194 u_int32_t reg; 195 rtw_config0123_enable(regs, 1); 196 reg = RTW_READ(regs, RTW_CONFIG3); 197 if (enable) 198 RTW_WRITE(regs, RTW_CONFIG3, reg | RTW_CONFIG3_FUNCREGEN); 199 else 200 RTW_WRITE(regs, RTW_CONFIG3, reg & ~RTW_CONFIG3_FUNCREGEN); 201 rtw_config0123_enable(regs, 0); 202 } 203 204 void 205 rtw_cardbus_attach(device_t parent, device_t self, void *aux) 206 { 207 struct rtw_cardbus_softc *csc = device_private(self); 208 struct rtw_softc *sc = &csc->sc_rtw; 209 struct rtw_regs *regs = &sc->sc_regs; 210 struct cardbus_attach_args *ca = aux; 211 cardbus_devfunc_t ct = ca->ca_ct; 212 const struct rtw_cardbus_product *rcp; 213 bus_addr_t adr; 214 int rev; 215 216 sc->sc_dev = self; 217 sc->sc_dmat = ca->ca_dmat; 218 csc->sc_ct = ct; 219 csc->sc_tag = ca->ca_tag; 220 221 rcp = rtw_cardbus_lookup(ca); 222 if (rcp == NULL) { 223 printf("\n"); 224 panic("rtw_cardbus_attach: impossible"); 225 } 226 227 /* Get revision info. */ 228 rev = PCI_REVISION(ca->ca_class); 229 230 printf(": %s\n", rcp->rcp_product_name); 231 232 RTW_DPRINTF(RTW_DEBUG_ATTACH, 233 ("%s: pass %d.%d signature %08x\n", device_xname(self), 234 (rev >> 4) & 0xf, rev & 0xf, 235 cardbus_conf_read(ct->ct_cc, ct->ct_cf, csc->sc_tag, 0x80))); 236 237 /* 238 * Map the device. 239 */ 240 csc->sc_csr = CARDBUS_COMMAND_MASTER_ENABLE | 241 CARDBUS_COMMAND_PARITY_ENABLE | 242 CARDBUS_COMMAND_SERR_ENABLE; 243 if (Cardbus_mapreg_map(ct, RTW_PCI_MMBA, CARDBUS_MAPREG_TYPE_MEM, 0, 244 ®s->r_bt, ®s->r_bh, &adr, ®s->r_sz) == 0) { 245 RTW_DPRINTF(RTW_DEBUG_ATTACH, 246 ("%s: %s mapped %" PRIuMAX " bytes mem space\n", 247 device_xname(self), __func__, (uintmax_t)regs->r_sz)); 248 #if rbus 249 #else 250 (*ct->ct_cf->cardbus_mem_open)(cc, 0, adr, adr+csc->sc_mapsize); 251 #endif 252 csc->sc_csr |= CARDBUS_COMMAND_MEM_ENABLE; 253 csc->sc_bar_reg = RTW_PCI_MMBA; 254 csc->sc_bar_val = adr | CARDBUS_MAPREG_TYPE_MEM; 255 } else if (Cardbus_mapreg_map(ct, RTW_PCI_IOBA, CARDBUS_MAPREG_TYPE_IO, 256 0, ®s->r_bt, ®s->r_bh, &adr, ®s->r_sz) == 0) { 257 RTW_DPRINTF(RTW_DEBUG_ATTACH, 258 ("%s: %s mapped %" PRIuMAX " bytes I/O space\n", 259 device_xname(self), __func__, (uintmax_t)regs->r_sz)); 260 #if rbus 261 #else 262 (*ct->ct_cf->cardbus_io_open)(cc, 0, adr, adr+csc->sc_mapsize); 263 #endif 264 csc->sc_csr |= CARDBUS_COMMAND_IO_ENABLE; 265 csc->sc_bar_reg = RTW_PCI_IOBA; 266 csc->sc_bar_val = adr | CARDBUS_MAPREG_TYPE_IO; 267 } else { 268 aprint_error_dev(self, "unable to map device registers\n"); 269 return; 270 } 271 272 /* 273 * Bring the chip out of powersave mode and initialize the 274 * configuration registers. 275 */ 276 rtw_cardbus_setup(csc); 277 278 /* Remember which interrupt line. */ 279 csc->sc_intrline = ca->ca_intrline; 280 281 /* 282 * Finish off the attach. 283 */ 284 rtw_attach(sc); 285 286 rtw_cardbus_funcregen(regs, 1); 287 288 RTW_WRITE(regs, RTW_FEMR, 0); 289 RTW_WRITE(regs, RTW_FER, RTW_READ(regs, RTW_FER)); 290 291 if (pmf_device_register(self, 292 rtw_cardbus_suspend, rtw_cardbus_resume)) { 293 pmf_class_network_register(self, &sc->sc_if); 294 /* 295 * Power down the socket. 296 */ 297 pmf_device_suspend(self, &sc->sc_qual); 298 } else 299 aprint_error_dev(self, "couldn't establish power handler\n"); 300 } 301 302 int 303 rtw_cardbus_detach(device_t self, int flags) 304 { 305 struct rtw_cardbus_softc *csc = device_private(self); 306 struct rtw_softc *sc = &csc->sc_rtw; 307 struct rtw_regs *regs = &sc->sc_regs; 308 struct cardbus_devfunc *ct = csc->sc_ct; 309 int rc; 310 311 #if defined(DIAGNOSTIC) 312 if (ct == NULL) 313 panic("%s: data structure lacks", device_xname(self)); 314 #endif 315 316 if ((rc = rtw_detach(sc)) != 0) 317 return rc; 318 319 /* 320 * Unhook the interrupt handler. 321 */ 322 if (csc->sc_ih != NULL) 323 cardbus_intr_disestablish(ct->ct_cc, ct->ct_cf, csc->sc_ih); 324 325 /* 326 * Release bus space and close window. 327 */ 328 if (csc->sc_bar_reg != 0) 329 Cardbus_mapreg_unmap(ct, csc->sc_bar_reg, 330 regs->r_bt, regs->r_bh, regs->r_sz); 331 332 return 0; 333 } 334 335 bool 336 rtw_cardbus_resume(device_t self, const pmf_qual_t *qual) 337 { 338 struct rtw_cardbus_softc *csc = device_private(self); 339 struct rtw_softc *sc = &csc->sc_rtw; 340 cardbus_devfunc_t ct = csc->sc_ct; 341 cardbus_chipset_tag_t cc = ct->ct_cc; 342 cardbus_function_tag_t cf = ct->ct_cf; 343 344 /* 345 * Map and establish the interrupt. 346 */ 347 csc->sc_ih = cardbus_intr_establish(cc, cf, csc->sc_intrline, IPL_NET, 348 rtw_intr, sc); 349 if (csc->sc_ih == NULL) { 350 aprint_error_dev(sc->sc_dev, 351 "unable to establish interrupt\n"); 352 return false; 353 } 354 355 rtw_cardbus_funcregen(&sc->sc_regs, 1); 356 357 RTW_WRITE(&sc->sc_regs, RTW_FEMR, RTW_FEMR_INTR); 358 RTW_WRITE(&sc->sc_regs, RTW_FER, RTW_FER_INTR); 359 360 return rtw_resume(self, qual); 361 } 362 363 bool 364 rtw_cardbus_suspend(device_t self, const pmf_qual_t *qual) 365 { 366 struct rtw_cardbus_softc *csc = device_private(self); 367 struct rtw_softc *sc = &csc->sc_rtw; 368 cardbus_devfunc_t ct = csc->sc_ct; 369 cardbus_chipset_tag_t cc = ct->ct_cc; 370 cardbus_function_tag_t cf = ct->ct_cf; 371 372 if (!rtw_suspend(self, qual)) 373 return false; 374 375 RTW_WRITE(&sc->sc_regs, RTW_FEMR, 376 RTW_READ(&sc->sc_regs, RTW_FEMR) & ~RTW_FEMR_INTR); 377 378 rtw_cardbus_funcregen(&sc->sc_regs, 0); 379 380 /* Unhook the interrupt handler. */ 381 cardbus_intr_disestablish(cc, cf, csc->sc_ih); 382 csc->sc_ih = NULL; 383 return true; 384 } 385 386 void 387 rtw_cardbus_setup(struct rtw_cardbus_softc *csc) 388 { 389 cardbustag_t tag = csc->sc_tag; 390 cardbus_devfunc_t ct = csc->sc_ct; 391 cardbus_chipset_tag_t cc = ct->ct_cc; 392 cardbusreg_t bhlc, csr, lattimer; 393 cardbus_function_tag_t cf = ct->ct_cf; 394 395 (void)cardbus_set_powerstate(ct, tag, PCI_PWR_D0); 396 397 /* I believe the datasheet tries to warn us that the RTL8180 398 * wants for 16 (0x10) to divide the latency timer. 399 */ 400 bhlc = cardbus_conf_read(cc, cf, tag, CARDBUS_BHLC_REG); 401 lattimer = rounddown(PCI_LATTIMER(bhlc), 0x10); 402 if (PCI_LATTIMER(bhlc) != lattimer) { 403 bhlc &= ~(PCI_LATTIMER_MASK << PCI_LATTIMER_SHIFT); 404 bhlc |= (lattimer << PCI_LATTIMER_SHIFT); 405 cardbus_conf_write(cc, cf, tag, CARDBUS_BHLC_REG, bhlc); 406 } 407 408 /* Program the BAR. */ 409 cardbus_conf_write(cc, cf, tag, csc->sc_bar_reg, csc->sc_bar_val); 410 411 /* Enable the appropriate bits in the PCI CSR. */ 412 csr = cardbus_conf_read(cc, cf, tag, PCI_COMMAND_STATUS_REG); 413 csr &= ~(PCI_COMMAND_IO_ENABLE|PCI_COMMAND_MEM_ENABLE); 414 csr |= csc->sc_csr; 415 cardbus_conf_write(cc, cf, tag, PCI_COMMAND_STATUS_REG, csr); 416 } 417
Indexes created Tue Sep 30 06:09:59 GMT 2025