if_rtw_cardbus.c revision 1.38
1 /* $NetBSD: if_rtw_cardbus.c,v 1.38 2010/02/26 01:12:56 dyoung Exp $ */ 2 3 /*- 4 * Copyright (c) 2004, 2005 David Young. All rights reserved. 5 * 6 * Adapted for the RTL8180 by David Young. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY David Young ``AS IS'' AND ANY 18 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 19 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A 20 * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL David 21 * Young BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 22 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 23 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 25 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 28 * OF SUCH DAMAGE. 29 */ 30 /*- 31 * Copyright (c) 1999, 2000 The NetBSD Foundation, Inc. 32 * All rights reserved. 33 * 34 * This code is derived from software contributed to The NetBSD Foundation 35 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 36 * NASA Ames Research Center. 37 * 38 * Redistribution and use in source and binary forms, with or without 39 * modification, are permitted provided that the following conditions 40 * are met: 41 * 1. Redistributions of source code must retain the above copyright 42 * notice, this list of conditions and the following disclaimer. 43 * 2. Redistributions in binary form must reproduce the above copyright 44 * notice, this list of conditions and the following disclaimer in the 45 * documentation and/or other materials provided with the distribution. 46 * 47 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 48 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 49 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 50 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 51 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 52 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 53 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 54 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 55 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 56 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 57 * POSSIBILITY OF SUCH DAMAGE. 58 */ 59 60 /* 61 * Cardbus front-end for the Realtek RTL8180 802.11 MAC/BBP driver. 62 * 63 * TBD factor with atw, tlp Cardbus front-ends? 64 */ 65 66 #include <sys/cdefs.h> 67 __KERNEL_RCSID(0, "$NetBSD: if_rtw_cardbus.c,v 1.38 2010/02/26 01:12:56 dyoung Exp $"); 68 69 #include "opt_inet.h" 70 71 #include <sys/param.h> 72 #include <sys/systm.h> 73 #include <sys/mbuf.h> 74 #include <sys/malloc.h> 75 #include <sys/kernel.h> 76 #include <sys/socket.h> 77 #include <sys/ioctl.h> 78 #include <sys/errno.h> 79 #include <sys/device.h> 80 81 #include <machine/endian.h> 82 83 #include <net/if.h> 84 #include <net/if_dl.h> 85 #include <net/if_media.h> 86 #include <net/if_ether.h> 87 88 #include <net80211/ieee80211_netbsd.h> 89 #include <net80211/ieee80211_radiotap.h> 90 #include <net80211/ieee80211_var.h> 91 92 #ifdef INET 93 #include <netinet/in.h> 94 #include <netinet/if_inarp.h> 95 #endif 96 97 98 #include <sys/bus.h> 99 #include <sys/intr.h> 100 101 #include <dev/ic/rtwreg.h> 102 #include <dev/ic/rtwvar.h> 103 104 #include <dev/pci/pcivar.h> 105 #include <dev/pci/pcireg.h> 106 #include <dev/pci/pcidevs.h> 107 108 #include <dev/cardbus/cardbusvar.h> 109 #include <dev/pci/pcidevs.h> 110 111 /* 112 * PCI configuration space registers used by the RTL8180. 113 */ 114 #define RTW_PCI_IOBA 0x10 /* i/o mapped base */ 115 #define RTW_PCI_MMBA 0x14 /* memory mapped base */ 116 117 struct rtw_cardbus_softc { 118 struct rtw_softc sc_rtw; /* real RTL8180 softc */ 119 120 /* CardBus-specific goo. */ 121 void *sc_ih; /* interrupt handle */ 122 cardbus_devfunc_t sc_ct; /* our CardBus devfuncs */ 123 pcitag_t sc_tag; /* our CardBus tag */ 124 int sc_csr; /* CSR bits */ 125 bus_size_t sc_mapsize; /* size of the mapped bus space 126 * region 127 */ 128 129 int sc_bar_reg; /* which BAR to use */ 130 pcireg_t sc_bar_val; /* value of the BAR */ 131 132 cardbus_intr_line_t sc_intrline; /* interrupt line */ 133 }; 134 135 int rtw_cardbus_match(device_t, cfdata_t, void *); 136 void rtw_cardbus_attach(device_t, device_t, void *); 137 int rtw_cardbus_detach(device_t, int); 138 139 CFATTACH_DECL3_NEW(rtw_cardbus, sizeof(struct rtw_cardbus_softc), 140 rtw_cardbus_match, rtw_cardbus_attach, rtw_cardbus_detach, NULL, NULL, NULL, 141 DVF_DETACH_SHUTDOWN); 142 143 void rtw_cardbus_setup(struct rtw_cardbus_softc *); 144 145 bool rtw_cardbus_resume(device_t, const pmf_qual_t *); 146 bool rtw_cardbus_suspend(device_t, const pmf_qual_t *); 147 148 const struct rtw_cardbus_product *rtw_cardbus_lookup( 149 const struct cardbus_attach_args *); 150 151 const struct rtw_cardbus_product { 152 u_int32_t rcp_vendor; /* PCI vendor ID */ 153 u_int32_t rcp_product; /* PCI product ID */ 154 const char *rcp_product_name; 155 } rtw_cardbus_products[] = { 156 { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8180, 157 "Realtek RTL8180 802.11 MAC/BBP" }, 158 159 { PCI_VENDOR_BELKIN, PCI_PRODUCT_BELKIN_F5D6020V3, 160 "Belkin F5D6020v3 802.11b (RTL8180 MAC/BBP)" }, 161 162 { PCI_VENDOR_DLINK, PCI_PRODUCT_DLINK_DWL610, 163 "DWL-610 D-Link Air 802.11b (RTL8180 MAC/BBP)" }, 164 165 { 0, 0, NULL }, 166 }; 167 168 const struct rtw_cardbus_product * 169 rtw_cardbus_lookup(const struct cardbus_attach_args *ca) 170 { 171 const struct rtw_cardbus_product *rcp; 172 173 for (rcp = rtw_cardbus_products; rcp->rcp_product_name != NULL; rcp++) { 174 if (PCI_VENDOR(ca->ca_id) == rcp->rcp_vendor && 175 PCI_PRODUCT(ca->ca_id) == rcp->rcp_product) 176 return rcp; 177 } 178 return NULL; 179 } 180 181 int 182 rtw_cardbus_match(device_t parent, cfdata_t match, void *aux) 183 { 184 struct cardbus_attach_args *ca = aux; 185 186 if (rtw_cardbus_lookup(ca) != NULL) 187 return 1; 188 189 return 0; 190 } 191 192 static void 193 rtw_cardbus_funcregen(struct rtw_regs *regs, int enable) 194 { 195 u_int32_t reg; 196 rtw_config0123_enable(regs, 1); 197 reg = RTW_READ(regs, RTW_CONFIG3); 198 if (enable) 199 RTW_WRITE(regs, RTW_CONFIG3, reg | RTW_CONFIG3_FUNCREGEN); 200 else 201 RTW_WRITE(regs, RTW_CONFIG3, reg & ~RTW_CONFIG3_FUNCREGEN); 202 rtw_config0123_enable(regs, 0); 203 } 204 205 void 206 rtw_cardbus_attach(device_t parent, device_t self, void *aux) 207 { 208 struct rtw_cardbus_softc *csc = device_private(self); 209 struct rtw_softc *sc = &csc->sc_rtw; 210 struct rtw_regs *regs = &sc->sc_regs; 211 struct cardbus_attach_args *ca = aux; 212 cardbus_devfunc_t ct = ca->ca_ct; 213 const struct rtw_cardbus_product *rcp; 214 bus_addr_t adr; 215 int rev; 216 217 sc->sc_dev = self; 218 sc->sc_dmat = ca->ca_dmat; 219 csc->sc_ct = ct; 220 csc->sc_tag = ca->ca_tag; 221 222 rcp = rtw_cardbus_lookup(ca); 223 if (rcp == NULL) { 224 printf("\n"); 225 panic("rtw_cardbus_attach: impossible"); 226 } 227 228 /* Get revision info. */ 229 rev = PCI_REVISION(ca->ca_class); 230 231 printf(": %s\n", rcp->rcp_product_name); 232 233 RTW_DPRINTF(RTW_DEBUG_ATTACH, 234 ("%s: pass %d.%d signature %08x\n", device_xname(self), 235 (rev >> 4) & 0xf, rev & 0xf, 236 Cardbus_conf_read(ct, csc->sc_tag, 0x80))); 237 238 /* 239 * Map the device. 240 */ 241 csc->sc_csr = PCI_COMMAND_MASTER_ENABLE | 242 PCI_COMMAND_PARITY_ENABLE | 243 PCI_COMMAND_SERR_ENABLE; 244 if (Cardbus_mapreg_map(ct, RTW_PCI_MMBA, PCI_MAPREG_TYPE_MEM, 0, 245 ®s->r_bt, ®s->r_bh, &adr, ®s->r_sz) == 0) { 246 RTW_DPRINTF(RTW_DEBUG_ATTACH, 247 ("%s: %s mapped %" PRIuMAX " bytes mem space\n", 248 device_xname(self), __func__, (uintmax_t)regs->r_sz)); 249 #if rbus 250 #else 251 (*ct->ct_cf->cardbus_mem_open)(cc, 0, adr, adr+csc->sc_mapsize); 252 #endif 253 csc->sc_csr |= PCI_COMMAND_MEM_ENABLE; 254 csc->sc_bar_reg = RTW_PCI_MMBA; 255 csc->sc_bar_val = adr | PCI_MAPREG_TYPE_MEM; 256 } else if (Cardbus_mapreg_map(ct, RTW_PCI_IOBA, PCI_MAPREG_TYPE_IO, 257 0, ®s->r_bt, ®s->r_bh, &adr, ®s->r_sz) == 0) { 258 RTW_DPRINTF(RTW_DEBUG_ATTACH, 259 ("%s: %s mapped %" PRIuMAX " bytes I/O space\n", 260 device_xname(self), __func__, (uintmax_t)regs->r_sz)); 261 #if rbus 262 #else 263 (*ct->ct_cf->cardbus_io_open)(cc, 0, adr, adr+csc->sc_mapsize); 264 #endif 265 csc->sc_csr |= PCI_COMMAND_IO_ENABLE; 266 csc->sc_bar_reg = RTW_PCI_IOBA; 267 csc->sc_bar_val = adr | PCI_MAPREG_TYPE_IO; 268 } else { 269 aprint_error_dev(self, "unable to map device registers\n"); 270 return; 271 } 272 273 /* 274 * Bring the chip out of powersave mode and initialize the 275 * configuration registers. 276 */ 277 rtw_cardbus_setup(csc); 278 279 /* Remember which interrupt line. */ 280 csc->sc_intrline = ca->ca_intrline; 281 282 /* 283 * Finish off the attach. 284 */ 285 rtw_attach(sc); 286 287 rtw_cardbus_funcregen(regs, 1); 288 289 RTW_WRITE(regs, RTW_FEMR, 0); 290 RTW_WRITE(regs, RTW_FER, RTW_READ(regs, RTW_FER)); 291 292 if (pmf_device_register(self, 293 rtw_cardbus_suspend, rtw_cardbus_resume)) { 294 pmf_class_network_register(self, &sc->sc_if); 295 /* 296 * Power down the socket. 297 */ 298 pmf_device_suspend(self, &sc->sc_qual); 299 } else 300 aprint_error_dev(self, "couldn't establish power handler\n"); 301 } 302 303 int 304 rtw_cardbus_detach(device_t self, int flags) 305 { 306 struct rtw_cardbus_softc *csc = device_private(self); 307 struct rtw_softc *sc = &csc->sc_rtw; 308 struct rtw_regs *regs = &sc->sc_regs; 309 struct cardbus_devfunc *ct = csc->sc_ct; 310 int rc; 311 312 #if defined(DIAGNOSTIC) 313 if (ct == NULL) 314 panic("%s: data structure lacks", device_xname(self)); 315 #endif 316 317 if ((rc = rtw_detach(sc)) != 0) 318 return rc; 319 320 /* 321 * Unhook the interrupt handler. 322 */ 323 if (csc->sc_ih != NULL) 324 Cardbus_intr_disestablish(ct, csc->sc_ih); 325 326 /* 327 * Release bus space and close window. 328 */ 329 if (csc->sc_bar_reg != 0) 330 Cardbus_mapreg_unmap(ct, csc->sc_bar_reg, 331 regs->r_bt, regs->r_bh, regs->r_sz); 332 333 return 0; 334 } 335 336 bool 337 rtw_cardbus_resume(device_t self, const pmf_qual_t *qual) 338 { 339 struct rtw_cardbus_softc *csc = device_private(self); 340 struct rtw_softc *sc = &csc->sc_rtw; 341 cardbus_devfunc_t ct = csc->sc_ct; 342 343 /* 344 * Map and establish the interrupt. 345 */ 346 csc->sc_ih = Cardbus_intr_establish(ct, csc->sc_intrline, IPL_NET, 347 rtw_intr, sc); 348 if (csc->sc_ih == NULL) { 349 aprint_error_dev(sc->sc_dev, 350 "unable to establish interrupt\n"); 351 return false; 352 } 353 354 rtw_cardbus_funcregen(&sc->sc_regs, 1); 355 356 RTW_WRITE(&sc->sc_regs, RTW_FEMR, RTW_FEMR_INTR); 357 RTW_WRITE(&sc->sc_regs, RTW_FER, RTW_FER_INTR); 358 359 return rtw_resume(self, qual); 360 } 361 362 bool 363 rtw_cardbus_suspend(device_t self, const pmf_qual_t *qual) 364 { 365 struct rtw_cardbus_softc *csc = device_private(self); 366 struct rtw_softc *sc = &csc->sc_rtw; 367 cardbus_devfunc_t ct = csc->sc_ct; 368 369 if (!rtw_suspend(self, qual)) 370 return false; 371 372 RTW_WRITE(&sc->sc_regs, RTW_FEMR, 373 RTW_READ(&sc->sc_regs, RTW_FEMR) & ~RTW_FEMR_INTR); 374 375 rtw_cardbus_funcregen(&sc->sc_regs, 0); 376 377 /* Unhook the interrupt handler. */ 378 Cardbus_intr_disestablish(ct, csc->sc_ih); 379 csc->sc_ih = NULL; 380 return true; 381 } 382 383 void 384 rtw_cardbus_setup(struct rtw_cardbus_softc *csc) 385 { 386 pcitag_t tag = csc->sc_tag; 387 cardbus_devfunc_t ct = csc->sc_ct; 388 pcireg_t bhlc, csr, lattimer; 389 390 (void)cardbus_set_powerstate(ct, tag, PCI_PWR_D0); 391 392 /* I believe the datasheet tries to warn us that the RTL8180 393 * wants for 16 (0x10) to divide the latency timer. 394 */ 395 bhlc = Cardbus_conf_read(ct, tag, PCI_BHLC_REG); 396 lattimer = rounddown(PCI_LATTIMER(bhlc), 0x10); 397 if (PCI_LATTIMER(bhlc) != lattimer) { 398 bhlc &= ~(PCI_LATTIMER_MASK << PCI_LATTIMER_SHIFT); 399 bhlc |= (lattimer << PCI_LATTIMER_SHIFT); 400 Cardbus_conf_write(ct, tag, PCI_BHLC_REG, bhlc); 401 } 402 403 /* Program the BAR. */ 404 Cardbus_conf_write(ct, tag, csc->sc_bar_reg, csc->sc_bar_val); 405 406 /* Enable the appropriate bits in the PCI CSR. */ 407 csr = Cardbus_conf_read(ct, tag, PCI_COMMAND_STATUS_REG); 408 csr &= ~(PCI_COMMAND_IO_ENABLE|PCI_COMMAND_MEM_ENABLE); 409 csr |= csc->sc_csr; 410 Cardbus_conf_write(ct, tag, PCI_COMMAND_STATUS_REG, csr); 411 } 412
Indexes created Wed Oct 01 07:09:59 GMT 2025