if_rtw_cardbus.c revision 1.4 1 /* $NetBSD: if_rtw_cardbus.c,v 1.4 2004/12/20 21:05:34 dyoung Exp $ */
2
3 /*-
4 * Copyright (c) 2004, 2005 David Young. All rights reserved.
5 *
6 * Adapted for the RTL8180 by David Young.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. The name of David Young may not be used to endorse or promote
17 * products derived from this software without specific prior
18 * written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY David Young ``AS IS'' AND ANY
21 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
22 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
23 * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL David
24 * Young BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
25 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
26 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
28 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
29 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
31 * OF SUCH DAMAGE.
32 */
33 /*-
34 * Copyright (c) 1999, 2000 The NetBSD Foundation, Inc.
35 * All rights reserved.
36 *
37 * This code is derived from software contributed to The NetBSD Foundation
38 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
39 * NASA Ames Research Center.
40 *
41 * Redistribution and use in source and binary forms, with or without
42 * modification, are permitted provided that the following conditions
43 * are met:
44 * 1. Redistributions of source code must retain the above copyright
45 * notice, this list of conditions and the following disclaimer.
46 * 2. Redistributions in binary form must reproduce the above copyright
47 * notice, this list of conditions and the following disclaimer in the
48 * documentation and/or other materials provided with the distribution.
49 * 3. All advertising materials mentioning features or use of this software
50 * must display the following acknowledgement:
51 * This product includes software developed by the NetBSD
52 * Foundation, Inc. and its contributors.
53 * 4. Neither the name of The NetBSD Foundation nor the names of its
54 * contributors may be used to endorse or promote products derived
55 * from this software without specific prior written permission.
56 *
57 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
58 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
59 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
60 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
61 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
62 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
63 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
64 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
65 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
66 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
67 * POSSIBILITY OF SUCH DAMAGE.
68 */
69
70 /*
71 * Cardbus front-end for the Realtek RTL8180 802.11 MAC/BBP driver.
72 *
73 * TBD factor with atw, tlp Cardbus front-ends?
74 */
75
76 #include <sys/cdefs.h>
77 __KERNEL_RCSID(0, "$NetBSD: if_rtw_cardbus.c,v 1.4 2004/12/20 21:05:34 dyoung Exp $");
78
79 #include "opt_inet.h"
80 #include "opt_ns.h"
81 #include "bpfilter.h"
82
83 #include <sys/param.h>
84 #include <sys/systm.h>
85 #include <sys/mbuf.h>
86 #include <sys/malloc.h>
87 #include <sys/kernel.h>
88 #include <sys/socket.h>
89 #include <sys/ioctl.h>
90 #include <sys/errno.h>
91 #include <sys/device.h>
92
93 #include <machine/endian.h>
94
95 #include <net/if.h>
96 #include <net/if_dl.h>
97 #include <net/if_media.h>
98 #include <net/if_ether.h>
99
100 #include <net80211/ieee80211_compat.h>
101 #include <net80211/ieee80211_radiotap.h>
102 #include <net80211/ieee80211_var.h>
103
104 #if NBPFILTER > 0
105 #include <net/bpf.h>
106 #endif
107
108 #ifdef INET
109 #include <netinet/in.h>
110 #include <netinet/if_inarp.h>
111 #endif
112
113 #ifdef NS
114 #include <netns/ns.h>
115 #include <netns/ns_if.h>
116 #endif
117
118 #include <machine/bus.h>
119 #include <machine/intr.h>
120
121 #include <dev/ic/rtwreg.h>
122 #include <dev/ic/rtwvar.h>
123
124 #include <dev/pci/pcivar.h>
125 #include <dev/pci/pcireg.h>
126 #include <dev/pci/pcidevs.h>
127
128 #include <dev/cardbus/cardbusvar.h>
129 #include <dev/pci/pcidevs.h>
130
131 /*
132 * PCI configuration space registers used by the RTL8180.
133 */
134 #define RTW_PCI_IOBA 0x10 /* i/o mapped base */
135 #define RTW_PCI_MMBA 0x14 /* memory mapped base */
136
137 struct rtw_cardbus_softc {
138 struct rtw_softc sc_rtw; /* real RTL8180 softc */
139
140 /* CardBus-specific goo. */
141 void *sc_ih; /* interrupt handle */
142 cardbus_devfunc_t sc_ct; /* our CardBus devfuncs */
143 cardbustag_t sc_tag; /* our CardBus tag */
144 int sc_csr; /* CSR bits */
145 bus_size_t sc_mapsize; /* size of the mapped bus space
146 * region
147 */
148
149 int sc_cben; /* CardBus enables */
150 int sc_bar_reg; /* which BAR to use */
151 pcireg_t sc_bar_val; /* value of the BAR */
152
153 int sc_intrline; /* interrupt line */
154 };
155
156 int rtw_cardbus_match(struct device *, struct cfdata *, void *);
157 void rtw_cardbus_attach(struct device *, struct device *, void *);
158 int rtw_cardbus_detach(struct device *, int);
159
160 CFATTACH_DECL(rtw_cardbus, sizeof(struct rtw_cardbus_softc),
161 rtw_cardbus_match, rtw_cardbus_attach, rtw_cardbus_detach, rtw_activate);
162
163 void rtw_cardbus_setup(struct rtw_cardbus_softc *);
164
165 int rtw_cardbus_enable(struct rtw_softc *);
166 void rtw_cardbus_disable(struct rtw_softc *);
167 void rtw_cardbus_power(struct rtw_softc *, int);
168
169 const struct rtw_cardbus_product *rtw_cardbus_lookup(
170 const struct cardbus_attach_args *);
171
172 const struct rtw_cardbus_product {
173 u_int32_t rcp_vendor; /* PCI vendor ID */
174 u_int32_t rcp_product; /* PCI product ID */
175 const char *rcp_product_name;
176 } rtw_cardbus_products[] = {
177 { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8180,
178 "Realtek RTL8180 802.11 MAC/BBP" },
179
180 { PCI_VENDOR_BELKIN, PCI_PRODUCT_BELKIN_F5D6020V3,
181 "Belkin F5D6020v3 802.11b (RTL8180 MAC/BBP)" },
182
183 { 0, 0, NULL },
184 };
185
186 const struct rtw_cardbus_product *
187 rtw_cardbus_lookup(ca)
188 const struct cardbus_attach_args *ca;
189 {
190 const struct rtw_cardbus_product *rcp;
191
192 for (rcp = rtw_cardbus_products;
193 rcp->rcp_product_name != NULL;
194 rcp++) {
195 if (PCI_VENDOR(ca->ca_id) == rcp->rcp_vendor &&
196 PCI_PRODUCT(ca->ca_id) == rcp->rcp_product)
197 return (rcp);
198 }
199 return (NULL);
200 }
201
202 int
203 rtw_cardbus_match(parent, match, aux)
204 struct device *parent;
205 struct cfdata *match;
206 void *aux;
207 {
208 struct cardbus_attach_args *ca = aux;
209
210 if (rtw_cardbus_lookup(ca) != NULL)
211 return (1);
212
213 return (0);
214 }
215
216 static void
217 rtw_cardbus_intr_ack(struct rtw_regs *regs)
218 {
219 RTW_WRITE(regs, RTW_FER, RTW_FER_INTR);
220 }
221
222 static void
223 rtw_cardbus_funcregen(struct rtw_regs *regs, int enable)
224 {
225 u_int32_t reg;
226 rtw_config0123_enable(regs, 1);
227 reg = RTW_READ(regs, RTW_CONFIG3);
228 if (enable) {
229 RTW_WRITE(regs, RTW_CONFIG3, reg | RTW_CONFIG3_FUNCREGEN);
230 } else {
231 RTW_WRITE(regs, RTW_CONFIG3, reg & ~RTW_CONFIG3_FUNCREGEN);
232 }
233 rtw_config0123_enable(regs, 0);
234 }
235
236 void
237 rtw_cardbus_attach(parent, self, aux)
238 struct device *parent, *self;
239 void *aux;
240 {
241 struct rtw_cardbus_softc *csc = (void *)self;
242 struct rtw_softc *sc = &csc->sc_rtw;
243 struct rtw_regs *regs = &sc->sc_regs;
244 struct cardbus_attach_args *ca = aux;
245 cardbus_devfunc_t ct = ca->ca_ct;
246 const struct rtw_cardbus_product *rcp;
247 bus_addr_t adr;
248 int rev;
249
250 sc->sc_dmat = ca->ca_dmat;
251 csc->sc_ct = ct;
252 csc->sc_tag = ca->ca_tag;
253
254 rcp = rtw_cardbus_lookup(ca);
255 if (rcp == NULL) {
256 printf("\n");
257 panic("rtw_cardbus_attach: impossible");
258 }
259
260 /*
261 * Power management hooks.
262 */
263 sc->sc_enable = rtw_cardbus_enable;
264 sc->sc_disable = rtw_cardbus_disable;
265 sc->sc_power = rtw_cardbus_power;
266
267 sc->sc_intr_ack = rtw_cardbus_intr_ack;
268
269 /* Get revision info. */
270 rev = PCI_REVISION(ca->ca_class);
271
272 printf(": %s\n", rcp->rcp_product_name);
273
274 RTW_DPRINTF(("%s: pass %d.%d signature %08x\n", sc->sc_dev.dv_xname,
275 (rev >> 4) & 0xf, rev & 0xf,
276 cardbus_conf_read(ct->ct_cc, ct->ct_cf, csc->sc_tag, 0x80)));
277
278 /*
279 * Map the device.
280 */
281 csc->sc_csr = CARDBUS_COMMAND_MASTER_ENABLE;
282 if (Cardbus_mapreg_map(ct, RTW_PCI_MMBA,
283 CARDBUS_MAPREG_TYPE_MEM, 0, ®s->r_bt, ®s->r_bh, &adr,
284 &csc->sc_mapsize) == 0) {
285 RTW_DPRINTF(("%s: %s mapped %lu bytes mem space\n",
286 sc->sc_dev.dv_xname, __func__, (long)csc->sc_mapsize));
287 #if rbus
288 #else
289 (*ct->ct_cf->cardbus_mem_open)(cc, 0, adr, adr+csc->sc_mapsize);
290 #endif
291 csc->sc_cben = CARDBUS_MEM_ENABLE;
292 csc->sc_csr |= CARDBUS_COMMAND_MEM_ENABLE;
293 csc->sc_bar_reg = RTW_PCI_MMBA;
294 csc->sc_bar_val = adr | CARDBUS_MAPREG_TYPE_MEM;
295 } else if (Cardbus_mapreg_map(ct, RTW_PCI_IOBA,
296 CARDBUS_MAPREG_TYPE_IO, 0, ®s->r_bt, ®s->r_bh, &adr,
297 &csc->sc_mapsize) == 0) {
298 RTW_DPRINTF(("%s: %s mapped %lu bytes I/O space\n",
299 sc->sc_dev.dv_xname, __func__, (long)csc->sc_mapsize));
300 #if rbus
301 #else
302 (*ct->ct_cf->cardbus_io_open)(cc, 0, adr, adr+csc->sc_mapsize);
303 #endif
304 csc->sc_cben = CARDBUS_IO_ENABLE;
305 csc->sc_csr |= CARDBUS_COMMAND_IO_ENABLE;
306 csc->sc_bar_reg = RTW_PCI_IOBA;
307 csc->sc_bar_val = adr | CARDBUS_MAPREG_TYPE_IO;
308 } else {
309 printf("%s: unable to map device registers\n",
310 sc->sc_dev.dv_xname);
311 return;
312 }
313
314 /*
315 * Bring the chip out of powersave mode and initialize the
316 * configuration registers.
317 */
318 rtw_cardbus_setup(csc);
319
320 /* Remember which interrupt line. */
321 csc->sc_intrline = ca->ca_intrline;
322
323 printf("%s: interrupting at %d\n", sc->sc_dev.dv_xname,
324 csc->sc_intrline);
325 /*
326 * Finish off the attach.
327 */
328 rtw_attach(sc);
329
330 rtw_cardbus_funcregen(regs, 1);
331
332 RTW_WRITE(regs, RTW_FEMR, RTW_FEMR_INTR);
333 RTW_WRITE(regs, RTW_FER, RTW_FER_INTR);
334
335 /*
336 * Power down the socket.
337 */
338 Cardbus_function_disable(csc->sc_ct);
339 }
340
341 int
342 rtw_cardbus_detach(self, flags)
343 struct device *self;
344 int flags;
345 {
346 struct rtw_cardbus_softc *csc = (void *)self;
347 struct rtw_softc *sc = &csc->sc_rtw;
348 struct rtw_regs *regs = &sc->sc_regs;
349 struct cardbus_devfunc *ct = csc->sc_ct;
350 int rv;
351
352 #if defined(DIAGNOSTIC)
353 if (ct == NULL)
354 panic("%s: data structure lacks", sc->sc_dev.dv_xname);
355 #endif
356
357 rv = rtw_detach(sc);
358 if (rv)
359 return (rv);
360
361 rtw_cardbus_funcregen(regs, 0);
362
363 /*
364 * Unhook the interrupt handler.
365 */
366 if (csc->sc_ih != NULL)
367 cardbus_intr_disestablish(ct->ct_cc, ct->ct_cf, csc->sc_ih);
368
369 /*
370 * Release bus space and close window.
371 */
372 if (csc->sc_bar_reg != 0)
373 Cardbus_mapreg_unmap(ct, csc->sc_bar_reg,
374 regs->r_bt, regs->r_bh, csc->sc_mapsize);
375
376 return (0);
377 }
378
379 int
380 rtw_cardbus_enable(sc)
381 struct rtw_softc *sc;
382 {
383 struct rtw_cardbus_softc *csc = (void *) sc;
384 cardbus_devfunc_t ct = csc->sc_ct;
385 cardbus_chipset_tag_t cc = ct->ct_cc;
386 cardbus_function_tag_t cf = ct->ct_cf;
387
388 /*
389 * Power on the socket.
390 */
391 Cardbus_function_enable(ct);
392
393 /*
394 * Set up the PCI configuration registers.
395 */
396 rtw_cardbus_setup(csc);
397
398 /*
399 * Map and establish the interrupt.
400 */
401 csc->sc_ih = cardbus_intr_establish(cc, cf, csc->sc_intrline, IPL_NET,
402 rtw_intr, sc);
403 if (csc->sc_ih == NULL) {
404 printf("%s: unable to establish interrupt at %d\n",
405 sc->sc_dev.dv_xname, csc->sc_intrline);
406 Cardbus_function_disable(csc->sc_ct);
407 return (1);
408 }
409
410 rtw_cardbus_funcregen(&sc->sc_regs, 1);
411
412 RTW_WRITE(&sc->sc_regs, RTW_FEMR, RTW_FEMR_INTR);
413 RTW_WRITE(&sc->sc_regs, RTW_FER, RTW_FER_INTR);
414
415 return (0);
416 }
417
418 void
419 rtw_cardbus_disable(sc)
420 struct rtw_softc *sc;
421 {
422 struct rtw_cardbus_softc *csc = (void *) sc;
423 cardbus_devfunc_t ct = csc->sc_ct;
424 cardbus_chipset_tag_t cc = ct->ct_cc;
425 cardbus_function_tag_t cf = ct->ct_cf;
426
427 RTW_WRITE(&sc->sc_regs, RTW_FEMR,
428 RTW_READ(&sc->sc_regs, RTW_FEMR) & ~RTW_FEMR_INTR);
429
430 rtw_cardbus_funcregen(&sc->sc_regs, 0);
431
432 /* Unhook the interrupt handler. */
433 cardbus_intr_disestablish(cc, cf, csc->sc_ih);
434 csc->sc_ih = NULL;
435
436 /* Power down the socket. */
437 Cardbus_function_disable(ct);
438 }
439
440 void
441 rtw_cardbus_power(sc, why)
442 struct rtw_softc *sc;
443 int why;
444 {
445 struct rtw_cardbus_softc *csc = (void *) sc;
446
447 RTW_DPRINTF(("%s: rtw_cardbus_power\n", sc->sc_dev.dv_xname));
448
449 if (why == PWR_RESUME) {
450 /*
451 * Give the PCI configuration registers a kick
452 * in the head.
453 */
454 #ifdef DIAGNOSTIC
455 if ((sc->sc_flags & RTW_F_ENABLED) == 0)
456 panic("rtw_cardbus_power");
457 #endif
458 rtw_cardbus_setup(csc);
459 }
460 }
461
462 void
463 rtw_cardbus_setup(csc)
464 struct rtw_cardbus_softc *csc;
465 {
466 struct rtw_softc *sc = &csc->sc_rtw;
467 cardbus_devfunc_t ct = csc->sc_ct;
468 cardbus_chipset_tag_t cc = ct->ct_cc;
469 cardbus_function_tag_t cf = ct->ct_cf;
470 pcireg_t reg;
471 int pmreg;
472
473 if (cardbus_get_capability(cc, cf, csc->sc_tag,
474 PCI_CAP_PWRMGMT, &pmreg, 0)) {
475 reg = cardbus_conf_read(cc, cf, csc->sc_tag, pmreg + 4) & 0x03;
476 #if 1 /* XXX Probably not right for CardBus. */
477 if (reg == 3) {
478 /*
479 * The card has lost all configuration data in
480 * this state, so punt.
481 */
482 printf("%s: unable to wake up from power state D3\n",
483 sc->sc_dev.dv_xname);
484 return;
485 }
486 #endif
487 if (reg != 0) {
488 printf("%s: waking up from power state D%d\n",
489 sc->sc_dev.dv_xname, reg);
490 cardbus_conf_write(cc, cf, csc->sc_tag,
491 pmreg + 4, 0);
492 }
493 }
494
495 /* Program the BAR. */
496 cardbus_conf_write(cc, cf, csc->sc_tag, csc->sc_bar_reg,
497 csc->sc_bar_val);
498
499 /* Make sure the right access type is on the CardBus bridge. */
500 (*ct->ct_cf->cardbus_ctrl)(cc, csc->sc_cben);
501 (*ct->ct_cf->cardbus_ctrl)(cc, CARDBUS_BM_ENABLE);
502
503 /* Enable the appropriate bits in the PCI CSR. */
504 reg = cardbus_conf_read(cc, cf, csc->sc_tag,
505 CARDBUS_COMMAND_STATUS_REG);
506 reg &= ~(CARDBUS_COMMAND_IO_ENABLE|CARDBUS_COMMAND_MEM_ENABLE);
507 reg |= csc->sc_csr;
508 cardbus_conf_write(cc, cf, csc->sc_tag, CARDBUS_COMMAND_STATUS_REG,
509 reg);
510
511 /*
512 * Make sure the latency timer is set to some reasonable
513 * value.
514 */
515 reg = cardbus_conf_read(cc, cf, csc->sc_tag, CARDBUS_BHLC_REG);
516 if (CARDBUS_LATTIMER(reg) < 0x20) {
517 reg &= ~(CARDBUS_LATTIMER_MASK << CARDBUS_LATTIMER_SHIFT);
518 reg |= (0x20 << CARDBUS_LATTIMER_SHIFT);
519 cardbus_conf_write(cc, cf, csc->sc_tag, CARDBUS_BHLC_REG, reg);
520 }
521 }
522