if_tlp_cardbus.c revision 1.24.6.4 1 1.24.6.4 bouyer /* $NetBSD: if_tlp_cardbus.c,v 1.24.6.4 2001/03/27 15:31:50 bouyer Exp $ */
2 1.24.6.2 bouyer
3 1.24.6.2 bouyer /*-
4 1.24.6.2 bouyer * Copyright (c) 1999, 2000 The NetBSD Foundation, Inc.
5 1.24.6.2 bouyer * All rights reserved.
6 1.24.6.2 bouyer *
7 1.24.6.2 bouyer * This code is derived from software contributed to The NetBSD Foundation
8 1.24.6.2 bouyer * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 1.24.6.2 bouyer * NASA Ames Research Center.
10 1.24.6.2 bouyer *
11 1.24.6.2 bouyer * Redistribution and use in source and binary forms, with or without
12 1.24.6.2 bouyer * modification, are permitted provided that the following conditions
13 1.24.6.2 bouyer * are met:
14 1.24.6.2 bouyer * 1. Redistributions of source code must retain the above copyright
15 1.24.6.2 bouyer * notice, this list of conditions and the following disclaimer.
16 1.24.6.2 bouyer * 2. Redistributions in binary form must reproduce the above copyright
17 1.24.6.2 bouyer * notice, this list of conditions and the following disclaimer in the
18 1.24.6.2 bouyer * documentation and/or other materials provided with the distribution.
19 1.24.6.2 bouyer * 3. All advertising materials mentioning features or use of this software
20 1.24.6.2 bouyer * must display the following acknowledgement:
21 1.24.6.2 bouyer * This product includes software developed by the NetBSD
22 1.24.6.2 bouyer * Foundation, Inc. and its contributors.
23 1.24.6.2 bouyer * 4. Neither the name of The NetBSD Foundation nor the names of its
24 1.24.6.2 bouyer * contributors may be used to endorse or promote products derived
25 1.24.6.2 bouyer * from this software without specific prior written permission.
26 1.24.6.2 bouyer *
27 1.24.6.2 bouyer * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 1.24.6.2 bouyer * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 1.24.6.2 bouyer * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 1.24.6.2 bouyer * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 1.24.6.2 bouyer * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 1.24.6.2 bouyer * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 1.24.6.2 bouyer * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 1.24.6.2 bouyer * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 1.24.6.2 bouyer * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 1.24.6.2 bouyer * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 1.24.6.2 bouyer * POSSIBILITY OF SUCH DAMAGE.
38 1.24.6.2 bouyer */
39 1.24.6.2 bouyer
40 1.24.6.2 bouyer /*
41 1.24.6.2 bouyer * CardBus bus front-end for the Digital Semiconductor ``Tulip'' (21x4x)
42 1.24.6.2 bouyer * Ethernet controller family driver.
43 1.24.6.2 bouyer */
44 1.24.6.2 bouyer
45 1.24.6.2 bouyer #include "opt_inet.h"
46 1.24.6.2 bouyer #include "opt_ns.h"
47 1.24.6.2 bouyer #include "bpfilter.h"
48 1.24.6.2 bouyer
49 1.24.6.2 bouyer #include <sys/param.h>
50 1.24.6.2 bouyer #include <sys/systm.h>
51 1.24.6.2 bouyer #include <sys/mbuf.h>
52 1.24.6.2 bouyer #include <sys/malloc.h>
53 1.24.6.2 bouyer #include <sys/kernel.h>
54 1.24.6.2 bouyer #include <sys/socket.h>
55 1.24.6.2 bouyer #include <sys/ioctl.h>
56 1.24.6.2 bouyer #include <sys/errno.h>
57 1.24.6.2 bouyer #include <sys/device.h>
58 1.24.6.2 bouyer
59 1.24.6.2 bouyer #include <machine/endian.h>
60 1.24.6.2 bouyer
61 1.24.6.2 bouyer #include <net/if.h>
62 1.24.6.2 bouyer #include <net/if_dl.h>
63 1.24.6.2 bouyer #include <net/if_media.h>
64 1.24.6.2 bouyer #include <net/if_ether.h>
65 1.24.6.2 bouyer
66 1.24.6.2 bouyer #if NBPFILTER > 0
67 1.24.6.2 bouyer #include <net/bpf.h>
68 1.24.6.2 bouyer #endif
69 1.24.6.2 bouyer
70 1.24.6.2 bouyer #ifdef INET
71 1.24.6.2 bouyer #include <netinet/in.h>
72 1.24.6.2 bouyer #include <netinet/if_inarp.h>
73 1.24.6.2 bouyer #endif
74 1.24.6.2 bouyer
75 1.24.6.2 bouyer #ifdef NS
76 1.24.6.2 bouyer #include <netns/ns.h>
77 1.24.6.2 bouyer #include <netns/ns_if.h>
78 1.24.6.2 bouyer #endif
79 1.24.6.2 bouyer
80 1.24.6.2 bouyer #include <machine/bus.h>
81 1.24.6.2 bouyer #include <machine/intr.h>
82 1.24.6.2 bouyer
83 1.24.6.2 bouyer #include <dev/mii/miivar.h>
84 1.24.6.2 bouyer #include <dev/mii/mii_bitbang.h>
85 1.24.6.2 bouyer
86 1.24.6.2 bouyer #include <dev/ic/tulipreg.h>
87 1.24.6.2 bouyer #include <dev/ic/tulipvar.h>
88 1.24.6.2 bouyer
89 1.24.6.2 bouyer #include <dev/pci/pcivar.h>
90 1.24.6.2 bouyer #include <dev/pci/pcireg.h>
91 1.24.6.2 bouyer #include <dev/pci/pcidevs.h>
92 1.24.6.2 bouyer
93 1.24.6.2 bouyer #include <dev/cardbus/cardbusvar.h>
94 1.24.6.3 bouyer #include <dev/cardbus/cardbusdevs.h>
95 1.24.6.2 bouyer
96 1.24.6.2 bouyer /*
97 1.24.6.2 bouyer * PCI configuration space registers used by the Tulip.
98 1.24.6.2 bouyer */
99 1.24.6.2 bouyer #define TULIP_PCI_IOBA 0x10 /* i/o mapped base */
100 1.24.6.2 bouyer #define TULIP_PCI_MMBA 0x14 /* memory mapped base */
101 1.24.6.2 bouyer #define TULIP_PCI_CFDA 0x40 /* configuration driver area */
102 1.24.6.2 bouyer
103 1.24.6.2 bouyer #define CFDA_SLEEP 0x80000000 /* sleep mode */
104 1.24.6.2 bouyer #define CFDA_SNOOZE 0x40000000 /* snooze mode */
105 1.24.6.2 bouyer
106 1.24.6.2 bouyer struct tulip_cardbus_softc {
107 1.24.6.2 bouyer struct tulip_softc sc_tulip; /* real Tulip softc */
108 1.24.6.2 bouyer
109 1.24.6.2 bouyer /* CardBus-specific goo. */
110 1.24.6.2 bouyer void *sc_ih; /* interrupt handle */
111 1.24.6.2 bouyer cardbus_devfunc_t sc_ct; /* our CardBus devfuncs */
112 1.24.6.2 bouyer cardbustag_t sc_tag; /* our CardBus tag */
113 1.24.6.2 bouyer int sc_csr; /* CSR bits */
114 1.24.6.2 bouyer bus_size_t sc_mapsize; /* the size of mapped bus space
115 1.24.6.2 bouyer region */
116 1.24.6.2 bouyer
117 1.24.6.2 bouyer int sc_cben; /* CardBus enables */
118 1.24.6.2 bouyer int sc_bar_reg; /* which BAR to use */
119 1.24.6.2 bouyer pcireg_t sc_bar_val; /* value of the BAR */
120 1.24.6.2 bouyer
121 1.24.6.2 bouyer int sc_intrline; /* interrupt line */
122 1.24.6.2 bouyer };
123 1.24.6.2 bouyer
124 1.24.6.2 bouyer int tlp_cardbus_match __P((struct device *, struct cfdata *, void *));
125 1.24.6.2 bouyer void tlp_cardbus_attach __P((struct device *, struct device *, void *));
126 1.24.6.2 bouyer int tlp_cardbus_detach __P((struct device *, int));
127 1.24.6.2 bouyer
128 1.24.6.2 bouyer struct cfattach tlp_cardbus_ca = {
129 1.24.6.2 bouyer sizeof(struct tulip_cardbus_softc),
130 1.24.6.2 bouyer tlp_cardbus_match, tlp_cardbus_attach,
131 1.24.6.2 bouyer tlp_cardbus_detach, tlp_activate,
132 1.24.6.2 bouyer };
133 1.24.6.2 bouyer
134 1.24.6.2 bouyer const struct tulip_cardbus_product {
135 1.24.6.2 bouyer u_int32_t tcp_vendor; /* PCI vendor ID */
136 1.24.6.2 bouyer u_int32_t tcp_product; /* PCI product ID */
137 1.24.6.2 bouyer tulip_chip_t tcp_chip; /* base Tulip chip type */
138 1.24.6.2 bouyer } tlp_cardbus_products[] = {
139 1.24.6.2 bouyer { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21142,
140 1.24.6.2 bouyer TULIP_CHIP_21142 },
141 1.24.6.2 bouyer
142 1.24.6.2 bouyer { PCI_VENDOR_XIRCOM, PCI_PRODUCT_XIRCOM_X3201_3_21143,
143 1.24.6.2 bouyer TULIP_CHIP_X3201_3 },
144 1.24.6.2 bouyer
145 1.24.6.3 bouyer { CARDBUS_VENDOR_ACCTON, CARDBUS_PRODUCT_ACCTON_EN2242,
146 1.24.6.3 bouyer TULIP_CHIP_AN985 },
147 1.24.6.3 bouyer
148 1.24.6.3 bouyer { CARDBUS_VENDOR_ABOCOM, CARDBUS_PRODUCT_ABOCOM_FE2500,
149 1.24.6.3 bouyer TULIP_CHIP_AN985 },
150 1.24.6.3 bouyer
151 1.24.6.4 bouyer { CARDBUS_VENDOR_ABOCOM, CARDBUS_PRODUCT_ABOCOM_PCM200,
152 1.24.6.4 bouyer TULIP_CHIP_AN985 },
153 1.24.6.4 bouyer
154 1.24.6.2 bouyer { 0, 0,
155 1.24.6.2 bouyer TULIP_CHIP_INVALID },
156 1.24.6.2 bouyer };
157 1.24.6.2 bouyer
158 1.24.6.2 bouyer void tlp_cardbus_setup __P((struct tulip_cardbus_softc *));
159 1.24.6.2 bouyer
160 1.24.6.2 bouyer int tlp_cardbus_enable __P((struct tulip_softc *));
161 1.24.6.2 bouyer void tlp_cardbus_disable __P((struct tulip_softc *));
162 1.24.6.2 bouyer void tlp_cardbus_power __P((struct tulip_softc *, int));
163 1.24.6.2 bouyer
164 1.24.6.2 bouyer void tlp_cardbus_x3201_reset __P((struct tulip_softc *));
165 1.24.6.2 bouyer
166 1.24.6.2 bouyer const struct tulip_cardbus_product *tlp_cardbus_lookup
167 1.24.6.2 bouyer __P((const struct cardbus_attach_args *));
168 1.24.6.2 bouyer
169 1.24.6.2 bouyer const struct tulip_cardbus_product *
170 1.24.6.2 bouyer tlp_cardbus_lookup(ca)
171 1.24.6.2 bouyer const struct cardbus_attach_args *ca;
172 1.24.6.2 bouyer {
173 1.24.6.2 bouyer const struct tulip_cardbus_product *tcp;
174 1.24.6.2 bouyer
175 1.24.6.2 bouyer for (tcp = tlp_cardbus_products;
176 1.24.6.2 bouyer tlp_chip_names[tcp->tcp_chip] != NULL;
177 1.24.6.2 bouyer tcp++) {
178 1.24.6.2 bouyer if (PCI_VENDOR(ca->ca_id) == tcp->tcp_vendor &&
179 1.24.6.2 bouyer PCI_PRODUCT(ca->ca_id) == tcp->tcp_product)
180 1.24.6.2 bouyer return (tcp);
181 1.24.6.2 bouyer }
182 1.24.6.2 bouyer return (NULL);
183 1.24.6.2 bouyer }
184 1.24.6.2 bouyer
185 1.24.6.2 bouyer int
186 1.24.6.2 bouyer tlp_cardbus_match(parent, match, aux)
187 1.24.6.2 bouyer struct device *parent;
188 1.24.6.2 bouyer struct cfdata *match;
189 1.24.6.2 bouyer void *aux;
190 1.24.6.2 bouyer {
191 1.24.6.2 bouyer struct cardbus_attach_args *ca = aux;
192 1.24.6.2 bouyer
193 1.24.6.2 bouyer if (tlp_cardbus_lookup(ca) != NULL)
194 1.24.6.2 bouyer return (1);
195 1.24.6.2 bouyer
196 1.24.6.2 bouyer return (0);
197 1.24.6.2 bouyer }
198 1.24.6.2 bouyer
199 1.24.6.2 bouyer void
200 1.24.6.2 bouyer tlp_cardbus_attach(parent, self, aux)
201 1.24.6.2 bouyer struct device *parent, *self;
202 1.24.6.2 bouyer void *aux;
203 1.24.6.2 bouyer {
204 1.24.6.2 bouyer struct tulip_cardbus_softc *csc = (void *)self;
205 1.24.6.2 bouyer struct tulip_softc *sc = &csc->sc_tulip;
206 1.24.6.2 bouyer struct cardbus_attach_args *ca = aux;
207 1.24.6.2 bouyer cardbus_devfunc_t ct = ca->ca_ct;
208 1.24.6.2 bouyer const struct tulip_cardbus_product *tcp;
209 1.24.6.2 bouyer u_int8_t enaddr[ETHER_ADDR_LEN];
210 1.24.6.2 bouyer bus_addr_t adr;
211 1.24.6.3 bouyer pcireg_t reg;
212 1.24.6.2 bouyer
213 1.24.6.2 bouyer sc->sc_devno = ca->ca_device;
214 1.24.6.2 bouyer sc->sc_dmat = ca->ca_dmat;
215 1.24.6.2 bouyer csc->sc_ct = ct;
216 1.24.6.2 bouyer csc->sc_tag = ca->ca_tag;
217 1.24.6.2 bouyer
218 1.24.6.2 bouyer tcp = tlp_cardbus_lookup(ca);
219 1.24.6.2 bouyer if (tcp == NULL) {
220 1.24.6.2 bouyer printf("\n");
221 1.24.6.2 bouyer panic("tlp_cardbus_attach: impossible");
222 1.24.6.2 bouyer }
223 1.24.6.2 bouyer sc->sc_chip = tcp->tcp_chip;
224 1.24.6.2 bouyer
225 1.24.6.2 bouyer /*
226 1.24.6.2 bouyer * By default, Tulip registers are 8 bytes long (4 bytes
227 1.24.6.2 bouyer * followed by a 4 byte pad).
228 1.24.6.2 bouyer */
229 1.24.6.2 bouyer sc->sc_regshift = 3;
230 1.24.6.2 bouyer
231 1.24.6.2 bouyer /*
232 1.24.6.2 bouyer * Power management hooks.
233 1.24.6.2 bouyer */
234 1.24.6.2 bouyer sc->sc_enable = tlp_cardbus_enable;
235 1.24.6.2 bouyer sc->sc_disable = tlp_cardbus_disable;
236 1.24.6.2 bouyer sc->sc_power = tlp_cardbus_power;
237 1.24.6.2 bouyer
238 1.24.6.2 bouyer /*
239 1.24.6.2 bouyer * Get revision info, and set some chip-specific variables.
240 1.24.6.2 bouyer */
241 1.24.6.2 bouyer sc->sc_rev = PCI_REVISION(ca->ca_class);
242 1.24.6.2 bouyer switch (sc->sc_chip) {
243 1.24.6.2 bouyer case TULIP_CHIP_21142:
244 1.24.6.2 bouyer if (sc->sc_rev >= 0x20)
245 1.24.6.2 bouyer sc->sc_chip = TULIP_CHIP_21143;
246 1.24.6.2 bouyer break;
247 1.24.6.2 bouyer
248 1.24.6.3 bouyer case TULIP_CHIP_AN985:
249 1.24.6.3 bouyer /*
250 1.24.6.3 bouyer * The AN983 and AN985 are very similar, and are
251 1.24.6.3 bouyer * differentiated by a "signature" register that
252 1.24.6.3 bouyer * is like, but not identical, to a PCI ID register.
253 1.24.6.3 bouyer */
254 1.24.6.3 bouyer reg = cardbus_conf_read(ct->ct_cc, ct->ct_cf, csc->sc_tag,
255 1.24.6.3 bouyer 0x80);
256 1.24.6.3 bouyer switch (reg) {
257 1.24.6.3 bouyer case 0x09811317:
258 1.24.6.3 bouyer sc->sc_chip = TULIP_CHIP_AN985;
259 1.24.6.3 bouyer break;
260 1.24.6.3 bouyer
261 1.24.6.3 bouyer case 0x09851317:
262 1.24.6.3 bouyer sc->sc_chip = TULIP_CHIP_AN983;
263 1.24.6.3 bouyer break;
264 1.24.6.3 bouyer
265 1.24.6.3 bouyer default:
266 1.24.6.3 bouyer /* Unknown -- use default. */
267 1.24.6.3 bouyer }
268 1.24.6.3 bouyer break;
269 1.24.6.3 bouyer
270 1.24.6.2 bouyer default:
271 1.24.6.2 bouyer /* Nothing. */
272 1.24.6.2 bouyer }
273 1.24.6.2 bouyer
274 1.24.6.2 bouyer printf(": %s Ethernet, pass %d.%d\n",
275 1.24.6.2 bouyer tlp_chip_names[sc->sc_chip],
276 1.24.6.2 bouyer (sc->sc_rev >> 4) & 0xf, sc->sc_rev & 0xf);
277 1.24.6.2 bouyer
278 1.24.6.2 bouyer /*
279 1.24.6.2 bouyer * Map the device.
280 1.24.6.2 bouyer */
281 1.24.6.2 bouyer csc->sc_csr = PCI_COMMAND_MASTER_ENABLE;
282 1.24.6.2 bouyer if (Cardbus_mapreg_map(ct, TULIP_PCI_IOBA,
283 1.24.6.2 bouyer PCI_MAPREG_TYPE_IO, 0, &sc->sc_st, &sc->sc_sh, &adr,
284 1.24.6.2 bouyer &csc->sc_mapsize) == 0) {
285 1.24.6.2 bouyer #if rbus
286 1.24.6.2 bouyer #else
287 1.24.6.2 bouyer (*ct->ct_cf->cardbus_io_open)(cc, 0, adr, adr+csc->sc_mapsize);
288 1.24.6.2 bouyer #endif
289 1.24.6.2 bouyer csc->sc_cben = CARDBUS_IO_ENABLE;
290 1.24.6.2 bouyer csc->sc_csr |= PCI_COMMAND_IO_ENABLE;
291 1.24.6.2 bouyer csc->sc_bar_reg = TULIP_PCI_IOBA;
292 1.24.6.2 bouyer csc->sc_bar_val = adr | PCI_MAPREG_TYPE_IO;
293 1.24.6.2 bouyer } else if (Cardbus_mapreg_map(ct, TULIP_PCI_MMBA,
294 1.24.6.2 bouyer PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0,
295 1.24.6.2 bouyer &sc->sc_st, &sc->sc_sh, &adr, &csc->sc_mapsize) == 0) {
296 1.24.6.2 bouyer #if rbus
297 1.24.6.2 bouyer #else
298 1.24.6.2 bouyer (*ct->ct_cf->cardbus_mem_open)(cc, 0, adr, adr+csc->sc_mapsize);
299 1.24.6.2 bouyer #endif
300 1.24.6.2 bouyer csc->sc_cben = CARDBUS_MEM_ENABLE;
301 1.24.6.2 bouyer csc->sc_csr |= PCI_COMMAND_MEM_ENABLE;
302 1.24.6.2 bouyer csc->sc_bar_reg = TULIP_PCI_MMBA;
303 1.24.6.2 bouyer csc->sc_bar_val = adr | PCI_MAPREG_TYPE_MEM;
304 1.24.6.2 bouyer } else {
305 1.24.6.2 bouyer printf("%s: unable to map device registers\n",
306 1.24.6.2 bouyer sc->sc_dev.dv_xname);
307 1.24.6.2 bouyer return;
308 1.24.6.2 bouyer }
309 1.24.6.2 bouyer
310 1.24.6.2 bouyer /*
311 1.24.6.2 bouyer * Bring the chip out of powersave mode and initialize the
312 1.24.6.2 bouyer * configuration registers.
313 1.24.6.2 bouyer */
314 1.24.6.2 bouyer tlp_cardbus_setup(csc);
315 1.24.6.2 bouyer
316 1.24.6.2 bouyer /*
317 1.24.6.2 bouyer * Read the contents of the Ethernet Address ROM/SROM.
318 1.24.6.2 bouyer */
319 1.24.6.2 bouyer switch (sc->sc_chip) {
320 1.24.6.2 bouyer case TULIP_CHIP_X3201_3:
321 1.24.6.2 bouyer /*
322 1.24.6.2 bouyer * No SROM on this chip.
323 1.24.6.2 bouyer */
324 1.24.6.2 bouyer break;
325 1.24.6.2 bouyer
326 1.24.6.2 bouyer default:
327 1.24.6.2 bouyer if (tlp_read_srom(sc) == 0)
328 1.24.6.2 bouyer goto cant_cope;
329 1.24.6.2 bouyer break;
330 1.24.6.2 bouyer }
331 1.24.6.2 bouyer
332 1.24.6.2 bouyer /*
333 1.24.6.2 bouyer * Deal with chip/board quirks. This includes setting up
334 1.24.6.2 bouyer * the mediasw, and extracting the Ethernet address from
335 1.24.6.2 bouyer * the rombuf.
336 1.24.6.2 bouyer */
337 1.24.6.2 bouyer switch (sc->sc_chip) {
338 1.24.6.2 bouyer case TULIP_CHIP_21142:
339 1.24.6.2 bouyer case TULIP_CHIP_21143:
340 1.24.6.2 bouyer /* Check for new format SROM. */
341 1.24.6.2 bouyer if (tlp_isv_srom_enaddr(sc, enaddr) != 0) {
342 1.24.6.2 bouyer /*
343 1.24.6.2 bouyer * We start out with the 2114x ISV media switch.
344 1.24.6.2 bouyer * When we search for quirks, we may change to
345 1.24.6.2 bouyer * a different switch.
346 1.24.6.2 bouyer */
347 1.24.6.2 bouyer sc->sc_mediasw = &tlp_2114x_isv_mediasw;
348 1.24.6.2 bouyer } else if (tlp_parse_old_srom(sc, enaddr) == 0) {
349 1.24.6.2 bouyer /*
350 1.24.6.2 bouyer * Not an ISV SROM, and not in old DEC Address
351 1.24.6.2 bouyer * ROM format. Try to snarf it out of the CIS.
352 1.24.6.2 bouyer */
353 1.24.6.2 bouyer if (ca->ca_cis.funce.network.netid_present == 0)
354 1.24.6.2 bouyer goto cant_cope;
355 1.24.6.2 bouyer
356 1.24.6.2 bouyer /* Grab the MAC address from the CIS. */
357 1.24.6.2 bouyer memcpy(enaddr, ca->ca_cis.funce.network.netid,
358 1.24.6.2 bouyer sizeof(enaddr));
359 1.24.6.2 bouyer }
360 1.24.6.2 bouyer
361 1.24.6.2 bouyer /* XXX XXX XXX QUIRKS XXX XXX XXX */
362 1.24.6.2 bouyer
363 1.24.6.2 bouyer /*
364 1.24.6.2 bouyer * If we don't already have a media switch, default to
365 1.24.6.2 bouyer * MII-over-SIO, with no special reset routine.
366 1.24.6.2 bouyer */
367 1.24.6.2 bouyer if (sc->sc_mediasw == NULL) {
368 1.24.6.2 bouyer printf("%s: defaulting to MII-over-SIO; no bets...\n",
369 1.24.6.2 bouyer sc->sc_dev.dv_xname);
370 1.24.6.2 bouyer sc->sc_mediasw = &tlp_sio_mii_mediasw;
371 1.24.6.2 bouyer }
372 1.24.6.2 bouyer break;
373 1.24.6.2 bouyer
374 1.24.6.3 bouyer case TULIP_CHIP_AN983:
375 1.24.6.3 bouyer case TULIP_CHIP_AN985:
376 1.24.6.3 bouyer /*
377 1.24.6.3 bouyer * The ADMtek AN985's Ethernet address is located
378 1.24.6.3 bouyer * at offset 8 of its EEPROM.
379 1.24.6.3 bouyer */
380 1.24.6.3 bouyer memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN);
381 1.24.6.3 bouyer
382 1.24.6.3 bouyer /*
383 1.24.6.3 bouyer * The ADMtek AN985 can be configured in Single-Chip
384 1.24.6.3 bouyer * mode or MAC-only mode. Single-Chip uses the built-in
385 1.24.6.3 bouyer * PHY, MAC-only has an external PHY (usually HomePNA).
386 1.24.6.3 bouyer * The selection is based on an EEPROM setting, and both
387 1.24.6.3 bouyer * PHYs are access via MII attached to SIO.
388 1.24.6.3 bouyer *
389 1.24.6.3 bouyer * The AN985 "ghosts" the internal PHY onto all
390 1.24.6.3 bouyer * MII addresses, so we have to use a media init
391 1.24.6.3 bouyer * routine that limits the search.
392 1.24.6.3 bouyer * XXX How does this work with MAC-only mode?
393 1.24.6.3 bouyer */
394 1.24.6.3 bouyer sc->sc_mediasw = &tlp_an985_mediasw;
395 1.24.6.3 bouyer break;
396 1.24.6.3 bouyer
397 1.24.6.2 bouyer case TULIP_CHIP_X3201_3:
398 1.24.6.2 bouyer /*
399 1.24.6.2 bouyer * The X3201 doesn't have an SROM. Lift the MAC address
400 1.24.6.2 bouyer * from the CIS. Also, we have a special media switch:
401 1.24.6.2 bouyer * MII-on-SIO, plus some special GPIO setup.
402 1.24.6.2 bouyer */
403 1.24.6.2 bouyer memcpy(enaddr, ca->ca_cis.funce.network.netid, sizeof(enaddr));
404 1.24.6.2 bouyer sc->sc_reset = tlp_cardbus_x3201_reset;
405 1.24.6.2 bouyer sc->sc_mediasw = &tlp_sio_mii_mediasw;
406 1.24.6.2 bouyer break;
407 1.24.6.2 bouyer
408 1.24.6.2 bouyer default:
409 1.24.6.2 bouyer cant_cope:
410 1.24.6.2 bouyer printf("%s: sorry, unable to handle your board\n",
411 1.24.6.2 bouyer sc->sc_dev.dv_xname);
412 1.24.6.2 bouyer return;
413 1.24.6.2 bouyer }
414 1.24.6.2 bouyer
415 1.24.6.2 bouyer /* Remember which interrupt line. */
416 1.24.6.2 bouyer csc->sc_intrline = ca->ca_intrline;
417 1.24.6.2 bouyer
418 1.24.6.2 bouyer /*
419 1.24.6.2 bouyer * The CardBus cards will make it to store-and-forward mode as
420 1.24.6.2 bouyer * soon as you put them under any kind of load, so just start
421 1.24.6.2 bouyer * out there.
422 1.24.6.2 bouyer */
423 1.24.6.2 bouyer sc->sc_txthresh = TXTH_SF;
424 1.24.6.2 bouyer
425 1.24.6.2 bouyer /*
426 1.24.6.2 bouyer * Finish off the attach.
427 1.24.6.2 bouyer */
428 1.24.6.2 bouyer tlp_attach(sc, enaddr);
429 1.24.6.2 bouyer
430 1.24.6.2 bouyer /*
431 1.24.6.2 bouyer * Power down the socket.
432 1.24.6.2 bouyer */
433 1.24.6.2 bouyer Cardbus_function_disable(csc->sc_ct);
434 1.24.6.2 bouyer }
435 1.24.6.2 bouyer
436 1.24.6.2 bouyer int
437 1.24.6.2 bouyer tlp_cardbus_detach(self, flags)
438 1.24.6.2 bouyer struct device *self;
439 1.24.6.2 bouyer int flags;
440 1.24.6.2 bouyer {
441 1.24.6.2 bouyer struct tulip_cardbus_softc *csc = (void *)self;
442 1.24.6.2 bouyer struct tulip_softc *sc = &csc->sc_tulip;
443 1.24.6.2 bouyer struct cardbus_devfunc *ct = csc->sc_ct;
444 1.24.6.2 bouyer int rv;
445 1.24.6.2 bouyer
446 1.24.6.2 bouyer #if defined(DIAGNOSTIC)
447 1.24.6.2 bouyer if (ct == NULL)
448 1.24.6.2 bouyer panic("%s: data structure lacks\n", sc->sc_dev.dv_xname);
449 1.24.6.2 bouyer #endif
450 1.24.6.2 bouyer
451 1.24.6.2 bouyer rv = tlp_detach(sc);
452 1.24.6.2 bouyer if (rv)
453 1.24.6.2 bouyer return (rv);
454 1.24.6.2 bouyer
455 1.24.6.2 bouyer /*
456 1.24.6.2 bouyer * Unhook the interrupt handler.
457 1.24.6.2 bouyer */
458 1.24.6.2 bouyer if (csc->sc_ih != NULL)
459 1.24.6.2 bouyer cardbus_intr_disestablish(ct->ct_cc, ct->ct_cf, csc->sc_ih);
460 1.24.6.2 bouyer
461 1.24.6.2 bouyer /*
462 1.24.6.2 bouyer * Release bus space and close window.
463 1.24.6.2 bouyer */
464 1.24.6.2 bouyer if (csc->sc_bar_reg != 0)
465 1.24.6.2 bouyer Cardbus_mapreg_unmap(ct, csc->sc_bar_reg,
466 1.24.6.2 bouyer sc->sc_st, sc->sc_sh, csc->sc_mapsize);
467 1.24.6.2 bouyer
468 1.24.6.2 bouyer return (0);
469 1.24.6.2 bouyer }
470 1.24.6.2 bouyer
471 1.24.6.2 bouyer int
472 1.24.6.2 bouyer tlp_cardbus_enable(sc)
473 1.24.6.2 bouyer struct tulip_softc *sc;
474 1.24.6.2 bouyer {
475 1.24.6.2 bouyer struct tulip_cardbus_softc *csc = (void *) sc;
476 1.24.6.2 bouyer cardbus_devfunc_t ct = csc->sc_ct;
477 1.24.6.2 bouyer cardbus_chipset_tag_t cc = ct->ct_cc;
478 1.24.6.2 bouyer cardbus_function_tag_t cf = ct->ct_cf;
479 1.24.6.2 bouyer
480 1.24.6.2 bouyer /*
481 1.24.6.2 bouyer * Power on the socket.
482 1.24.6.2 bouyer */
483 1.24.6.2 bouyer Cardbus_function_enable(ct);
484 1.24.6.2 bouyer
485 1.24.6.2 bouyer /*
486 1.24.6.2 bouyer * Set up the PCI configuration registers.
487 1.24.6.2 bouyer */
488 1.24.6.2 bouyer tlp_cardbus_setup(csc);
489 1.24.6.2 bouyer
490 1.24.6.2 bouyer /*
491 1.24.6.2 bouyer * Map and establish the interrupt.
492 1.24.6.2 bouyer */
493 1.24.6.2 bouyer csc->sc_ih = cardbus_intr_establish(cc, cf, csc->sc_intrline, IPL_NET,
494 1.24.6.2 bouyer tlp_intr, sc);
495 1.24.6.2 bouyer if (csc->sc_ih == NULL) {
496 1.24.6.2 bouyer printf("%s: unable to establish interrupt at %d\n",
497 1.24.6.2 bouyer sc->sc_dev.dv_xname, csc->sc_intrline);
498 1.24.6.2 bouyer Cardbus_function_disable(csc->sc_ct);
499 1.24.6.2 bouyer return (1);
500 1.24.6.2 bouyer }
501 1.24.6.2 bouyer printf("%s: interrupting at %d\n", sc->sc_dev.dv_xname,
502 1.24.6.2 bouyer csc->sc_intrline);
503 1.24.6.2 bouyer
504 1.24.6.2 bouyer return (0);
505 1.24.6.2 bouyer }
506 1.24.6.2 bouyer
507 1.24.6.2 bouyer void
508 1.24.6.2 bouyer tlp_cardbus_disable(sc)
509 1.24.6.2 bouyer struct tulip_softc *sc;
510 1.24.6.2 bouyer {
511 1.24.6.2 bouyer struct tulip_cardbus_softc *csc = (void *) sc;
512 1.24.6.2 bouyer cardbus_devfunc_t ct = csc->sc_ct;
513 1.24.6.2 bouyer cardbus_chipset_tag_t cc = ct->ct_cc;
514 1.24.6.2 bouyer cardbus_function_tag_t cf = ct->ct_cf;
515 1.24.6.2 bouyer
516 1.24.6.2 bouyer /* Unhook the interrupt handler. */
517 1.24.6.2 bouyer cardbus_intr_disestablish(cc, cf, csc->sc_ih);
518 1.24.6.2 bouyer csc->sc_ih = NULL;
519 1.24.6.2 bouyer
520 1.24.6.2 bouyer /* Power down the socket. */
521 1.24.6.2 bouyer Cardbus_function_disable(ct);
522 1.24.6.2 bouyer }
523 1.24.6.2 bouyer
524 1.24.6.2 bouyer void
525 1.24.6.2 bouyer tlp_cardbus_power(sc, why)
526 1.24.6.2 bouyer struct tulip_softc *sc;
527 1.24.6.2 bouyer int why;
528 1.24.6.2 bouyer {
529 1.24.6.2 bouyer struct tulip_cardbus_softc *csc = (void *) sc;
530 1.24.6.2 bouyer
531 1.24.6.2 bouyer if (why == PWR_RESUME) {
532 1.24.6.2 bouyer /*
533 1.24.6.2 bouyer * Give the PCI configuration registers a kick
534 1.24.6.2 bouyer * in the head.
535 1.24.6.2 bouyer */
536 1.24.6.2 bouyer #ifdef DIAGNOSTIC
537 1.24.6.2 bouyer if (TULIP_IS_ENABLED(sc) == 0)
538 1.24.6.2 bouyer panic("tlp_cardbus_power");
539 1.24.6.2 bouyer #endif
540 1.24.6.2 bouyer tlp_cardbus_setup(csc);
541 1.24.6.2 bouyer }
542 1.24.6.2 bouyer }
543 1.24.6.2 bouyer
544 1.24.6.2 bouyer void
545 1.24.6.2 bouyer tlp_cardbus_setup(csc)
546 1.24.6.2 bouyer struct tulip_cardbus_softc *csc;
547 1.24.6.2 bouyer {
548 1.24.6.2 bouyer struct tulip_softc *sc = &csc->sc_tulip;
549 1.24.6.2 bouyer cardbus_devfunc_t ct = csc->sc_ct;
550 1.24.6.2 bouyer cardbus_chipset_tag_t cc = ct->ct_cc;
551 1.24.6.2 bouyer cardbus_function_tag_t cf = ct->ct_cf;
552 1.24.6.2 bouyer pcireg_t reg;
553 1.24.6.2 bouyer int pmreg;
554 1.24.6.2 bouyer
555 1.24.6.2 bouyer /*
556 1.24.6.2 bouyer * Check to see if the device is in power-save mode, and
557 1.24.6.2 bouyer * bring it out if necessary.
558 1.24.6.2 bouyer */
559 1.24.6.2 bouyer switch (sc->sc_chip) {
560 1.24.6.2 bouyer case TULIP_CHIP_21142:
561 1.24.6.2 bouyer case TULIP_CHIP_21143:
562 1.24.6.2 bouyer case TULIP_CHIP_X3201_3:
563 1.24.6.2 bouyer /*
564 1.24.6.2 bouyer * Clear the "sleep mode" bit in the CFDA register.
565 1.24.6.2 bouyer */
566 1.24.6.2 bouyer reg = cardbus_conf_read(cc, cf, csc->sc_tag, TULIP_PCI_CFDA);
567 1.24.6.2 bouyer if (reg & (CFDA_SLEEP|CFDA_SNOOZE))
568 1.24.6.2 bouyer cardbus_conf_write(cc, cf, csc->sc_tag, TULIP_PCI_CFDA,
569 1.24.6.2 bouyer reg & ~(CFDA_SLEEP|CFDA_SNOOZE));
570 1.24.6.2 bouyer break;
571 1.24.6.2 bouyer
572 1.24.6.2 bouyer default:
573 1.24.6.2 bouyer /* Nothing. */
574 1.24.6.2 bouyer }
575 1.24.6.2 bouyer
576 1.24.6.2 bouyer if (cardbus_get_capability(cc, cf, csc->sc_tag,
577 1.24.6.2 bouyer PCI_CAP_PWRMGMT, &pmreg, 0)) {
578 1.24.6.2 bouyer reg = cardbus_conf_read(cc, cf, csc->sc_tag, pmreg + 4) & 0x03;
579 1.24.6.2 bouyer #if 1 /* XXX Probably not right for CardBus. */
580 1.24.6.2 bouyer if (reg == 3) {
581 1.24.6.2 bouyer /*
582 1.24.6.2 bouyer * The card has lost all configuration data in
583 1.24.6.2 bouyer * this state, so punt.
584 1.24.6.2 bouyer */
585 1.24.6.2 bouyer printf("%s: unable to wake up from power state D3\n",
586 1.24.6.2 bouyer sc->sc_dev.dv_xname);
587 1.24.6.2 bouyer return;
588 1.24.6.2 bouyer }
589 1.24.6.2 bouyer #endif
590 1.24.6.2 bouyer if (reg != 0) {
591 1.24.6.2 bouyer printf("%s: waking up from power state D%d\n",
592 1.24.6.2 bouyer sc->sc_dev.dv_xname, reg);
593 1.24.6.2 bouyer cardbus_conf_write(cc, cf, csc->sc_tag,
594 1.24.6.2 bouyer pmreg + 4, 0);
595 1.24.6.2 bouyer }
596 1.24.6.2 bouyer }
597 1.24.6.2 bouyer
598 1.24.6.2 bouyer /* Make sure the right access type is on the CardBus bridge. */
599 1.24.6.2 bouyer (*ct->ct_cf->cardbus_ctrl)(cc, csc->sc_cben);
600 1.24.6.2 bouyer (*ct->ct_cf->cardbus_ctrl)(cc, CARDBUS_BM_ENABLE);
601 1.24.6.2 bouyer
602 1.24.6.2 bouyer /* Program the BAR. */
603 1.24.6.2 bouyer cardbus_conf_write(cc, cf, csc->sc_tag, csc->sc_bar_reg,
604 1.24.6.2 bouyer csc->sc_bar_val);
605 1.24.6.2 bouyer
606 1.24.6.2 bouyer /* Enable the appropriate bits in the PCI CSR. */
607 1.24.6.2 bouyer reg = cardbus_conf_read(cc, cf, csc->sc_tag, PCI_COMMAND_STATUS_REG);
608 1.24.6.2 bouyer reg &= ~(PCI_COMMAND_IO_ENABLE|PCI_COMMAND_MEM_ENABLE);
609 1.24.6.2 bouyer reg |= csc->sc_csr;
610 1.24.6.2 bouyer cardbus_conf_write(cc, cf, csc->sc_tag, PCI_COMMAND_STATUS_REG, reg);
611 1.24.6.2 bouyer
612 1.24.6.2 bouyer /*
613 1.24.6.2 bouyer * Make sure the latency timer is set to some reasonable
614 1.24.6.2 bouyer * value.
615 1.24.6.2 bouyer */
616 1.24.6.2 bouyer reg = cardbus_conf_read(cc, cf, csc->sc_tag, PCI_BHLC_REG);
617 1.24.6.2 bouyer if (PCI_LATTIMER(reg) < 0x20) {
618 1.24.6.2 bouyer reg &= ~(PCI_LATTIMER_MASK << PCI_LATTIMER_SHIFT);
619 1.24.6.2 bouyer reg |= (0x20 << PCI_LATTIMER_SHIFT);
620 1.24.6.2 bouyer cardbus_conf_write(cc, cf, csc->sc_tag, PCI_BHLC_REG, reg);
621 1.24.6.2 bouyer }
622 1.24.6.2 bouyer }
623 1.24.6.2 bouyer
624 1.24.6.2 bouyer void
625 1.24.6.2 bouyer tlp_cardbus_x3201_reset(sc)
626 1.24.6.2 bouyer struct tulip_softc *sc;
627 1.24.6.2 bouyer {
628 1.24.6.2 bouyer u_int32_t reg;
629 1.24.6.2 bouyer
630 1.24.6.2 bouyer reg = TULIP_READ(sc, CSR_SIAGEN);
631 1.24.6.2 bouyer
632 1.24.6.2 bouyer /* make GP[2,0] outputs */
633 1.24.6.2 bouyer TULIP_WRITE(sc, CSR_SIAGEN, (reg & ~SIAGEN_MD) | SIAGEN_CWE |
634 1.24.6.2 bouyer 0x00050000);
635 1.24.6.2 bouyer TULIP_WRITE(sc, CSR_SIAGEN, (reg & ~SIAGEN_CWE) | SIAGEN_MD);
636 1.24.6.2 bouyer }
637