if_tlp_cardbus.c revision 1.11 1 /* $NetBSD: if_tlp_cardbus.c,v 1.11 2000/02/01 22:54:47 thorpej Exp $ */
2
3 /*-
4 * Copyright (c) 1999, 2000 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 * NASA Ames Research Center.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by the NetBSD
22 * Foundation, Inc. and its contributors.
23 * 4. Neither the name of The NetBSD Foundation nor the names of its
24 * contributors may be used to endorse or promote products derived
25 * from this software without specific prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 * POSSIBILITY OF SUCH DAMAGE.
38 */
39
40 /*
41 * CardBus bus front-end for the Digital Semiconductor ``Tulip'' (21x4x)
42 * Ethernet controller family driver.
43 *
44 * TODO:
45 *
46 * - power management
47 */
48
49 #include "opt_inet.h"
50 #include "opt_ns.h"
51 #include "bpfilter.h"
52
53 #include <sys/param.h>
54 #include <sys/systm.h>
55 #include <sys/mbuf.h>
56 #include <sys/malloc.h>
57 #include <sys/kernel.h>
58 #include <sys/socket.h>
59 #include <sys/ioctl.h>
60 #include <sys/errno.h>
61 #include <sys/device.h>
62
63 #include <machine/endian.h>
64
65 #include <net/if.h>
66 #include <net/if_dl.h>
67 #include <net/if_media.h>
68 #include <net/if_ether.h>
69
70 #if NBPFILTER > 0
71 #include <net/bpf.h>
72 #endif
73
74 #ifdef INET
75 #include <netinet/in.h>
76 #include <netinet/if_inarp.h>
77 #endif
78
79 #ifdef NS
80 #include <netns/ns.h>
81 #include <netns/ns_if.h>
82 #endif
83
84 #include <machine/bus.h>
85 #include <machine/intr.h>
86
87 #include <dev/mii/miivar.h>
88 #include <dev/mii/mii_bitbang.h>
89
90 #include <dev/ic/tulipreg.h>
91 #include <dev/ic/tulipvar.h>
92
93 #include <dev/pci/pcivar.h>
94 #include <dev/pci/pcireg.h>
95 #include <dev/pci/pcidevs.h>
96
97 #include <dev/cardbus/cardbusvar.h>
98
99 /*
100 * PCI configuration space registers used by the Tulip.
101 */
102 #define TULIP_PCI_IOBA 0x10 /* i/o mapped base */
103 #define TULIP_PCI_MMBA 0x14 /* memory mapped base */
104 #define TULIP_PCI_CFDA 0x40 /* configuration driver area */
105
106 #define CFDA_SLEEP 0x80000000 /* sleep mode */
107 #define CFDA_SNOOZE 0x40000000 /* snooze mode */
108
109 struct tulip_cardbus_softc {
110 struct tulip_softc sc_tulip; /* real Tulip softc */
111
112 /* CardBus-specific goo. */
113 void *sc_ih; /* interrupt handle */
114
115 cardbus_devfunc_t sc_ct; /* our CardBus devfuncs */
116 int sc_intrline; /* our interrupt line */
117 cardbustag_t sc_tag;
118
119 int sc_cbenable; /* what CardBus access type to enable */
120 int sc_csr; /* CSR bits */
121 };
122
123 int tlp_cardbus_match __P((struct device *, struct cfdata *, void *));
124 void tlp_cardbus_attach __P((struct device *, struct device *, void *));
125 int tlp_cardbus_detach __P((struct device *, int));
126
127 struct cfattach tlp_cardbus_ca = {
128 sizeof(struct tulip_cardbus_softc),
129 tlp_cardbus_match, tlp_cardbus_attach,
130 tlp_cardbus_detach, tlp_activate,
131 };
132
133 const struct tulip_cardbus_product {
134 u_int32_t tcp_vendor; /* PCI vendor ID */
135 u_int32_t tcp_product; /* PCI product ID */
136 tulip_chip_t tcp_chip; /* base Tulip chip type */
137 int tcp_pmreg; /* power management register offset */
138 } tlp_cardbus_products[] = {
139 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21142,
140 TULIP_CHIP_21142, 0xe0 },
141
142 { PCI_VENDOR_XIRCOM, PCI_PRODUCT_XIRCOM_X3201_3_21143,
143 TULIP_CHIP_X3201_3, 0xe0 },
144
145 { 0, 0,
146 TULIP_CHIP_INVALID, 0 },
147 };
148
149 void tlp_cardbus_x3201_reset __P((struct tulip_softc *));
150
151 const struct tulip_cardbus_product *tlp_cardbus_lookup
152 __P((const struct cardbus_attach_args *));
153
154 const struct tulip_cardbus_product *
155 tlp_cardbus_lookup(ca)
156 const struct cardbus_attach_args *ca;
157 {
158 const struct tulip_cardbus_product *tcp;
159
160 for (tcp = tlp_cardbus_products;
161 tlp_chip_names[tcp->tcp_chip] != NULL;
162 tcp++) {
163 if (PCI_VENDOR(ca->ca_id) == tcp->tcp_vendor &&
164 PCI_PRODUCT(ca->ca_id) == tcp->tcp_product)
165 return (tcp);
166 }
167 return (NULL);
168 }
169
170 int
171 tlp_cardbus_match(parent, match, aux)
172 struct device *parent;
173 struct cfdata *match;
174 void *aux;
175 {
176 struct cardbus_attach_args *ca = aux;
177
178 if (tlp_cardbus_lookup(ca) != NULL)
179 return (1);
180
181 return (0);
182 }
183
184 void
185 tlp_cardbus_attach(parent, self, aux)
186 struct device *parent, *self;
187 void *aux;
188 {
189 struct tulip_cardbus_softc *csc = (void *) self;
190 struct tulip_softc *sc = &csc->sc_tulip;
191 struct cardbus_attach_args *ca = aux;
192 cardbus_devfunc_t ct = ca->ca_ct;
193 cardbus_chipset_tag_t cc = ct->ct_cc;
194 cardbus_function_tag_t cf = ct->ct_cf;
195 const struct tulip_cardbus_product *tcp;
196 u_int8_t enaddr[ETHER_ADDR_LEN];
197 pcireg_t reg;
198
199 sc->sc_devno = ca->ca_device;
200 sc->sc_dmat = ca->ca_dmat;
201 csc->sc_ct = ct;
202 csc->sc_tag = ca->ca_tag;
203 csc->sc_intrline = ca->ca_intrline;
204
205 tcp = tlp_cardbus_lookup(ca);
206 if (tcp == NULL) {
207 printf("\n");
208 panic("tlp_cardbus_attach: impossible");
209 }
210 sc->sc_chip = tcp->tcp_chip;
211
212 /*
213 * By default, Tulip registers are 8 bytes long (4 bytes
214 * followed by a 4 byte pad).
215 */
216 sc->sc_regshift = 3;
217
218 /*
219 * Some chips have a 128 byte SROM (6 address bits), and some
220 * have a 512 byte SROM (8 address bits). Default to 6; we'll
221 * adjust below.
222 */
223 sc->sc_srom_addrbits = 6;
224
225 /*
226 * Get revision info, and set some chip-specific variables.
227 */
228 sc->sc_rev = PCI_REVISION(ca->ca_class);
229 switch (sc->sc_chip) {
230 case TULIP_CHIP_21142:
231 if (sc->sc_rev >= 0x20)
232 sc->sc_chip = TULIP_CHIP_21143;
233 if (sc->sc_rev >= 0x41) {
234 /*
235 * 21143 rev. 4.1 has a larger SROM.
236 */
237 sc->sc_srom_addrbits = 8;
238 }
239 break;
240
241 default:
242 /* Nothing. */
243 }
244
245 printf(": %s Ethernet, pass %d.%d\n",
246 tlp_chip_names[sc->sc_chip],
247 (sc->sc_rev >> 4) & 0xf, sc->sc_rev & 0xf);
248
249 /*
250 * Check to see if the device is in power-save mode, and
251 * bring it out if necessary.
252 */
253 switch (sc->sc_chip) {
254 case TULIP_CHIP_21142:
255 case TULIP_CHIP_21143:
256 case TULIP_CHIP_X3201_3:
257 /*
258 * Clear the "sleep mode" bit in the CFDA register.
259 */
260 reg = cardbus_conf_read(cc, cf, ca->ca_tag, TULIP_PCI_CFDA);
261 if (reg & (CFDA_SLEEP|CFDA_SNOOZE))
262 cardbus_conf_write(cc, cf, ca->ca_tag, TULIP_PCI_CFDA,
263 reg & ~(CFDA_SLEEP|CFDA_SNOOZE));
264 break;
265
266 default:
267 /* Nothing. */
268 }
269
270 if (cardbus_get_capability(cc, cf, ca->ca_tag, PCI_CAP_PWRMGMT, 0, 0)) {
271 if (tcp->tcp_pmreg == 0) {
272 printf("%s: don't know location of PMCSR for this "
273 "chip\n", sc->sc_dev.dv_xname);
274 return;
275 }
276 reg = cardbus_conf_read(cc, cf, ca->ca_tag,
277 tcp->tcp_pmreg) & 0x03;
278 #if 1 /* XXX Probably not right for CardBus. */
279 if (reg == 3) {
280 /*
281 * The card has lost all configuration data in
282 * this state, so punt.
283 */
284 printf("%s: unable to wake up from power state D3\n",
285 sc->sc_dev.dv_xname);
286 return;
287 }
288 #endif
289 if (reg != 0) {
290 printf("%s: waking up from power state D%d\n",
291 sc->sc_dev.dv_xname, reg);
292 cardbus_conf_write(cc, cf, ca->ca_tag,
293 tcp->tcp_pmreg, 0);
294 }
295 }
296
297 /*
298 * Map the device.
299 */
300 csc->sc_csr = PCI_COMMAND_MASTER_ENABLE;
301 if (Cardbus_mapreg_map(csc->sc_ct, TULIP_PCI_MMBA,
302 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0,
303 &sc->sc_st, &sc->sc_sh, NULL, NULL) == 0) {
304 csc->sc_cbenable = CARDBUS_MEM_ENABLE;
305 csc->sc_csr |= PCI_COMMAND_MEM_ENABLE;
306 } else if (Cardbus_mapreg_map(csc->sc_ct, TULIP_PCI_IOBA,
307 PCI_MAPREG_TYPE_IO, 0, &sc->sc_st, &sc->sc_sh, NULL, NULL) == 0) {
308 csc->sc_cbenable = CARDBUS_IO_ENABLE;
309 csc->sc_csr |= PCI_COMMAND_IO_ENABLE;
310 } else {
311 printf("%s: unable to map device registers\n",
312 sc->sc_dev.dv_xname);
313 return;
314 }
315
316 /* Make sure the right access type is on the CardBus bridge. */
317 (*ct->ct_cf->cardbus_ctrl)(cc, csc->sc_cbenable);
318 (*ct->ct_cf->cardbus_ctrl)(cc, CARDBUS_BM_ENABLE);
319
320 /* Enable the appropriate bits in the PCI CSR. */
321 reg = cardbus_conf_read(cc, cf, ca->ca_tag, PCI_COMMAND_STATUS_REG);
322 reg &= ~(PCI_COMMAND_IO_ENABLE|PCI_COMMAND_MEM_ENABLE);
323 reg |= csc->sc_csr;
324 cardbus_conf_write(cc, cf, ca->ca_tag, PCI_COMMAND_STATUS_REG, reg);
325
326 /*
327 * Make sure the latency timer is set to some reasonable
328 * value.
329 */
330 reg = cardbus_conf_read(cc, cf, ca->ca_tag, PCI_BHLC_REG);
331 if (PCI_LATTIMER(reg) < 0x20) {
332 reg &= ~(PCI_LATTIMER_MASK << PCI_LATTIMER_SHIFT);
333 reg |= (0x20 << PCI_LATTIMER_SHIFT);
334 cardbus_conf_write(cc, cf, ca->ca_tag, PCI_BHLC_REG, reg);
335 }
336
337 /*
338 * Read the contents of the Ethernet Address ROM/SROM.
339 */
340 memset(sc->sc_srom, 0, sizeof(sc->sc_srom));
341 switch (sc->sc_chip) {
342 case TULIP_CHIP_X3201_3:
343 /*
344 * No SROM on this chip.
345 */
346 break;
347
348 default:
349 tlp_read_srom(sc, 0, TULIP_ROM_SIZE(sc->sc_srom_addrbits) >> 1,
350 sc->sc_srom);
351 #if 0
352 {
353 int i;
354
355 printf("SROM CONTENTS:");
356 for (i = 0; i <
357 TULIP_ROM_SIZE(sc->sc_srom_addrbits); i++) {
358 if ((i % 8) == 0)
359 printf("\n\t");
360 printf("0x%02x ", sc->sc_srom[i]);
361 }
362 printf("\n");
363 }
364 #endif
365 }
366
367 /*
368 * Deal with chip/board quirks. This includes setting up
369 * the mediasw, and extracting the Ethernet address from
370 * the rombuf.
371 */
372 switch (sc->sc_chip) {
373 case TULIP_CHIP_21142:
374 case TULIP_CHIP_21143:
375 /* Check for new format SROM. */
376 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) {
377 /*
378 * Not an ISV SROM; can't cope, for now.
379 */
380 goto cant_cope;
381 } else {
382 /*
383 * We start out with the 2114x ISV media switch.
384 * When we search for quirks, we may change to
385 * a different switch.
386 */
387 sc->sc_mediasw = &tlp_2114x_isv_mediasw;
388 }
389
390 /*
391 * Bail out now if we can't deal with this board.
392 */
393 if (sc->sc_mediasw == NULL)
394 goto cant_cope;
395 break;
396
397 case TULIP_CHIP_X3201_3:
398 /*
399 * The X3201 doens't have an SROM. Lift the MAC address
400 * from the CIS. Also, we have a special media switch:
401 * MII-on-SIO, plus some special GPIO setup.
402 */
403 memcpy(enaddr, ca->ca_cis.funce.network.netid, sizeof(enaddr));
404 sc->sc_reset = tlp_cardbus_x3201_reset;
405 sc->sc_mediasw = &tlp_sio_mii_mediasw;
406 break;
407
408 default:
409 cant_cope:
410 printf("%s: sorry, unable to handle your board\n",
411 sc->sc_dev.dv_xname);
412 return;
413 }
414
415 /*
416 * Map and establish the interrupt.
417 */
418 csc->sc_ih = cardbus_intr_establish(cc, cf, ca->ca_intrline, IPL_NET,
419 tlp_intr, sc);
420 if (csc->sc_ih == NULL) {
421 printf("%s: unable to establish interrupt at %d\n",
422 sc->sc_dev.dv_xname, ca->ca_intrline);
423 return;
424 }
425 printf("%s: interrupting at %d\n", sc->sc_dev.dv_xname,
426 ca->ca_intrline);
427
428 /*
429 * Finish off the attach.
430 */
431 tlp_attach(sc, enaddr);
432 }
433
434 int
435 tlp_cardbus_detach(self, flags)
436 struct device *self;
437 int flags;
438 {
439 struct tulip_cardbus_softc *csc = (void *) self;
440 struct tulip_softc *sc = &csc->sc_tulip;
441 int rv;
442
443 rv = tlp_detach(sc);
444 if (rv == 0) {
445 /*
446 * Unhook the interrupt handler.
447 */
448 cardbus_intr_disestablish(csc->sc_ct->ct_cc,
449 csc->sc_ct->ct_cf, csc->sc_ih);
450 }
451 return (rv);
452 }
453
454 void
455 tlp_cardbus_x3201_reset(sc)
456 struct tulip_softc *sc;
457 {
458 u_int32_t reg;
459
460 reg = TULIP_READ(sc, CSR_SIAGEN);
461
462 /* make GP[2,0] outputs */
463 TULIP_WRITE(sc, CSR_SIAGEN, (reg & ~SIAGEN_MD) | SIAGEN_CWE |
464 0x00050000);
465 TULIP_WRITE(sc, CSR_SIAGEN, (reg & ~SIAGEN_CWE) | SIAGEN_MD);
466 }
467