if_tlp_cardbus.c revision 1.20 1 /* $NetBSD: if_tlp_cardbus.c,v 1.20 2000/03/15 18:39:52 thorpej Exp $ */
2
3 /*-
4 * Copyright (c) 1999, 2000 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 * NASA Ames Research Center.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by the NetBSD
22 * Foundation, Inc. and its contributors.
23 * 4. Neither the name of The NetBSD Foundation nor the names of its
24 * contributors may be used to endorse or promote products derived
25 * from this software without specific prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 * POSSIBILITY OF SUCH DAMAGE.
38 */
39
40 /*
41 * CardBus bus front-end for the Digital Semiconductor ``Tulip'' (21x4x)
42 * Ethernet controller family driver.
43 */
44
45 #include "opt_inet.h"
46 #include "opt_ns.h"
47 #include "bpfilter.h"
48
49 #include <sys/param.h>
50 #include <sys/systm.h>
51 #include <sys/mbuf.h>
52 #include <sys/malloc.h>
53 #include <sys/kernel.h>
54 #include <sys/socket.h>
55 #include <sys/ioctl.h>
56 #include <sys/errno.h>
57 #include <sys/device.h>
58
59 #include <machine/endian.h>
60
61 #include <net/if.h>
62 #include <net/if_dl.h>
63 #include <net/if_media.h>
64 #include <net/if_ether.h>
65
66 #if NBPFILTER > 0
67 #include <net/bpf.h>
68 #endif
69
70 #ifdef INET
71 #include <netinet/in.h>
72 #include <netinet/if_inarp.h>
73 #endif
74
75 #ifdef NS
76 #include <netns/ns.h>
77 #include <netns/ns_if.h>
78 #endif
79
80 #include <machine/bus.h>
81 #include <machine/intr.h>
82
83 #include <dev/mii/miivar.h>
84 #include <dev/mii/mii_bitbang.h>
85
86 #include <dev/ic/tulipreg.h>
87 #include <dev/ic/tulipvar.h>
88
89 #include <dev/pci/pcivar.h>
90 #include <dev/pci/pcireg.h>
91 #include <dev/pci/pcidevs.h>
92
93 #include <dev/cardbus/cardbusvar.h>
94
95 /*
96 * PCI configuration space registers used by the Tulip.
97 */
98 #define TULIP_PCI_IOBA 0x10 /* i/o mapped base */
99 #define TULIP_PCI_MMBA 0x14 /* memory mapped base */
100 #define TULIP_PCI_CFDA 0x40 /* configuration driver area */
101
102 #define CFDA_SLEEP 0x80000000 /* sleep mode */
103 #define CFDA_SNOOZE 0x40000000 /* snooze mode */
104
105 struct tulip_cardbus_softc {
106 struct tulip_softc sc_tulip; /* real Tulip softc */
107
108 /* CardBus-specific goo. */
109 void *sc_ih; /* interrupt handle */
110 cardbus_devfunc_t sc_ct; /* our CardBus devfuncs */
111 cardbustag_t sc_tag; /* our CardBus tag */
112 int sc_csr; /* CSR bits */
113 bus_size_t sc_mapsize; /* the size of mapped bus space
114 region */
115 /* product info */
116 const struct tulip_cardbus_product *sc_product;
117
118 int sc_cben; /* CardBus enables */
119 int sc_bar_reg; /* which BAR to use */
120 pcireg_t sc_bar_val; /* value of the BAR */
121
122 int sc_intrline; /* interrupt line */
123 };
124
125 int tlp_cardbus_match __P((struct device *, struct cfdata *, void *));
126 void tlp_cardbus_attach __P((struct device *, struct device *, void *));
127 int tlp_cardbus_detach __P((struct device *, int));
128
129 struct cfattach tlp_cardbus_ca = {
130 sizeof(struct tulip_cardbus_softc),
131 tlp_cardbus_match, tlp_cardbus_attach,
132 tlp_cardbus_detach, tlp_activate,
133 };
134
135 const struct tulip_cardbus_product {
136 u_int32_t tcp_vendor; /* PCI vendor ID */
137 u_int32_t tcp_product; /* PCI product ID */
138 tulip_chip_t tcp_chip; /* base Tulip chip type */
139 int tcp_pmreg; /* power management register offset */
140 } tlp_cardbus_products[] = {
141 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21142,
142 TULIP_CHIP_21142, 0xe0 },
143
144 { PCI_VENDOR_XIRCOM, PCI_PRODUCT_XIRCOM_X3201_3_21143,
145 TULIP_CHIP_X3201_3, 0xe0 },
146
147 { 0, 0,
148 TULIP_CHIP_INVALID, 0 },
149 };
150
151 void tlp_cardbus_setup __P((struct tulip_cardbus_softc *));
152
153 int tlp_cardbus_enable __P((struct tulip_softc *));
154 void tlp_cardbus_disable __P((struct tulip_softc *));
155
156 void tlp_cardbus_x3201_reset __P((struct tulip_softc *));
157
158 const struct tulip_cardbus_product *tlp_cardbus_lookup
159 __P((const struct cardbus_attach_args *));
160
161 const struct tulip_cardbus_product *
162 tlp_cardbus_lookup(ca)
163 const struct cardbus_attach_args *ca;
164 {
165 const struct tulip_cardbus_product *tcp;
166
167 for (tcp = tlp_cardbus_products;
168 tlp_chip_names[tcp->tcp_chip] != NULL;
169 tcp++) {
170 if (PCI_VENDOR(ca->ca_id) == tcp->tcp_vendor &&
171 PCI_PRODUCT(ca->ca_id) == tcp->tcp_product)
172 return (tcp);
173 }
174 return (NULL);
175 }
176
177 int
178 tlp_cardbus_match(parent, match, aux)
179 struct device *parent;
180 struct cfdata *match;
181 void *aux;
182 {
183 struct cardbus_attach_args *ca = aux;
184
185 if (tlp_cardbus_lookup(ca) != NULL)
186 return (1);
187
188 return (0);
189 }
190
191 void
192 tlp_cardbus_attach(parent, self, aux)
193 struct device *parent, *self;
194 void *aux;
195 {
196 struct tulip_cardbus_softc *csc = (void *)self;
197 struct tulip_softc *sc = &csc->sc_tulip;
198 struct cardbus_attach_args *ca = aux;
199 cardbus_devfunc_t ct = ca->ca_ct;
200 const struct tulip_cardbus_product *tcp;
201 u_int8_t enaddr[ETHER_ADDR_LEN];
202 bus_addr_t adr;
203
204 sc->sc_devno = ca->ca_device;
205 sc->sc_dmat = ca->ca_dmat;
206 csc->sc_ct = ct;
207 csc->sc_tag = ca->ca_tag;
208
209 tcp = tlp_cardbus_lookup(ca);
210 if (tcp == NULL) {
211 printf("\n");
212 panic("tlp_cardbus_attach: impossible");
213 }
214 sc->sc_chip = tcp->tcp_chip;
215 csc->sc_product = tcp;
216
217 /*
218 * By default, Tulip registers are 8 bytes long (4 bytes
219 * followed by a 4 byte pad).
220 */
221 sc->sc_regshift = 3;
222
223 /*
224 * Power management hooks.
225 */
226 sc->sc_enable = tlp_cardbus_enable;
227 sc->sc_disable = tlp_cardbus_disable;
228
229 /*
230 * Get revision info, and set some chip-specific variables.
231 */
232 sc->sc_rev = PCI_REVISION(ca->ca_class);
233 switch (sc->sc_chip) {
234 case TULIP_CHIP_21142:
235 if (sc->sc_rev >= 0x20)
236 sc->sc_chip = TULIP_CHIP_21143;
237 break;
238
239 default:
240 /* Nothing. */
241 }
242
243 printf(": %s Ethernet, pass %d.%d\n",
244 tlp_chip_names[sc->sc_chip],
245 (sc->sc_rev >> 4) & 0xf, sc->sc_rev & 0xf);
246
247 /*
248 * Map the device.
249 */
250 csc->sc_csr = PCI_COMMAND_MASTER_ENABLE;
251 if (Cardbus_mapreg_map(ct, TULIP_PCI_IOBA,
252 PCI_MAPREG_TYPE_IO, 0, &sc->sc_st, &sc->sc_sh, &adr,
253 &csc->sc_mapsize) == 0) {
254 #if rbus
255 #else
256 (*ct->ct_cf->cardbus_io_open)(cc, 0, adr, adr+csc->sc_mapsize);
257 #endif
258 csc->sc_cben = CARDBUS_IO_ENABLE;
259 csc->sc_csr |= PCI_COMMAND_IO_ENABLE;
260 csc->sc_bar_reg = TULIP_PCI_IOBA;
261 csc->sc_bar_val = adr | PCI_MAPREG_TYPE_IO;
262 } else if (Cardbus_mapreg_map(ct, TULIP_PCI_MMBA,
263 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0,
264 &sc->sc_st, &sc->sc_sh, &adr, &csc->sc_mapsize) == 0) {
265 #if rbus
266 #else
267 (*ct->ct_cf->cardbus_mem_open)(cc, 0, adr, adr+csc->sc_mapsize);
268 #endif
269 csc->sc_cben = CARDBUS_MEM_ENABLE;
270 csc->sc_csr |= PCI_COMMAND_MEM_ENABLE;
271 csc->sc_bar_reg = TULIP_PCI_MMBA;
272 csc->sc_bar_val = adr | PCI_MAPREG_TYPE_MEM;
273 } else {
274 printf("%s: unable to map device registers\n",
275 sc->sc_dev.dv_xname);
276 return;
277 }
278
279 /*
280 * Bring the chip out of powersave mode and initialize the
281 * configuration registers.
282 */
283 tlp_cardbus_setup(csc);
284
285 /*
286 * Read the contents of the Ethernet Address ROM/SROM.
287 */
288 switch (sc->sc_chip) {
289 case TULIP_CHIP_X3201_3:
290 /*
291 * No SROM on this chip.
292 */
293 break;
294
295 default:
296 if (tlp_read_srom(sc) == 0)
297 goto cant_cope;
298 break;
299 }
300
301 /*
302 * Deal with chip/board quirks. This includes setting up
303 * the mediasw, and extracting the Ethernet address from
304 * the rombuf.
305 */
306 switch (sc->sc_chip) {
307 case TULIP_CHIP_21142:
308 case TULIP_CHIP_21143:
309 /* Check for new format SROM. */
310 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) {
311 /*
312 * Not an ISV SROM; try the old DEC Ethernet Address
313 * ROM format.
314 */
315 if (tlp_parse_old_srom(sc, enaddr) == 0)
316 goto cant_cope;
317 } else {
318 /*
319 * We start out with the 2114x ISV media switch.
320 * When we search for quirks, we may change to
321 * a different switch.
322 */
323 sc->sc_mediasw = &tlp_2114x_isv_mediasw;
324 }
325
326 /*
327 * Bail out now if we can't deal with this board.
328 */
329 if (sc->sc_mediasw == NULL)
330 goto cant_cope;
331 break;
332
333 case TULIP_CHIP_X3201_3:
334 /*
335 * The X3201 doesn't have an SROM. Lift the MAC address
336 * from the CIS. Also, we have a special media switch:
337 * MII-on-SIO, plus some special GPIO setup.
338 */
339 memcpy(enaddr, ca->ca_cis.funce.network.netid, sizeof(enaddr));
340 sc->sc_reset = tlp_cardbus_x3201_reset;
341 sc->sc_mediasw = &tlp_sio_mii_mediasw;
342 break;
343
344 default:
345 cant_cope:
346 printf("%s: sorry, unable to handle your board\n",
347 sc->sc_dev.dv_xname);
348 return;
349 }
350
351 /* Remember which interrupt line. */
352 csc->sc_intrline = ca->ca_intrline;
353
354 /*
355 * Finish off the attach.
356 */
357 tlp_attach(sc, enaddr);
358
359 /*
360 * Power down the socket.
361 */
362 Cardbus_function_disable(csc->sc_ct);
363 }
364
365 int
366 tlp_cardbus_detach(self, flags)
367 struct device *self;
368 int flags;
369 {
370 struct tulip_cardbus_softc *csc = (void *)self;
371 struct tulip_softc *sc = &csc->sc_tulip;
372 struct cardbus_devfunc *ct = csc->sc_ct;
373 int rv;
374
375 #if defined(DIAGNOSTIC)
376 if (ct == NULL)
377 panic("%s: data structure lacks\n", sc->sc_dev.dv_xname);
378 #endif
379
380 rv = tlp_detach(sc);
381 if (rv)
382 return (rv);
383
384 /*
385 * Unhook the interrupt handler.
386 */
387 if (csc->sc_ih != NULL)
388 cardbus_intr_disestablish(ct->ct_cc, ct->ct_cf, csc->sc_ih);
389
390 /*
391 * Release bus space and close window.
392 */
393 Cardbus_mapreg_unmap(ct, csc->sc_bar_reg, sc->sc_st, sc->sc_sh,
394 csc->sc_mapsize);
395
396 return (0);
397 }
398
399 int
400 tlp_cardbus_enable(sc)
401 struct tulip_softc *sc;
402 {
403 struct tulip_cardbus_softc *csc = (void *) sc;
404 cardbus_devfunc_t ct = csc->sc_ct;
405 cardbus_chipset_tag_t cc = ct->ct_cc;
406 cardbus_function_tag_t cf = ct->ct_cf;
407
408 /*
409 * Power on the socket.
410 */
411 Cardbus_function_enable(ct);
412
413 /*
414 * Set up the PCI configuration registers.
415 */
416 tlp_cardbus_setup(csc);
417
418 /*
419 * Map and establish the interrupt.
420 */
421 csc->sc_ih = cardbus_intr_establish(cc, cf, csc->sc_intrline, IPL_NET,
422 tlp_intr, sc);
423 if (csc->sc_ih == NULL) {
424 printf("%s: unable to establish interrupt at %d\n",
425 sc->sc_dev.dv_xname, csc->sc_intrline);
426 Cardbus_function_disable(csc->sc_ct);
427 return (1);
428 }
429 printf("%s: interrupting at %d\n", sc->sc_dev.dv_xname,
430 csc->sc_intrline);
431
432 return (0);
433 }
434
435 void
436 tlp_cardbus_disable(sc)
437 struct tulip_softc *sc;
438 {
439 struct tulip_cardbus_softc *csc = (void *) sc;
440 cardbus_devfunc_t ct = csc->sc_ct;
441 cardbus_chipset_tag_t cc = ct->ct_cc;
442 cardbus_function_tag_t cf = ct->ct_cf;
443
444 /* Unhook the interrupt handler. */
445 cardbus_intr_disestablish(cc, cf, csc->sc_ih);
446 csc->sc_ih = NULL;
447
448 /* Power down the socket. */
449 Cardbus_function_disable(ct);
450 }
451
452 void
453 tlp_cardbus_setup(csc)
454 struct tulip_cardbus_softc *csc;
455 {
456 struct tulip_softc *sc = &csc->sc_tulip;
457 const struct tulip_cardbus_product *tcp = csc->sc_product;
458 cardbus_devfunc_t ct = csc->sc_ct;
459 cardbus_chipset_tag_t cc = ct->ct_cc;
460 cardbus_function_tag_t cf = ct->ct_cf;
461 pcireg_t reg;
462
463 /*
464 * Check to see if the device is in power-save mode, and
465 * bring it out if necessary.
466 */
467 switch (sc->sc_chip) {
468 case TULIP_CHIP_21142:
469 case TULIP_CHIP_21143:
470 case TULIP_CHIP_X3201_3:
471 /*
472 * Clear the "sleep mode" bit in the CFDA register.
473 */
474 reg = cardbus_conf_read(cc, cf, csc->sc_tag, TULIP_PCI_CFDA);
475 if (reg & (CFDA_SLEEP|CFDA_SNOOZE))
476 cardbus_conf_write(cc, cf, csc->sc_tag, TULIP_PCI_CFDA,
477 reg & ~(CFDA_SLEEP|CFDA_SNOOZE));
478 break;
479
480 default:
481 /* Nothing. */
482 }
483
484 if (cardbus_get_capability(cc, cf, csc->sc_tag,
485 PCI_CAP_PWRMGMT, 0, 0)) {
486 if (tcp->tcp_pmreg == 0) {
487 printf("%s: don't know location of PMCSR for this "
488 "chip\n", sc->sc_dev.dv_xname);
489 return;
490 }
491 reg = cardbus_conf_read(cc, cf, csc->sc_tag,
492 tcp->tcp_pmreg) & 0x03;
493 #if 1 /* XXX Probably not right for CardBus. */
494 if (reg == 3) {
495 /*
496 * The card has lost all configuration data in
497 * this state, so punt.
498 */
499 printf("%s: unable to wake up from power state D3\n",
500 sc->sc_dev.dv_xname);
501 return;
502 }
503 #endif
504 if (reg != 0) {
505 printf("%s: waking up from power state D%d\n",
506 sc->sc_dev.dv_xname, reg);
507 cardbus_conf_write(cc, cf, csc->sc_tag,
508 tcp->tcp_pmreg, 0);
509 }
510 }
511
512 /* Make sure the right access type is on the CardBus bridge. */
513 (*ct->ct_cf->cardbus_ctrl)(cc, csc->sc_cben);
514 (*ct->ct_cf->cardbus_ctrl)(cc, CARDBUS_BM_ENABLE);
515
516 /* Program the BAR. */
517 cardbus_conf_write(cc, cf, csc->sc_tag, csc->sc_bar_reg,
518 csc->sc_bar_val);
519
520 /* Enable the appropriate bits in the PCI CSR. */
521 reg = cardbus_conf_read(cc, cf, csc->sc_tag, PCI_COMMAND_STATUS_REG);
522 reg &= ~(PCI_COMMAND_IO_ENABLE|PCI_COMMAND_MEM_ENABLE);
523 reg |= csc->sc_csr;
524 cardbus_conf_write(cc, cf, csc->sc_tag, PCI_COMMAND_STATUS_REG, reg);
525
526 /*
527 * Make sure the latency timer is set to some reasonable
528 * value.
529 */
530 reg = cardbus_conf_read(cc, cf, csc->sc_tag, PCI_BHLC_REG);
531 if (PCI_LATTIMER(reg) < 0x20) {
532 reg &= ~(PCI_LATTIMER_MASK << PCI_LATTIMER_SHIFT);
533 reg |= (0x20 << PCI_LATTIMER_SHIFT);
534 cardbus_conf_write(cc, cf, csc->sc_tag, PCI_BHLC_REG, reg);
535 }
536 }
537
538 void
539 tlp_cardbus_x3201_reset(sc)
540 struct tulip_softc *sc;
541 {
542 u_int32_t reg;
543
544 reg = TULIP_READ(sc, CSR_SIAGEN);
545
546 /* make GP[2,0] outputs */
547 TULIP_WRITE(sc, CSR_SIAGEN, (reg & ~SIAGEN_MD) | SIAGEN_CWE |
548 0x00050000);
549 TULIP_WRITE(sc, CSR_SIAGEN, (reg & ~SIAGEN_CWE) | SIAGEN_MD);
550 }
551