if_tlp_cardbus.c revision 1.26 1 /* $NetBSD: if_tlp_cardbus.c,v 1.26 2001/03/14 01:41:09 christos Exp $ */
2
3 /*-
4 * Copyright (c) 1999, 2000 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 * NASA Ames Research Center.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by the NetBSD
22 * Foundation, Inc. and its contributors.
23 * 4. Neither the name of The NetBSD Foundation nor the names of its
24 * contributors may be used to endorse or promote products derived
25 * from this software without specific prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 * POSSIBILITY OF SUCH DAMAGE.
38 */
39
40 /*
41 * CardBus bus front-end for the Digital Semiconductor ``Tulip'' (21x4x)
42 * Ethernet controller family driver.
43 */
44
45 #include "opt_inet.h"
46 #include "opt_ns.h"
47 #include "bpfilter.h"
48
49 #include <sys/param.h>
50 #include <sys/systm.h>
51 #include <sys/mbuf.h>
52 #include <sys/malloc.h>
53 #include <sys/kernel.h>
54 #include <sys/socket.h>
55 #include <sys/ioctl.h>
56 #include <sys/errno.h>
57 #include <sys/device.h>
58
59 #include <machine/endian.h>
60
61 #include <net/if.h>
62 #include <net/if_dl.h>
63 #include <net/if_media.h>
64 #include <net/if_ether.h>
65
66 #if NBPFILTER > 0
67 #include <net/bpf.h>
68 #endif
69
70 #ifdef INET
71 #include <netinet/in.h>
72 #include <netinet/if_inarp.h>
73 #endif
74
75 #ifdef NS
76 #include <netns/ns.h>
77 #include <netns/ns_if.h>
78 #endif
79
80 #include <machine/bus.h>
81 #include <machine/intr.h>
82
83 #include <dev/mii/miivar.h>
84 #include <dev/mii/mii_bitbang.h>
85
86 #include <dev/ic/tulipreg.h>
87 #include <dev/ic/tulipvar.h>
88
89 #include <dev/pci/pcivar.h>
90 #include <dev/pci/pcireg.h>
91 #include <dev/pci/pcidevs.h>
92
93 #include <dev/cardbus/cardbusvar.h>
94 #include <dev/cardbus/cardbusdevs.h>
95
96 /*
97 * PCI configuration space registers used by the Tulip.
98 */
99 #define TULIP_PCI_IOBA 0x10 /* i/o mapped base */
100 #define TULIP_PCI_MMBA 0x14 /* memory mapped base */
101 #define TULIP_PCI_CFDA 0x40 /* configuration driver area */
102
103 #define CFDA_SLEEP 0x80000000 /* sleep mode */
104 #define CFDA_SNOOZE 0x40000000 /* snooze mode */
105
106 struct tulip_cardbus_softc {
107 struct tulip_softc sc_tulip; /* real Tulip softc */
108
109 /* CardBus-specific goo. */
110 void *sc_ih; /* interrupt handle */
111 cardbus_devfunc_t sc_ct; /* our CardBus devfuncs */
112 cardbustag_t sc_tag; /* our CardBus tag */
113 int sc_csr; /* CSR bits */
114 bus_size_t sc_mapsize; /* the size of mapped bus space
115 region */
116
117 int sc_cben; /* CardBus enables */
118 int sc_bar_reg; /* which BAR to use */
119 pcireg_t sc_bar_val; /* value of the BAR */
120
121 int sc_intrline; /* interrupt line */
122 };
123
124 int tlp_cardbus_match __P((struct device *, struct cfdata *, void *));
125 void tlp_cardbus_attach __P((struct device *, struct device *, void *));
126 int tlp_cardbus_detach __P((struct device *, int));
127
128 struct cfattach tlp_cardbus_ca = {
129 sizeof(struct tulip_cardbus_softc),
130 tlp_cardbus_match, tlp_cardbus_attach,
131 tlp_cardbus_detach, tlp_activate,
132 };
133
134 const struct tulip_cardbus_product {
135 u_int32_t tcp_vendor; /* PCI vendor ID */
136 u_int32_t tcp_product; /* PCI product ID */
137 tulip_chip_t tcp_chip; /* base Tulip chip type */
138 } tlp_cardbus_products[] = {
139 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21142,
140 TULIP_CHIP_21142 },
141
142 { PCI_VENDOR_XIRCOM, PCI_PRODUCT_XIRCOM_X3201_3_21143,
143 TULIP_CHIP_X3201_3 },
144
145 { CARDBUS_VENDOR_ACCTON, CARDBUS_PRODUCT_ACCTON_EN2242,
146 TULIP_CHIP_AN985 },
147
148 { CARDBUS_VENDOR_ABOCOM, CARDBUS_PRODUCT_ABOCOM_FE2500,
149 TULIP_CHIP_AN985 },
150
151 { CARDBUS_VENDOR_ABOCOM, CARDBUS_PRODUCT_ABOCOM_PCM200,
152 TULIP_CHIP_AN985 },
153
154 { 0, 0,
155 TULIP_CHIP_INVALID },
156 };
157
158 void tlp_cardbus_setup __P((struct tulip_cardbus_softc *));
159
160 int tlp_cardbus_enable __P((struct tulip_softc *));
161 void tlp_cardbus_disable __P((struct tulip_softc *));
162 void tlp_cardbus_power __P((struct tulip_softc *, int));
163
164 void tlp_cardbus_x3201_reset __P((struct tulip_softc *));
165
166 const struct tulip_cardbus_product *tlp_cardbus_lookup
167 __P((const struct cardbus_attach_args *));
168
169 const struct tulip_cardbus_product *
170 tlp_cardbus_lookup(ca)
171 const struct cardbus_attach_args *ca;
172 {
173 const struct tulip_cardbus_product *tcp;
174
175 for (tcp = tlp_cardbus_products;
176 tlp_chip_names[tcp->tcp_chip] != NULL;
177 tcp++) {
178 if (PCI_VENDOR(ca->ca_id) == tcp->tcp_vendor &&
179 PCI_PRODUCT(ca->ca_id) == tcp->tcp_product)
180 return (tcp);
181 }
182 return (NULL);
183 }
184
185 int
186 tlp_cardbus_match(parent, match, aux)
187 struct device *parent;
188 struct cfdata *match;
189 void *aux;
190 {
191 struct cardbus_attach_args *ca = aux;
192
193 if (tlp_cardbus_lookup(ca) != NULL)
194 return (1);
195
196 return (0);
197 }
198
199 void
200 tlp_cardbus_attach(parent, self, aux)
201 struct device *parent, *self;
202 void *aux;
203 {
204 struct tulip_cardbus_softc *csc = (void *)self;
205 struct tulip_softc *sc = &csc->sc_tulip;
206 struct cardbus_attach_args *ca = aux;
207 cardbus_devfunc_t ct = ca->ca_ct;
208 const struct tulip_cardbus_product *tcp;
209 u_int8_t enaddr[ETHER_ADDR_LEN];
210 bus_addr_t adr;
211 pcireg_t reg;
212
213 sc->sc_devno = ca->ca_device;
214 sc->sc_dmat = ca->ca_dmat;
215 csc->sc_ct = ct;
216 csc->sc_tag = ca->ca_tag;
217
218 tcp = tlp_cardbus_lookup(ca);
219 if (tcp == NULL) {
220 printf("\n");
221 panic("tlp_cardbus_attach: impossible");
222 }
223 sc->sc_chip = tcp->tcp_chip;
224
225 /*
226 * By default, Tulip registers are 8 bytes long (4 bytes
227 * followed by a 4 byte pad).
228 */
229 sc->sc_regshift = 3;
230
231 /*
232 * Power management hooks.
233 */
234 sc->sc_enable = tlp_cardbus_enable;
235 sc->sc_disable = tlp_cardbus_disable;
236 sc->sc_power = tlp_cardbus_power;
237
238 /*
239 * Get revision info, and set some chip-specific variables.
240 */
241 sc->sc_rev = PCI_REVISION(ca->ca_class);
242 switch (sc->sc_chip) {
243 case TULIP_CHIP_21142:
244 if (sc->sc_rev >= 0x20)
245 sc->sc_chip = TULIP_CHIP_21143;
246 break;
247
248 case TULIP_CHIP_AN985:
249 /*
250 * The AN983 and AN985 are very similar, and are
251 * differentiated by a "signature" register that
252 * is like, but not identical, to a PCI ID register.
253 */
254 reg = cardbus_conf_read(ct->ct_cc, ct->ct_cf, csc->sc_tag,
255 0x80);
256 switch (reg) {
257 case 0x09811317:
258 sc->sc_chip = TULIP_CHIP_AN985;
259 break;
260
261 case 0x09851317:
262 sc->sc_chip = TULIP_CHIP_AN983;
263 break;
264
265 default:
266 /* Unknown -- use default. */
267 }
268 break;
269
270 default:
271 /* Nothing. */
272 }
273
274 printf(": %s Ethernet, pass %d.%d\n",
275 tlp_chip_names[sc->sc_chip],
276 (sc->sc_rev >> 4) & 0xf, sc->sc_rev & 0xf);
277
278 /*
279 * Map the device.
280 */
281 csc->sc_csr = PCI_COMMAND_MASTER_ENABLE;
282 if (Cardbus_mapreg_map(ct, TULIP_PCI_IOBA,
283 PCI_MAPREG_TYPE_IO, 0, &sc->sc_st, &sc->sc_sh, &adr,
284 &csc->sc_mapsize) == 0) {
285 #if rbus
286 #else
287 (*ct->ct_cf->cardbus_io_open)(cc, 0, adr, adr+csc->sc_mapsize);
288 #endif
289 csc->sc_cben = CARDBUS_IO_ENABLE;
290 csc->sc_csr |= PCI_COMMAND_IO_ENABLE;
291 csc->sc_bar_reg = TULIP_PCI_IOBA;
292 csc->sc_bar_val = adr | PCI_MAPREG_TYPE_IO;
293 } else if (Cardbus_mapreg_map(ct, TULIP_PCI_MMBA,
294 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0,
295 &sc->sc_st, &sc->sc_sh, &adr, &csc->sc_mapsize) == 0) {
296 #if rbus
297 #else
298 (*ct->ct_cf->cardbus_mem_open)(cc, 0, adr, adr+csc->sc_mapsize);
299 #endif
300 csc->sc_cben = CARDBUS_MEM_ENABLE;
301 csc->sc_csr |= PCI_COMMAND_MEM_ENABLE;
302 csc->sc_bar_reg = TULIP_PCI_MMBA;
303 csc->sc_bar_val = adr | PCI_MAPREG_TYPE_MEM;
304 } else {
305 printf("%s: unable to map device registers\n",
306 sc->sc_dev.dv_xname);
307 return;
308 }
309
310 /*
311 * Bring the chip out of powersave mode and initialize the
312 * configuration registers.
313 */
314 tlp_cardbus_setup(csc);
315
316 /*
317 * Read the contents of the Ethernet Address ROM/SROM.
318 */
319 switch (sc->sc_chip) {
320 case TULIP_CHIP_X3201_3:
321 /*
322 * No SROM on this chip.
323 */
324 break;
325
326 default:
327 if (tlp_read_srom(sc) == 0)
328 goto cant_cope;
329 break;
330 }
331
332 /*
333 * Deal with chip/board quirks. This includes setting up
334 * the mediasw, and extracting the Ethernet address from
335 * the rombuf.
336 */
337 switch (sc->sc_chip) {
338 case TULIP_CHIP_21142:
339 case TULIP_CHIP_21143:
340 /* Check for new format SROM. */
341 if (tlp_isv_srom_enaddr(sc, enaddr) != 0) {
342 /*
343 * We start out with the 2114x ISV media switch.
344 * When we search for quirks, we may change to
345 * a different switch.
346 */
347 sc->sc_mediasw = &tlp_2114x_isv_mediasw;
348 } else if (tlp_parse_old_srom(sc, enaddr) == 0) {
349 /*
350 * Not an ISV SROM, and not in old DEC Address
351 * ROM format. Try to snarf it out of the CIS.
352 */
353 if (ca->ca_cis.funce.network.netid_present == 0)
354 goto cant_cope;
355
356 /* Grab the MAC address from the CIS. */
357 memcpy(enaddr, ca->ca_cis.funce.network.netid,
358 sizeof(enaddr));
359 }
360
361 /* XXX XXX XXX QUIRKS XXX XXX XXX */
362
363 /*
364 * If we don't already have a media switch, default to
365 * MII-over-SIO, with no special reset routine.
366 */
367 if (sc->sc_mediasw == NULL) {
368 printf("%s: defaulting to MII-over-SIO; no bets...\n",
369 sc->sc_dev.dv_xname);
370 sc->sc_mediasw = &tlp_sio_mii_mediasw;
371 }
372 break;
373
374 case TULIP_CHIP_AN983:
375 case TULIP_CHIP_AN985:
376 /*
377 * The ADMtek AN985's Ethernet address is located
378 * at offset 8 of its EEPROM.
379 */
380 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN);
381
382 /*
383 * The ADMtek AN985 can be configured in Single-Chip
384 * mode or MAC-only mode. Single-Chip uses the built-in
385 * PHY, MAC-only has an external PHY (usually HomePNA).
386 * The selection is based on an EEPROM setting, and both
387 * PHYs are access via MII attached to SIO.
388 *
389 * The AN985 "ghosts" the internal PHY onto all
390 * MII addresses, so we have to use a media init
391 * routine that limits the search.
392 * XXX How does this work with MAC-only mode?
393 */
394 sc->sc_mediasw = &tlp_an985_mediasw;
395 break;
396
397 case TULIP_CHIP_X3201_3:
398 /*
399 * The X3201 doesn't have an SROM. Lift the MAC address
400 * from the CIS. Also, we have a special media switch:
401 * MII-on-SIO, plus some special GPIO setup.
402 */
403 memcpy(enaddr, ca->ca_cis.funce.network.netid, sizeof(enaddr));
404 sc->sc_reset = tlp_cardbus_x3201_reset;
405 sc->sc_mediasw = &tlp_sio_mii_mediasw;
406 break;
407
408 default:
409 cant_cope:
410 printf("%s: sorry, unable to handle your board\n",
411 sc->sc_dev.dv_xname);
412 return;
413 }
414
415 /* Remember which interrupt line. */
416 csc->sc_intrline = ca->ca_intrline;
417
418 /*
419 * The CardBus cards will make it to store-and-forward mode as
420 * soon as you put them under any kind of load, so just start
421 * out there.
422 */
423 sc->sc_txthresh = TXTH_SF;
424
425 /*
426 * Finish off the attach.
427 */
428 tlp_attach(sc, enaddr);
429
430 /*
431 * Power down the socket.
432 */
433 Cardbus_function_disable(csc->sc_ct);
434 }
435
436 int
437 tlp_cardbus_detach(self, flags)
438 struct device *self;
439 int flags;
440 {
441 struct tulip_cardbus_softc *csc = (void *)self;
442 struct tulip_softc *sc = &csc->sc_tulip;
443 struct cardbus_devfunc *ct = csc->sc_ct;
444 int rv;
445
446 #if defined(DIAGNOSTIC)
447 if (ct == NULL)
448 panic("%s: data structure lacks\n", sc->sc_dev.dv_xname);
449 #endif
450
451 rv = tlp_detach(sc);
452 if (rv)
453 return (rv);
454
455 /*
456 * Unhook the interrupt handler.
457 */
458 if (csc->sc_ih != NULL)
459 cardbus_intr_disestablish(ct->ct_cc, ct->ct_cf, csc->sc_ih);
460
461 /*
462 * Release bus space and close window.
463 */
464 if (csc->sc_bar_reg != 0)
465 Cardbus_mapreg_unmap(ct, csc->sc_bar_reg,
466 sc->sc_st, sc->sc_sh, csc->sc_mapsize);
467
468 return (0);
469 }
470
471 int
472 tlp_cardbus_enable(sc)
473 struct tulip_softc *sc;
474 {
475 struct tulip_cardbus_softc *csc = (void *) sc;
476 cardbus_devfunc_t ct = csc->sc_ct;
477 cardbus_chipset_tag_t cc = ct->ct_cc;
478 cardbus_function_tag_t cf = ct->ct_cf;
479
480 /*
481 * Power on the socket.
482 */
483 Cardbus_function_enable(ct);
484
485 /*
486 * Set up the PCI configuration registers.
487 */
488 tlp_cardbus_setup(csc);
489
490 /*
491 * Map and establish the interrupt.
492 */
493 csc->sc_ih = cardbus_intr_establish(cc, cf, csc->sc_intrline, IPL_NET,
494 tlp_intr, sc);
495 if (csc->sc_ih == NULL) {
496 printf("%s: unable to establish interrupt at %d\n",
497 sc->sc_dev.dv_xname, csc->sc_intrline);
498 Cardbus_function_disable(csc->sc_ct);
499 return (1);
500 }
501 printf("%s: interrupting at %d\n", sc->sc_dev.dv_xname,
502 csc->sc_intrline);
503
504 return (0);
505 }
506
507 void
508 tlp_cardbus_disable(sc)
509 struct tulip_softc *sc;
510 {
511 struct tulip_cardbus_softc *csc = (void *) sc;
512 cardbus_devfunc_t ct = csc->sc_ct;
513 cardbus_chipset_tag_t cc = ct->ct_cc;
514 cardbus_function_tag_t cf = ct->ct_cf;
515
516 /* Unhook the interrupt handler. */
517 cardbus_intr_disestablish(cc, cf, csc->sc_ih);
518 csc->sc_ih = NULL;
519
520 /* Power down the socket. */
521 Cardbus_function_disable(ct);
522 }
523
524 void
525 tlp_cardbus_power(sc, why)
526 struct tulip_softc *sc;
527 int why;
528 {
529 struct tulip_cardbus_softc *csc = (void *) sc;
530
531 if (why == PWR_RESUME) {
532 /*
533 * Give the PCI configuration registers a kick
534 * in the head.
535 */
536 #ifdef DIAGNOSTIC
537 if (TULIP_IS_ENABLED(sc) == 0)
538 panic("tlp_cardbus_power");
539 #endif
540 tlp_cardbus_setup(csc);
541 }
542 }
543
544 void
545 tlp_cardbus_setup(csc)
546 struct tulip_cardbus_softc *csc;
547 {
548 struct tulip_softc *sc = &csc->sc_tulip;
549 cardbus_devfunc_t ct = csc->sc_ct;
550 cardbus_chipset_tag_t cc = ct->ct_cc;
551 cardbus_function_tag_t cf = ct->ct_cf;
552 pcireg_t reg;
553 int pmreg;
554
555 /*
556 * Check to see if the device is in power-save mode, and
557 * bring it out if necessary.
558 */
559 switch (sc->sc_chip) {
560 case TULIP_CHIP_21142:
561 case TULIP_CHIP_21143:
562 case TULIP_CHIP_X3201_3:
563 /*
564 * Clear the "sleep mode" bit in the CFDA register.
565 */
566 reg = cardbus_conf_read(cc, cf, csc->sc_tag, TULIP_PCI_CFDA);
567 if (reg & (CFDA_SLEEP|CFDA_SNOOZE))
568 cardbus_conf_write(cc, cf, csc->sc_tag, TULIP_PCI_CFDA,
569 reg & ~(CFDA_SLEEP|CFDA_SNOOZE));
570 break;
571
572 default:
573 /* Nothing. */
574 }
575
576 if (cardbus_get_capability(cc, cf, csc->sc_tag,
577 PCI_CAP_PWRMGMT, &pmreg, 0)) {
578 reg = cardbus_conf_read(cc, cf, csc->sc_tag, pmreg + 4) & 0x03;
579 #if 1 /* XXX Probably not right for CardBus. */
580 if (reg == 3) {
581 /*
582 * The card has lost all configuration data in
583 * this state, so punt.
584 */
585 printf("%s: unable to wake up from power state D3\n",
586 sc->sc_dev.dv_xname);
587 return;
588 }
589 #endif
590 if (reg != 0) {
591 printf("%s: waking up from power state D%d\n",
592 sc->sc_dev.dv_xname, reg);
593 cardbus_conf_write(cc, cf, csc->sc_tag,
594 pmreg + 4, 0);
595 }
596 }
597
598 /* Make sure the right access type is on the CardBus bridge. */
599 (*ct->ct_cf->cardbus_ctrl)(cc, csc->sc_cben);
600 (*ct->ct_cf->cardbus_ctrl)(cc, CARDBUS_BM_ENABLE);
601
602 /* Program the BAR. */
603 cardbus_conf_write(cc, cf, csc->sc_tag, csc->sc_bar_reg,
604 csc->sc_bar_val);
605
606 /* Enable the appropriate bits in the PCI CSR. */
607 reg = cardbus_conf_read(cc, cf, csc->sc_tag, PCI_COMMAND_STATUS_REG);
608 reg &= ~(PCI_COMMAND_IO_ENABLE|PCI_COMMAND_MEM_ENABLE);
609 reg |= csc->sc_csr;
610 cardbus_conf_write(cc, cf, csc->sc_tag, PCI_COMMAND_STATUS_REG, reg);
611
612 /*
613 * Make sure the latency timer is set to some reasonable
614 * value.
615 */
616 reg = cardbus_conf_read(cc, cf, csc->sc_tag, PCI_BHLC_REG);
617 if (PCI_LATTIMER(reg) < 0x20) {
618 reg &= ~(PCI_LATTIMER_MASK << PCI_LATTIMER_SHIFT);
619 reg |= (0x20 << PCI_LATTIMER_SHIFT);
620 cardbus_conf_write(cc, cf, csc->sc_tag, PCI_BHLC_REG, reg);
621 }
622 }
623
624 void
625 tlp_cardbus_x3201_reset(sc)
626 struct tulip_softc *sc;
627 {
628 u_int32_t reg;
629
630 reg = TULIP_READ(sc, CSR_SIAGEN);
631
632 /* make GP[2,0] outputs */
633 TULIP_WRITE(sc, CSR_SIAGEN, (reg & ~SIAGEN_MD) | SIAGEN_CWE |
634 0x00050000);
635 TULIP_WRITE(sc, CSR_SIAGEN, (reg & ~SIAGEN_CWE) | SIAGEN_MD);
636 }
637