if_tlp_cardbus.c revision 1.28 1 /* $NetBSD: if_tlp_cardbus.c,v 1.28 2001/07/17 13:55:51 mrg Exp $ */
2
3 /*-
4 * Copyright (c) 1999, 2000 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 * NASA Ames Research Center.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by the NetBSD
22 * Foundation, Inc. and its contributors.
23 * 4. Neither the name of The NetBSD Foundation nor the names of its
24 * contributors may be used to endorse or promote products derived
25 * from this software without specific prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 * POSSIBILITY OF SUCH DAMAGE.
38 */
39
40 /*
41 * CardBus bus front-end for the Digital Semiconductor ``Tulip'' (21x4x)
42 * Ethernet controller family driver.
43 */
44
45 #include "opt_inet.h"
46 #include "opt_ns.h"
47 #include "bpfilter.h"
48
49 #include <sys/param.h>
50 #include <sys/systm.h>
51 #include <sys/mbuf.h>
52 #include <sys/malloc.h>
53 #include <sys/kernel.h>
54 #include <sys/socket.h>
55 #include <sys/ioctl.h>
56 #include <sys/errno.h>
57 #include <sys/device.h>
58
59 #include <machine/endian.h>
60
61 #include <net/if.h>
62 #include <net/if_dl.h>
63 #include <net/if_media.h>
64 #include <net/if_ether.h>
65
66 #if NBPFILTER > 0
67 #include <net/bpf.h>
68 #endif
69
70 #ifdef INET
71 #include <netinet/in.h>
72 #include <netinet/if_inarp.h>
73 #endif
74
75 #ifdef NS
76 #include <netns/ns.h>
77 #include <netns/ns_if.h>
78 #endif
79
80 #include <machine/bus.h>
81 #include <machine/intr.h>
82
83 #include <dev/mii/miivar.h>
84 #include <dev/mii/mii_bitbang.h>
85
86 #include <dev/ic/tulipreg.h>
87 #include <dev/ic/tulipvar.h>
88
89 #include <dev/pci/pcivar.h>
90 #include <dev/pci/pcireg.h>
91 #include <dev/pci/pcidevs.h>
92
93 #include <dev/cardbus/cardbusvar.h>
94 #include <dev/cardbus/cardbusdevs.h>
95
96 /*
97 * PCI configuration space registers used by the Tulip.
98 */
99 #define TULIP_PCI_IOBA 0x10 /* i/o mapped base */
100 #define TULIP_PCI_MMBA 0x14 /* memory mapped base */
101 #define TULIP_PCI_CFDA 0x40 /* configuration driver area */
102
103 #define CFDA_SLEEP 0x80000000 /* sleep mode */
104 #define CFDA_SNOOZE 0x40000000 /* snooze mode */
105
106 struct tulip_cardbus_softc {
107 struct tulip_softc sc_tulip; /* real Tulip softc */
108
109 /* CardBus-specific goo. */
110 void *sc_ih; /* interrupt handle */
111 cardbus_devfunc_t sc_ct; /* our CardBus devfuncs */
112 cardbustag_t sc_tag; /* our CardBus tag */
113 int sc_csr; /* CSR bits */
114 bus_size_t sc_mapsize; /* the size of mapped bus space
115 region */
116
117 int sc_cben; /* CardBus enables */
118 int sc_bar_reg; /* which BAR to use */
119 pcireg_t sc_bar_val; /* value of the BAR */
120
121 int sc_intrline; /* interrupt line */
122 };
123
124 int tlp_cardbus_match __P((struct device *, struct cfdata *, void *));
125 void tlp_cardbus_attach __P((struct device *, struct device *, void *));
126 int tlp_cardbus_detach __P((struct device *, int));
127
128 struct cfattach tlp_cardbus_ca = {
129 sizeof(struct tulip_cardbus_softc),
130 tlp_cardbus_match, tlp_cardbus_attach,
131 tlp_cardbus_detach, tlp_activate,
132 };
133
134 const struct tulip_cardbus_product {
135 u_int32_t tcp_vendor; /* PCI vendor ID */
136 u_int32_t tcp_product; /* PCI product ID */
137 tulip_chip_t tcp_chip; /* base Tulip chip type */
138 } tlp_cardbus_products[] = {
139 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21142,
140 TULIP_CHIP_21142 },
141
142 { PCI_VENDOR_XIRCOM, PCI_PRODUCT_XIRCOM_X3201_3_21143,
143 TULIP_CHIP_X3201_3 },
144
145 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AN985,
146 TULIP_CHIP_AN985 },
147
148 { CARDBUS_VENDOR_ACCTON, CARDBUS_PRODUCT_ACCTON_EN2242,
149 TULIP_CHIP_AN985 },
150
151 { CARDBUS_VENDOR_ABOCOM, CARDBUS_PRODUCT_ABOCOM_FE2500,
152 TULIP_CHIP_AN985 },
153
154 { CARDBUS_VENDOR_ABOCOM, CARDBUS_PRODUCT_ABOCOM_PCM200,
155 TULIP_CHIP_AN985 },
156
157 { 0, 0,
158 TULIP_CHIP_INVALID },
159 };
160
161 void tlp_cardbus_setup __P((struct tulip_cardbus_softc *));
162
163 int tlp_cardbus_enable __P((struct tulip_softc *));
164 void tlp_cardbus_disable __P((struct tulip_softc *));
165 void tlp_cardbus_power __P((struct tulip_softc *, int));
166
167 void tlp_cardbus_x3201_reset __P((struct tulip_softc *));
168
169 const struct tulip_cardbus_product *tlp_cardbus_lookup
170 __P((const struct cardbus_attach_args *));
171
172 const struct tulip_cardbus_product *
173 tlp_cardbus_lookup(ca)
174 const struct cardbus_attach_args *ca;
175 {
176 const struct tulip_cardbus_product *tcp;
177
178 for (tcp = tlp_cardbus_products;
179 tlp_chip_names[tcp->tcp_chip] != NULL;
180 tcp++) {
181 if (PCI_VENDOR(ca->ca_id) == tcp->tcp_vendor &&
182 PCI_PRODUCT(ca->ca_id) == tcp->tcp_product)
183 return (tcp);
184 }
185 return (NULL);
186 }
187
188 int
189 tlp_cardbus_match(parent, match, aux)
190 struct device *parent;
191 struct cfdata *match;
192 void *aux;
193 {
194 struct cardbus_attach_args *ca = aux;
195
196 if (tlp_cardbus_lookup(ca) != NULL)
197 return (1);
198
199 return (0);
200 }
201
202 void
203 tlp_cardbus_attach(parent, self, aux)
204 struct device *parent, *self;
205 void *aux;
206 {
207 struct tulip_cardbus_softc *csc = (void *)self;
208 struct tulip_softc *sc = &csc->sc_tulip;
209 struct cardbus_attach_args *ca = aux;
210 cardbus_devfunc_t ct = ca->ca_ct;
211 const struct tulip_cardbus_product *tcp;
212 u_int8_t enaddr[ETHER_ADDR_LEN];
213 bus_addr_t adr;
214 pcireg_t reg;
215
216 sc->sc_devno = ca->ca_device;
217 sc->sc_dmat = ca->ca_dmat;
218 csc->sc_ct = ct;
219 csc->sc_tag = ca->ca_tag;
220
221 tcp = tlp_cardbus_lookup(ca);
222 if (tcp == NULL) {
223 printf("\n");
224 panic("tlp_cardbus_attach: impossible");
225 }
226 sc->sc_chip = tcp->tcp_chip;
227
228 /*
229 * By default, Tulip registers are 8 bytes long (4 bytes
230 * followed by a 4 byte pad).
231 */
232 sc->sc_regshift = 3;
233
234 /*
235 * Power management hooks.
236 */
237 sc->sc_enable = tlp_cardbus_enable;
238 sc->sc_disable = tlp_cardbus_disable;
239 sc->sc_power = tlp_cardbus_power;
240
241 /*
242 * Get revision info, and set some chip-specific variables.
243 */
244 sc->sc_rev = PCI_REVISION(ca->ca_class);
245 switch (sc->sc_chip) {
246 case TULIP_CHIP_21142:
247 if (sc->sc_rev >= 0x20)
248 sc->sc_chip = TULIP_CHIP_21143;
249 break;
250
251 case TULIP_CHIP_AN985:
252 /*
253 * The AN983 and AN985 are very similar, and are
254 * differentiated by a "signature" register that
255 * is like, but not identical, to a PCI ID register.
256 */
257 reg = cardbus_conf_read(ct->ct_cc, ct->ct_cf, csc->sc_tag,
258 0x80);
259 switch (reg) {
260 case 0x09811317:
261 sc->sc_chip = TULIP_CHIP_AN985;
262 break;
263
264 case 0x09851317:
265 sc->sc_chip = TULIP_CHIP_AN983;
266 break;
267
268 }
269 break;
270
271 }
272
273 printf(": %s Ethernet, pass %d.%d\n",
274 tlp_chip_names[sc->sc_chip],
275 (sc->sc_rev >> 4) & 0xf, sc->sc_rev & 0xf);
276
277 /*
278 * Map the device.
279 */
280 csc->sc_csr = PCI_COMMAND_MASTER_ENABLE;
281 if (Cardbus_mapreg_map(ct, TULIP_PCI_IOBA,
282 PCI_MAPREG_TYPE_IO, 0, &sc->sc_st, &sc->sc_sh, &adr,
283 &csc->sc_mapsize) == 0) {
284 #if rbus
285 #else
286 (*ct->ct_cf->cardbus_io_open)(cc, 0, adr, adr+csc->sc_mapsize);
287 #endif
288 csc->sc_cben = CARDBUS_IO_ENABLE;
289 csc->sc_csr |= PCI_COMMAND_IO_ENABLE;
290 csc->sc_bar_reg = TULIP_PCI_IOBA;
291 csc->sc_bar_val = adr | PCI_MAPREG_TYPE_IO;
292 } else if (Cardbus_mapreg_map(ct, TULIP_PCI_MMBA,
293 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0,
294 &sc->sc_st, &sc->sc_sh, &adr, &csc->sc_mapsize) == 0) {
295 #if rbus
296 #else
297 (*ct->ct_cf->cardbus_mem_open)(cc, 0, adr, adr+csc->sc_mapsize);
298 #endif
299 csc->sc_cben = CARDBUS_MEM_ENABLE;
300 csc->sc_csr |= PCI_COMMAND_MEM_ENABLE;
301 csc->sc_bar_reg = TULIP_PCI_MMBA;
302 csc->sc_bar_val = adr | PCI_MAPREG_TYPE_MEM;
303 } else {
304 printf("%s: unable to map device registers\n",
305 sc->sc_dev.dv_xname);
306 return;
307 }
308
309 /*
310 * Bring the chip out of powersave mode and initialize the
311 * configuration registers.
312 */
313 tlp_cardbus_setup(csc);
314
315 /*
316 * Read the contents of the Ethernet Address ROM/SROM.
317 */
318 switch (sc->sc_chip) {
319 case TULIP_CHIP_X3201_3:
320 /*
321 * No SROM on this chip.
322 */
323 break;
324
325 default:
326 if (tlp_read_srom(sc) == 0)
327 goto cant_cope;
328 break;
329 }
330
331 /*
332 * Deal with chip/board quirks. This includes setting up
333 * the mediasw, and extracting the Ethernet address from
334 * the rombuf.
335 */
336 switch (sc->sc_chip) {
337 case TULIP_CHIP_21142:
338 case TULIP_CHIP_21143:
339 /* Check for new format SROM. */
340 if (tlp_isv_srom_enaddr(sc, enaddr) != 0) {
341 /*
342 * We start out with the 2114x ISV media switch.
343 * When we search for quirks, we may change to
344 * a different switch.
345 */
346 sc->sc_mediasw = &tlp_2114x_isv_mediasw;
347 } else if (tlp_parse_old_srom(sc, enaddr) == 0) {
348 /*
349 * Not an ISV SROM, and not in old DEC Address
350 * ROM format. Try to snarf it out of the CIS.
351 */
352 if (ca->ca_cis.funce.network.netid_present == 0)
353 goto cant_cope;
354
355 /* Grab the MAC address from the CIS. */
356 memcpy(enaddr, ca->ca_cis.funce.network.netid,
357 sizeof(enaddr));
358 }
359
360 /* XXX XXX XXX QUIRKS XXX XXX XXX */
361
362 /*
363 * If we don't already have a media switch, default to
364 * MII-over-SIO, with no special reset routine.
365 */
366 if (sc->sc_mediasw == NULL) {
367 printf("%s: defaulting to MII-over-SIO; no bets...\n",
368 sc->sc_dev.dv_xname);
369 sc->sc_mediasw = &tlp_sio_mii_mediasw;
370 }
371 break;
372
373 case TULIP_CHIP_AN983:
374 case TULIP_CHIP_AN985:
375 /*
376 * The ADMtek AN985's Ethernet address is located
377 * at offset 8 of its EEPROM.
378 */
379 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN);
380
381 /*
382 * The ADMtek AN985 can be configured in Single-Chip
383 * mode or MAC-only mode. Single-Chip uses the built-in
384 * PHY, MAC-only has an external PHY (usually HomePNA).
385 * The selection is based on an EEPROM setting, and both
386 * PHYs are access via MII attached to SIO.
387 *
388 * The AN985 "ghosts" the internal PHY onto all
389 * MII addresses, so we have to use a media init
390 * routine that limits the search.
391 * XXX How does this work with MAC-only mode?
392 */
393 sc->sc_mediasw = &tlp_an985_mediasw;
394 break;
395
396 case TULIP_CHIP_X3201_3:
397 /*
398 * The X3201 doesn't have an SROM. Lift the MAC address
399 * from the CIS. Also, we have a special media switch:
400 * MII-on-SIO, plus some special GPIO setup.
401 */
402 memcpy(enaddr, ca->ca_cis.funce.network.netid, sizeof(enaddr));
403 sc->sc_reset = tlp_cardbus_x3201_reset;
404 sc->sc_mediasw = &tlp_sio_mii_mediasw;
405 break;
406
407 default:
408 cant_cope:
409 printf("%s: sorry, unable to handle your board\n",
410 sc->sc_dev.dv_xname);
411 return;
412 }
413
414 /* Remember which interrupt line. */
415 csc->sc_intrline = ca->ca_intrline;
416
417 /*
418 * The CardBus cards will make it to store-and-forward mode as
419 * soon as you put them under any kind of load, so just start
420 * out there.
421 */
422 sc->sc_txthresh = TXTH_SF;
423
424 /*
425 * Finish off the attach.
426 */
427 tlp_attach(sc, enaddr);
428
429 /*
430 * Power down the socket.
431 */
432 Cardbus_function_disable(csc->sc_ct);
433 }
434
435 int
436 tlp_cardbus_detach(self, flags)
437 struct device *self;
438 int flags;
439 {
440 struct tulip_cardbus_softc *csc = (void *)self;
441 struct tulip_softc *sc = &csc->sc_tulip;
442 struct cardbus_devfunc *ct = csc->sc_ct;
443 int rv;
444
445 #if defined(DIAGNOSTIC)
446 if (ct == NULL)
447 panic("%s: data structure lacks\n", sc->sc_dev.dv_xname);
448 #endif
449
450 rv = tlp_detach(sc);
451 if (rv)
452 return (rv);
453
454 /*
455 * Unhook the interrupt handler.
456 */
457 if (csc->sc_ih != NULL)
458 cardbus_intr_disestablish(ct->ct_cc, ct->ct_cf, csc->sc_ih);
459
460 /*
461 * Release bus space and close window.
462 */
463 if (csc->sc_bar_reg != 0)
464 Cardbus_mapreg_unmap(ct, csc->sc_bar_reg,
465 sc->sc_st, sc->sc_sh, csc->sc_mapsize);
466
467 return (0);
468 }
469
470 int
471 tlp_cardbus_enable(sc)
472 struct tulip_softc *sc;
473 {
474 struct tulip_cardbus_softc *csc = (void *) sc;
475 cardbus_devfunc_t ct = csc->sc_ct;
476 cardbus_chipset_tag_t cc = ct->ct_cc;
477 cardbus_function_tag_t cf = ct->ct_cf;
478
479 /*
480 * Power on the socket.
481 */
482 Cardbus_function_enable(ct);
483
484 /*
485 * Set up the PCI configuration registers.
486 */
487 tlp_cardbus_setup(csc);
488
489 /*
490 * Map and establish the interrupt.
491 */
492 csc->sc_ih = cardbus_intr_establish(cc, cf, csc->sc_intrline, IPL_NET,
493 tlp_intr, sc);
494 if (csc->sc_ih == NULL) {
495 printf("%s: unable to establish interrupt at %d\n",
496 sc->sc_dev.dv_xname, csc->sc_intrline);
497 Cardbus_function_disable(csc->sc_ct);
498 return (1);
499 }
500 printf("%s: interrupting at %d\n", sc->sc_dev.dv_xname,
501 csc->sc_intrline);
502
503 return (0);
504 }
505
506 void
507 tlp_cardbus_disable(sc)
508 struct tulip_softc *sc;
509 {
510 struct tulip_cardbus_softc *csc = (void *) sc;
511 cardbus_devfunc_t ct = csc->sc_ct;
512 cardbus_chipset_tag_t cc = ct->ct_cc;
513 cardbus_function_tag_t cf = ct->ct_cf;
514
515 /* Unhook the interrupt handler. */
516 cardbus_intr_disestablish(cc, cf, csc->sc_ih);
517 csc->sc_ih = NULL;
518
519 /* Power down the socket. */
520 Cardbus_function_disable(ct);
521 }
522
523 void
524 tlp_cardbus_power(sc, why)
525 struct tulip_softc *sc;
526 int why;
527 {
528 struct tulip_cardbus_softc *csc = (void *) sc;
529
530 if (why == PWR_RESUME) {
531 /*
532 * Give the PCI configuration registers a kick
533 * in the head.
534 */
535 #ifdef DIAGNOSTIC
536 if (TULIP_IS_ENABLED(sc) == 0)
537 panic("tlp_cardbus_power");
538 #endif
539 tlp_cardbus_setup(csc);
540 }
541 }
542
543 void
544 tlp_cardbus_setup(csc)
545 struct tulip_cardbus_softc *csc;
546 {
547 struct tulip_softc *sc = &csc->sc_tulip;
548 cardbus_devfunc_t ct = csc->sc_ct;
549 cardbus_chipset_tag_t cc = ct->ct_cc;
550 cardbus_function_tag_t cf = ct->ct_cf;
551 pcireg_t reg;
552 int pmreg;
553
554 /*
555 * Check to see if the device is in power-save mode, and
556 * bring it out if necessary.
557 */
558 switch (sc->sc_chip) {
559 case TULIP_CHIP_21142:
560 case TULIP_CHIP_21143:
561 case TULIP_CHIP_X3201_3:
562 /*
563 * Clear the "sleep mode" bit in the CFDA register.
564 */
565 reg = cardbus_conf_read(cc, cf, csc->sc_tag, TULIP_PCI_CFDA);
566 if (reg & (CFDA_SLEEP|CFDA_SNOOZE))
567 cardbus_conf_write(cc, cf, csc->sc_tag, TULIP_PCI_CFDA,
568 reg & ~(CFDA_SLEEP|CFDA_SNOOZE));
569 break;
570 }
571
572 if (cardbus_get_capability(cc, cf, csc->sc_tag,
573 PCI_CAP_PWRMGMT, &pmreg, 0)) {
574 reg = cardbus_conf_read(cc, cf, csc->sc_tag, pmreg + 4) & 0x03;
575 #if 1 /* XXX Probably not right for CardBus. */
576 if (reg == 3) {
577 /*
578 * The card has lost all configuration data in
579 * this state, so punt.
580 */
581 printf("%s: unable to wake up from power state D3\n",
582 sc->sc_dev.dv_xname);
583 return;
584 }
585 #endif
586 if (reg != 0) {
587 printf("%s: waking up from power state D%d\n",
588 sc->sc_dev.dv_xname, reg);
589 cardbus_conf_write(cc, cf, csc->sc_tag,
590 pmreg + 4, 0);
591 }
592 }
593
594 /* Make sure the right access type is on the CardBus bridge. */
595 (*ct->ct_cf->cardbus_ctrl)(cc, csc->sc_cben);
596 (*ct->ct_cf->cardbus_ctrl)(cc, CARDBUS_BM_ENABLE);
597
598 /* Program the BAR. */
599 cardbus_conf_write(cc, cf, csc->sc_tag, csc->sc_bar_reg,
600 csc->sc_bar_val);
601
602 /* Enable the appropriate bits in the PCI CSR. */
603 reg = cardbus_conf_read(cc, cf, csc->sc_tag, PCI_COMMAND_STATUS_REG);
604 reg &= ~(PCI_COMMAND_IO_ENABLE|PCI_COMMAND_MEM_ENABLE);
605 reg |= csc->sc_csr;
606 cardbus_conf_write(cc, cf, csc->sc_tag, PCI_COMMAND_STATUS_REG, reg);
607
608 /*
609 * Make sure the latency timer is set to some reasonable
610 * value.
611 */
612 reg = cardbus_conf_read(cc, cf, csc->sc_tag, PCI_BHLC_REG);
613 if (PCI_LATTIMER(reg) < 0x20) {
614 reg &= ~(PCI_LATTIMER_MASK << PCI_LATTIMER_SHIFT);
615 reg |= (0x20 << PCI_LATTIMER_SHIFT);
616 cardbus_conf_write(cc, cf, csc->sc_tag, PCI_BHLC_REG, reg);
617 }
618 }
619
620 void
621 tlp_cardbus_x3201_reset(sc)
622 struct tulip_softc *sc;
623 {
624 u_int32_t reg;
625
626 reg = TULIP_READ(sc, CSR_SIAGEN);
627
628 /* make GP[2,0] outputs */
629 TULIP_WRITE(sc, CSR_SIAGEN, (reg & ~SIAGEN_MD) | SIAGEN_CWE |
630 0x00050000);
631 TULIP_WRITE(sc, CSR_SIAGEN, (reg & ~SIAGEN_CWE) | SIAGEN_MD);
632 }
633