if_tlp_cardbus.c revision 1.32 1 /* $NetBSD: if_tlp_cardbus.c,v 1.32 2002/02/17 21:21:58 augustss Exp $ */
2
3 /*-
4 * Copyright (c) 1999, 2000 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 * NASA Ames Research Center.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by the NetBSD
22 * Foundation, Inc. and its contributors.
23 * 4. Neither the name of The NetBSD Foundation nor the names of its
24 * contributors may be used to endorse or promote products derived
25 * from this software without specific prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 * POSSIBILITY OF SUCH DAMAGE.
38 */
39
40 /*
41 * CardBus bus front-end for the Digital Semiconductor ``Tulip'' (21x4x)
42 * Ethernet controller family driver.
43 */
44
45 #include <sys/cdefs.h>
46 __KERNEL_RCSID(0, "$NetBSD: if_tlp_cardbus.c,v 1.32 2002/02/17 21:21:58 augustss Exp $");
47
48 #include "opt_inet.h"
49 #include "opt_ns.h"
50 #include "bpfilter.h"
51
52 #include <sys/param.h>
53 #include <sys/systm.h>
54 #include <sys/mbuf.h>
55 #include <sys/malloc.h>
56 #include <sys/kernel.h>
57 #include <sys/socket.h>
58 #include <sys/ioctl.h>
59 #include <sys/errno.h>
60 #include <sys/device.h>
61
62 #include <machine/endian.h>
63
64 #include <net/if.h>
65 #include <net/if_dl.h>
66 #include <net/if_media.h>
67 #include <net/if_ether.h>
68
69 #if NBPFILTER > 0
70 #include <net/bpf.h>
71 #endif
72
73 #ifdef INET
74 #include <netinet/in.h>
75 #include <netinet/if_inarp.h>
76 #endif
77
78 #ifdef NS
79 #include <netns/ns.h>
80 #include <netns/ns_if.h>
81 #endif
82
83 #include <machine/bus.h>
84 #include <machine/intr.h>
85
86 #include <dev/mii/miivar.h>
87 #include <dev/mii/mii_bitbang.h>
88
89 #include <dev/ic/tulipreg.h>
90 #include <dev/ic/tulipvar.h>
91
92 #include <dev/pci/pcivar.h>
93 #include <dev/pci/pcireg.h>
94 #include <dev/pci/pcidevs.h>
95
96 #include <dev/cardbus/cardbusvar.h>
97 #include <dev/cardbus/cardbusdevs.h>
98
99 /*
100 * PCI configuration space registers used by the Tulip.
101 */
102 #define TULIP_PCI_IOBA 0x10 /* i/o mapped base */
103 #define TULIP_PCI_MMBA 0x14 /* memory mapped base */
104 #define TULIP_PCI_CFDA 0x40 /* configuration driver area */
105
106 #define CFDA_SLEEP 0x80000000 /* sleep mode */
107 #define CFDA_SNOOZE 0x40000000 /* snooze mode */
108
109 struct tulip_cardbus_softc {
110 struct tulip_softc sc_tulip; /* real Tulip softc */
111
112 /* CardBus-specific goo. */
113 void *sc_ih; /* interrupt handle */
114 cardbus_devfunc_t sc_ct; /* our CardBus devfuncs */
115 cardbustag_t sc_tag; /* our CardBus tag */
116 int sc_csr; /* CSR bits */
117 bus_size_t sc_mapsize; /* the size of mapped bus space
118 region */
119
120 int sc_cben; /* CardBus enables */
121 int sc_bar_reg; /* which BAR to use */
122 pcireg_t sc_bar_val; /* value of the BAR */
123
124 int sc_intrline; /* interrupt line */
125 };
126
127 int tlp_cardbus_match __P((struct device *, struct cfdata *, void *));
128 void tlp_cardbus_attach __P((struct device *, struct device *, void *));
129 int tlp_cardbus_detach __P((struct device *, int));
130
131 struct cfattach tlp_cardbus_ca = {
132 sizeof(struct tulip_cardbus_softc),
133 tlp_cardbus_match, tlp_cardbus_attach,
134 tlp_cardbus_detach, tlp_activate,
135 };
136
137 const struct tulip_cardbus_product {
138 u_int32_t tcp_vendor; /* PCI vendor ID */
139 u_int32_t tcp_product; /* PCI product ID */
140 tulip_chip_t tcp_chip; /* base Tulip chip type */
141 } tlp_cardbus_products[] = {
142 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21142,
143 TULIP_CHIP_21142 },
144
145 { PCI_VENDOR_XIRCOM, PCI_PRODUCT_XIRCOM_X3201_3_21143,
146 TULIP_CHIP_X3201_3 },
147
148 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AN985,
149 TULIP_CHIP_AN985 },
150
151 { CARDBUS_VENDOR_ACCTON, CARDBUS_PRODUCT_ACCTON_EN2242,
152 TULIP_CHIP_AN985 },
153
154 { CARDBUS_VENDOR_ABOCOM, CARDBUS_PRODUCT_ABOCOM_FE2500,
155 TULIP_CHIP_AN985 },
156
157 { CARDBUS_VENDOR_ABOCOM, CARDBUS_PRODUCT_ABOCOM_PCM200,
158 TULIP_CHIP_AN985 },
159
160 { CARDBUS_VENDOR_HAWKING, CARDBUS_PRODUCT_HAWKING_PN672TX,
161 TULIP_CHIP_AN985 },
162
163 { 0, 0,
164 TULIP_CHIP_INVALID },
165 };
166
167 void tlp_cardbus_setup __P((struct tulip_cardbus_softc *));
168
169 int tlp_cardbus_enable __P((struct tulip_softc *));
170 void tlp_cardbus_disable __P((struct tulip_softc *));
171 void tlp_cardbus_power __P((struct tulip_softc *, int));
172
173 void tlp_cardbus_x3201_reset __P((struct tulip_softc *));
174
175 const struct tulip_cardbus_product *tlp_cardbus_lookup
176 __P((const struct cardbus_attach_args *));
177
178 const struct tulip_cardbus_product *
179 tlp_cardbus_lookup(ca)
180 const struct cardbus_attach_args *ca;
181 {
182 const struct tulip_cardbus_product *tcp;
183
184 for (tcp = tlp_cardbus_products;
185 tlp_chip_names[tcp->tcp_chip] != NULL;
186 tcp++) {
187 if (PCI_VENDOR(ca->ca_id) == tcp->tcp_vendor &&
188 PCI_PRODUCT(ca->ca_id) == tcp->tcp_product)
189 return (tcp);
190 }
191 return (NULL);
192 }
193
194 int
195 tlp_cardbus_match(parent, match, aux)
196 struct device *parent;
197 struct cfdata *match;
198 void *aux;
199 {
200 struct cardbus_attach_args *ca = aux;
201
202 if (tlp_cardbus_lookup(ca) != NULL)
203 return (1);
204
205 return (0);
206 }
207
208 void
209 tlp_cardbus_attach(parent, self, aux)
210 struct device *parent, *self;
211 void *aux;
212 {
213 struct tulip_cardbus_softc *csc = (void *)self;
214 struct tulip_softc *sc = &csc->sc_tulip;
215 struct cardbus_attach_args *ca = aux;
216 cardbus_devfunc_t ct = ca->ca_ct;
217 const struct tulip_cardbus_product *tcp;
218 u_int8_t enaddr[ETHER_ADDR_LEN];
219 bus_addr_t adr;
220 pcireg_t reg;
221
222 sc->sc_devno = ca->ca_device;
223 sc->sc_dmat = ca->ca_dmat;
224 csc->sc_ct = ct;
225 csc->sc_tag = ca->ca_tag;
226
227 tcp = tlp_cardbus_lookup(ca);
228 if (tcp == NULL) {
229 printf("\n");
230 panic("tlp_cardbus_attach: impossible");
231 }
232 sc->sc_chip = tcp->tcp_chip;
233
234 /*
235 * By default, Tulip registers are 8 bytes long (4 bytes
236 * followed by a 4 byte pad).
237 */
238 sc->sc_regshift = 3;
239
240 /*
241 * Power management hooks.
242 */
243 sc->sc_enable = tlp_cardbus_enable;
244 sc->sc_disable = tlp_cardbus_disable;
245 sc->sc_power = tlp_cardbus_power;
246
247 /*
248 * Get revision info, and set some chip-specific variables.
249 */
250 sc->sc_rev = PCI_REVISION(ca->ca_class);
251 switch (sc->sc_chip) {
252 case TULIP_CHIP_21142:
253 if (sc->sc_rev >= 0x20)
254 sc->sc_chip = TULIP_CHIP_21143;
255 break;
256
257 case TULIP_CHIP_AN985:
258 /*
259 * The AN983 and AN985 are very similar, and are
260 * differentiated by a "signature" register that
261 * is like, but not identical, to a PCI ID register.
262 */
263 reg = cardbus_conf_read(ct->ct_cc, ct->ct_cf, csc->sc_tag,
264 0x80);
265 switch (reg) {
266 case 0x09811317:
267 sc->sc_chip = TULIP_CHIP_AN985;
268 break;
269
270 case 0x09851317:
271 sc->sc_chip = TULIP_CHIP_AN983;
272 break;
273
274 }
275 break;
276
277 default:
278 /* Nothing. -- to make gcc happy */
279 break;
280 }
281
282 printf(": %s Ethernet, pass %d.%d\n",
283 tlp_chip_names[sc->sc_chip],
284 (sc->sc_rev >> 4) & 0xf, sc->sc_rev & 0xf);
285
286 /*
287 * Map the device.
288 */
289 csc->sc_csr = PCI_COMMAND_MASTER_ENABLE;
290 if (Cardbus_mapreg_map(ct, TULIP_PCI_IOBA,
291 PCI_MAPREG_TYPE_IO, 0, &sc->sc_st, &sc->sc_sh, &adr,
292 &csc->sc_mapsize) == 0) {
293 #if rbus
294 #else
295 (*ct->ct_cf->cardbus_io_open)(cc, 0, adr, adr+csc->sc_mapsize);
296 #endif
297 csc->sc_cben = CARDBUS_IO_ENABLE;
298 csc->sc_csr |= PCI_COMMAND_IO_ENABLE;
299 csc->sc_bar_reg = TULIP_PCI_IOBA;
300 csc->sc_bar_val = adr | PCI_MAPREG_TYPE_IO;
301 } else if (Cardbus_mapreg_map(ct, TULIP_PCI_MMBA,
302 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0,
303 &sc->sc_st, &sc->sc_sh, &adr, &csc->sc_mapsize) == 0) {
304 #if rbus
305 #else
306 (*ct->ct_cf->cardbus_mem_open)(cc, 0, adr, adr+csc->sc_mapsize);
307 #endif
308 csc->sc_cben = CARDBUS_MEM_ENABLE;
309 csc->sc_csr |= PCI_COMMAND_MEM_ENABLE;
310 csc->sc_bar_reg = TULIP_PCI_MMBA;
311 csc->sc_bar_val = adr | PCI_MAPREG_TYPE_MEM;
312 } else {
313 printf("%s: unable to map device registers\n",
314 sc->sc_dev.dv_xname);
315 return;
316 }
317
318 /*
319 * Bring the chip out of powersave mode and initialize the
320 * configuration registers.
321 */
322 tlp_cardbus_setup(csc);
323
324 /*
325 * Read the contents of the Ethernet Address ROM/SROM.
326 */
327 switch (sc->sc_chip) {
328 case TULIP_CHIP_X3201_3:
329 /*
330 * No SROM on this chip.
331 */
332 break;
333
334 default:
335 if (tlp_read_srom(sc) == 0)
336 goto cant_cope;
337 break;
338 }
339
340 /*
341 * Deal with chip/board quirks. This includes setting up
342 * the mediasw, and extracting the Ethernet address from
343 * the rombuf.
344 */
345 switch (sc->sc_chip) {
346 case TULIP_CHIP_21142:
347 case TULIP_CHIP_21143:
348 /* Check for new format SROM. */
349 if (tlp_isv_srom_enaddr(sc, enaddr) != 0) {
350 /*
351 * We start out with the 2114x ISV media switch.
352 * When we search for quirks, we may change to
353 * a different switch.
354 */
355 sc->sc_mediasw = &tlp_2114x_isv_mediasw;
356 } else if (tlp_parse_old_srom(sc, enaddr) == 0) {
357 /*
358 * Not an ISV SROM, and not in old DEC Address
359 * ROM format. Try to snarf it out of the CIS.
360 */
361 if (ca->ca_cis.funce.network.netid_present == 0)
362 goto cant_cope;
363
364 /* Grab the MAC address from the CIS. */
365 memcpy(enaddr, ca->ca_cis.funce.network.netid,
366 sizeof(enaddr));
367 }
368
369 /* XXX XXX XXX QUIRKS XXX XXX XXX */
370
371 /*
372 * If we don't already have a media switch, default to
373 * MII-over-SIO, with no special reset routine.
374 */
375 if (sc->sc_mediasw == NULL) {
376 printf("%s: defaulting to MII-over-SIO; no bets...\n",
377 sc->sc_dev.dv_xname);
378 sc->sc_mediasw = &tlp_sio_mii_mediasw;
379 }
380 break;
381
382 case TULIP_CHIP_AN983:
383 case TULIP_CHIP_AN985:
384 /*
385 * The ADMtek AN985's Ethernet address is located
386 * at offset 8 of its EEPROM.
387 */
388 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN);
389
390 /*
391 * The ADMtek AN985 can be configured in Single-Chip
392 * mode or MAC-only mode. Single-Chip uses the built-in
393 * PHY, MAC-only has an external PHY (usually HomePNA).
394 * The selection is based on an EEPROM setting, and both
395 * PHYs are access via MII attached to SIO.
396 *
397 * The AN985 "ghosts" the internal PHY onto all
398 * MII addresses, so we have to use a media init
399 * routine that limits the search.
400 * XXX How does this work with MAC-only mode?
401 */
402 sc->sc_mediasw = &tlp_an985_mediasw;
403 break;
404
405 case TULIP_CHIP_X3201_3:
406 /*
407 * The X3201 doesn't have an SROM. Lift the MAC address
408 * from the CIS. Also, we have a special media switch:
409 * MII-on-SIO, plus some special GPIO setup.
410 */
411 memcpy(enaddr, ca->ca_cis.funce.network.netid, sizeof(enaddr));
412 sc->sc_reset = tlp_cardbus_x3201_reset;
413 sc->sc_mediasw = &tlp_sio_mii_mediasw;
414 break;
415
416 default:
417 cant_cope:
418 printf("%s: sorry, unable to handle your board\n",
419 sc->sc_dev.dv_xname);
420 return;
421 }
422
423 /* Remember which interrupt line. */
424 csc->sc_intrline = ca->ca_intrline;
425
426 /*
427 * The CardBus cards will make it to store-and-forward mode as
428 * soon as you put them under any kind of load, so just start
429 * out there.
430 */
431 sc->sc_txthresh = TXTH_SF;
432
433 /*
434 * Finish off the attach.
435 */
436 tlp_attach(sc, enaddr);
437
438 /*
439 * Power down the socket.
440 */
441 Cardbus_function_disable(csc->sc_ct);
442 }
443
444 int
445 tlp_cardbus_detach(self, flags)
446 struct device *self;
447 int flags;
448 {
449 struct tulip_cardbus_softc *csc = (void *)self;
450 struct tulip_softc *sc = &csc->sc_tulip;
451 struct cardbus_devfunc *ct = csc->sc_ct;
452 int rv;
453
454 #if defined(DIAGNOSTIC)
455 if (ct == NULL)
456 panic("%s: data structure lacks\n", sc->sc_dev.dv_xname);
457 #endif
458
459 rv = tlp_detach(sc);
460 if (rv)
461 return (rv);
462
463 /*
464 * Unhook the interrupt handler.
465 */
466 if (csc->sc_ih != NULL)
467 cardbus_intr_disestablish(ct->ct_cc, ct->ct_cf, csc->sc_ih);
468
469 /*
470 * Release bus space and close window.
471 */
472 if (csc->sc_bar_reg != 0)
473 Cardbus_mapreg_unmap(ct, csc->sc_bar_reg,
474 sc->sc_st, sc->sc_sh, csc->sc_mapsize);
475
476 return (0);
477 }
478
479 int
480 tlp_cardbus_enable(sc)
481 struct tulip_softc *sc;
482 {
483 struct tulip_cardbus_softc *csc = (void *) sc;
484 cardbus_devfunc_t ct = csc->sc_ct;
485 cardbus_chipset_tag_t cc = ct->ct_cc;
486 cardbus_function_tag_t cf = ct->ct_cf;
487
488 /*
489 * Power on the socket.
490 */
491 Cardbus_function_enable(ct);
492
493 /*
494 * Set up the PCI configuration registers.
495 */
496 tlp_cardbus_setup(csc);
497
498 /*
499 * Map and establish the interrupt.
500 */
501 csc->sc_ih = cardbus_intr_establish(cc, cf, csc->sc_intrline, IPL_NET,
502 tlp_intr, sc);
503 if (csc->sc_ih == NULL) {
504 printf("%s: unable to establish interrupt at %d\n",
505 sc->sc_dev.dv_xname, csc->sc_intrline);
506 Cardbus_function_disable(csc->sc_ct);
507 return (1);
508 }
509 printf("%s: interrupting at %d\n", sc->sc_dev.dv_xname,
510 csc->sc_intrline);
511
512 return (0);
513 }
514
515 void
516 tlp_cardbus_disable(sc)
517 struct tulip_softc *sc;
518 {
519 struct tulip_cardbus_softc *csc = (void *) sc;
520 cardbus_devfunc_t ct = csc->sc_ct;
521 cardbus_chipset_tag_t cc = ct->ct_cc;
522 cardbus_function_tag_t cf = ct->ct_cf;
523
524 /* Unhook the interrupt handler. */
525 cardbus_intr_disestablish(cc, cf, csc->sc_ih);
526 csc->sc_ih = NULL;
527
528 /* Power down the socket. */
529 Cardbus_function_disable(ct);
530 }
531
532 void
533 tlp_cardbus_power(sc, why)
534 struct tulip_softc *sc;
535 int why;
536 {
537 struct tulip_cardbus_softc *csc = (void *) sc;
538
539 if (why == PWR_RESUME) {
540 /*
541 * Give the PCI configuration registers a kick
542 * in the head.
543 */
544 #ifdef DIAGNOSTIC
545 if (TULIP_IS_ENABLED(sc) == 0)
546 panic("tlp_cardbus_power");
547 #endif
548 tlp_cardbus_setup(csc);
549 }
550 }
551
552 void
553 tlp_cardbus_setup(csc)
554 struct tulip_cardbus_softc *csc;
555 {
556 struct tulip_softc *sc = &csc->sc_tulip;
557 cardbus_devfunc_t ct = csc->sc_ct;
558 cardbus_chipset_tag_t cc = ct->ct_cc;
559 cardbus_function_tag_t cf = ct->ct_cf;
560 pcireg_t reg;
561 int pmreg;
562
563 /*
564 * Check to see if the device is in power-save mode, and
565 * bring it out if necessary.
566 */
567 switch (sc->sc_chip) {
568 case TULIP_CHIP_21142:
569 case TULIP_CHIP_21143:
570 case TULIP_CHIP_X3201_3:
571 /*
572 * Clear the "sleep mode" bit in the CFDA register.
573 */
574 reg = cardbus_conf_read(cc, cf, csc->sc_tag, TULIP_PCI_CFDA);
575 if (reg & (CFDA_SLEEP|CFDA_SNOOZE))
576 cardbus_conf_write(cc, cf, csc->sc_tag, TULIP_PCI_CFDA,
577 reg & ~(CFDA_SLEEP|CFDA_SNOOZE));
578 break;
579
580 default:
581 /* Nothing. -- to make gcc happy */
582 break;
583 }
584
585 if (cardbus_get_capability(cc, cf, csc->sc_tag,
586 PCI_CAP_PWRMGMT, &pmreg, 0)) {
587 reg = cardbus_conf_read(cc, cf, csc->sc_tag, pmreg + 4) & 0x03;
588 #if 1 /* XXX Probably not right for CardBus. */
589 if (reg == 3) {
590 /*
591 * The card has lost all configuration data in
592 * this state, so punt.
593 */
594 printf("%s: unable to wake up from power state D3\n",
595 sc->sc_dev.dv_xname);
596 return;
597 }
598 #endif
599 if (reg != 0) {
600 printf("%s: waking up from power state D%d\n",
601 sc->sc_dev.dv_xname, reg);
602 cardbus_conf_write(cc, cf, csc->sc_tag,
603 pmreg + 4, 0);
604 }
605 }
606
607 /* Make sure the right access type is on the CardBus bridge. */
608 (*ct->ct_cf->cardbus_ctrl)(cc, csc->sc_cben);
609 (*ct->ct_cf->cardbus_ctrl)(cc, CARDBUS_BM_ENABLE);
610
611 /* Program the BAR. */
612 cardbus_conf_write(cc, cf, csc->sc_tag, csc->sc_bar_reg,
613 csc->sc_bar_val);
614
615 /* Enable the appropriate bits in the PCI CSR. */
616 reg = cardbus_conf_read(cc, cf, csc->sc_tag, PCI_COMMAND_STATUS_REG);
617 reg &= ~(PCI_COMMAND_IO_ENABLE|PCI_COMMAND_MEM_ENABLE);
618 reg |= csc->sc_csr;
619 cardbus_conf_write(cc, cf, csc->sc_tag, PCI_COMMAND_STATUS_REG, reg);
620
621 /*
622 * Make sure the latency timer is set to some reasonable
623 * value.
624 */
625 reg = cardbus_conf_read(cc, cf, csc->sc_tag, PCI_BHLC_REG);
626 if (PCI_LATTIMER(reg) < 0x20) {
627 reg &= ~(PCI_LATTIMER_MASK << PCI_LATTIMER_SHIFT);
628 reg |= (0x20 << PCI_LATTIMER_SHIFT);
629 cardbus_conf_write(cc, cf, csc->sc_tag, PCI_BHLC_REG, reg);
630 }
631 }
632
633 void
634 tlp_cardbus_x3201_reset(sc)
635 struct tulip_softc *sc;
636 {
637 u_int32_t reg;
638
639 reg = TULIP_READ(sc, CSR_SIAGEN);
640
641 /* make GP[2,0] outputs */
642 TULIP_WRITE(sc, CSR_SIAGEN, (reg & ~SIAGEN_MD) | SIAGEN_CWE |
643 0x00050000);
644 TULIP_WRITE(sc, CSR_SIAGEN, (reg & ~SIAGEN_CWE) | SIAGEN_MD);
645 }
646