if_tlp_cardbus.c revision 1.66 1 /* $NetBSD: if_tlp_cardbus.c,v 1.66 2010/02/26 00:57:02 dyoung Exp $ */
2
3 /*-
4 * Copyright (c) 1999, 2000 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 * NASA Ames Research Center.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 * POSSIBILITY OF SUCH DAMAGE.
31 */
32
33 /*
34 * CardBus bus front-end for the Digital Semiconductor ``Tulip'' (21x4x)
35 * Ethernet controller family driver.
36 */
37
38 #include <sys/cdefs.h>
39 __KERNEL_RCSID(0, "$NetBSD: if_tlp_cardbus.c,v 1.66 2010/02/26 00:57:02 dyoung Exp $");
40
41 #include "opt_inet.h"
42
43 #include <sys/param.h>
44 #include <sys/systm.h>
45 #include <sys/mbuf.h>
46 #include <sys/malloc.h>
47 #include <sys/kernel.h>
48 #include <sys/socket.h>
49 #include <sys/ioctl.h>
50 #include <sys/errno.h>
51 #include <sys/device.h>
52
53 #include <machine/endian.h>
54
55 #include <net/if.h>
56 #include <net/if_dl.h>
57 #include <net/if_media.h>
58 #include <net/if_ether.h>
59
60 #ifdef INET
61 #include <netinet/in.h>
62 #include <netinet/if_inarp.h>
63 #endif
64
65
66 #include <sys/bus.h>
67 #include <sys/intr.h>
68
69 #include <dev/mii/miivar.h>
70 #include <dev/mii/mii_bitbang.h>
71
72 #include <dev/ic/tulipreg.h>
73 #include <dev/ic/tulipvar.h>
74
75 #include <dev/pci/pcivar.h>
76 #include <dev/pci/pcireg.h>
77 #include <dev/pci/pcidevs.h>
78
79 #include <dev/cardbus/cardbusvar.h>
80 #include <dev/pci/pcidevs.h>
81
82 /*
83 * PCI configuration space registers used by the Tulip.
84 */
85 #define TULIP_PCI_IOBA 0x10 /* i/o mapped base */
86 #define TULIP_PCI_MMBA 0x14 /* memory mapped base */
87 #define TULIP_PCI_CFDA 0x40 /* configuration driver area */
88
89 #define CFDA_SLEEP 0x80000000 /* sleep mode */
90 #define CFDA_SNOOZE 0x40000000 /* snooze mode */
91
92 struct tulip_cardbus_softc {
93 struct tulip_softc sc_tulip; /* real Tulip softc */
94
95 /* CardBus-specific goo. */
96 void *sc_ih; /* interrupt handle */
97 cardbus_devfunc_t sc_ct; /* our CardBus devfuncs */
98 pcitag_t sc_tag; /* our CardBus tag */
99 pcireg_t sc_csr;
100 bus_size_t sc_mapsize; /* the size of mapped bus space
101 region */
102
103 int sc_bar_reg; /* which BAR to use */
104 pcireg_t sc_bar_val; /* value of the BAR */
105
106 cardbus_intr_line_t sc_intrline; /* interrupt line */
107 };
108
109 int tlp_cardbus_match(device_t, cfdata_t, void *);
110 void tlp_cardbus_attach(device_t, device_t, void *);
111 int tlp_cardbus_detach(device_t, int);
112
113 CFATTACH_DECL_NEW(tlp_cardbus, sizeof(struct tulip_cardbus_softc),
114 tlp_cardbus_match, tlp_cardbus_attach, tlp_cardbus_detach, tlp_activate);
115
116 const struct tulip_cardbus_product {
117 u_int32_t tcp_vendor; /* PCI vendor ID */
118 u_int32_t tcp_product; /* PCI product ID */
119 tulip_chip_t tcp_chip; /* base Tulip chip type */
120 } tlp_cardbus_products[] = {
121 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21142,
122 TULIP_CHIP_21142 },
123
124 { PCI_VENDOR_XIRCOM, PCI_PRODUCT_XIRCOM_X3201_3_21143,
125 TULIP_CHIP_X3201_3 },
126
127 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AN983,
128 TULIP_CHIP_AN985 },
129
130 { PCI_VENDOR_ACCTON, PCI_PRODUCT_ACCTON_EN2242,
131 TULIP_CHIP_AN985 },
132
133 { PCI_VENDOR_ABOCOM, PCI_PRODUCT_ABOCOM_FE2500,
134 TULIP_CHIP_AN985 },
135
136 { PCI_VENDOR_ABOCOM, PCI_PRODUCT_ABOCOM_PCM200,
137 TULIP_CHIP_AN985 },
138
139 { PCI_VENDOR_ABOCOM, PCI_PRODUCT_ABOCOM_FE2500MX,
140 TULIP_CHIP_AN985 },
141
142 { PCI_VENDOR_HAWKING, PCI_PRODUCT_HAWKING_PN672TX,
143 TULIP_CHIP_AN985 },
144
145 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AN985,
146 TULIP_CHIP_AN985 },
147
148 { PCI_VENDOR_MICROSOFT, PCI_PRODUCT_MICROSOFT_MN120,
149 TULIP_CHIP_AN985 },
150
151 { PCI_VENDOR_LINKSYS, PCI_PRODUCT_LINKSYS_PCMPC200,
152 TULIP_CHIP_AN985 },
153
154 { 0, 0,
155 TULIP_CHIP_INVALID },
156 };
157
158 struct tlp_cardbus_quirks {
159 void (*tpq_func)(struct tulip_cardbus_softc *,
160 const u_int8_t *);
161 u_int8_t tpq_oui[3];
162 };
163
164 void tlp_cardbus_lxt_quirks(struct tulip_cardbus_softc *,
165 const u_int8_t *);
166
167 const struct tlp_cardbus_quirks tlp_cardbus_21142_quirks[] = {
168 { tlp_cardbus_lxt_quirks, { 0x00, 0x40, 0x05 } },
169 { NULL, { 0, 0, 0 } }
170 };
171
172 void tlp_cardbus_setup(struct tulip_cardbus_softc *);
173
174 int tlp_cardbus_enable(struct tulip_softc *);
175 void tlp_cardbus_disable(struct tulip_softc *);
176 void tlp_cardbus_power(struct tulip_softc *, int);
177
178 void tlp_cardbus_x3201_reset(struct tulip_softc *);
179
180 const struct tulip_cardbus_product *tlp_cardbus_lookup
181 (const struct cardbus_attach_args *);
182 void tlp_cardbus_get_quirks(struct tulip_cardbus_softc *,
183 const u_int8_t *, const struct tlp_cardbus_quirks *);
184
185 const struct tulip_cardbus_product *
186 tlp_cardbus_lookup(const struct cardbus_attach_args *ca)
187 {
188 const struct tulip_cardbus_product *tcp;
189
190 for (tcp = tlp_cardbus_products;
191 tlp_chip_names[tcp->tcp_chip] != NULL;
192 tcp++) {
193 if (PCI_VENDOR(ca->ca_id) == tcp->tcp_vendor &&
194 PCI_PRODUCT(ca->ca_id) == tcp->tcp_product)
195 return (tcp);
196 }
197 return (NULL);
198 }
199
200 void
201 tlp_cardbus_get_quirks(struct tulip_cardbus_softc *csc, const u_int8_t *enaddr, const struct tlp_cardbus_quirks *tpq)
202 {
203
204 for (; tpq->tpq_func != NULL; tpq++) {
205 if (tpq->tpq_oui[0] == enaddr[0] &&
206 tpq->tpq_oui[1] == enaddr[1] &&
207 tpq->tpq_oui[2] == enaddr[2]) {
208 (*tpq->tpq_func)(csc, enaddr);
209 return;
210 }
211 }
212 }
213
214 int
215 tlp_cardbus_match(device_t parent, cfdata_t match,
216 void *aux)
217 {
218 struct cardbus_attach_args *ca = aux;
219
220 if (tlp_cardbus_lookup(ca) != NULL)
221 return (1);
222
223 return (0);
224 }
225
226 void
227 tlp_cardbus_attach(device_t parent, device_t self,
228 void *aux)
229 {
230 struct tulip_cardbus_softc *csc = device_private(self);
231 struct tulip_softc *sc = &csc->sc_tulip;
232 struct cardbus_attach_args *ca = aux;
233 cardbus_devfunc_t ct = ca->ca_ct;
234 const struct tulip_cardbus_product *tcp;
235 u_int8_t enaddr[ETHER_ADDR_LEN];
236 bus_addr_t adr;
237 pcireg_t reg;
238
239 sc->sc_dev = self;
240 sc->sc_devno = 0;
241 sc->sc_dmat = ca->ca_dmat;
242 csc->sc_ct = ct;
243 csc->sc_tag = ca->ca_tag;
244
245 tcp = tlp_cardbus_lookup(ca);
246 if (tcp == NULL) {
247 printf("\n");
248 panic("tlp_cardbus_attach: impossible");
249 }
250 sc->sc_chip = tcp->tcp_chip;
251
252 /*
253 * By default, Tulip registers are 8 bytes long (4 bytes
254 * followed by a 4 byte pad).
255 */
256 sc->sc_regshift = 3;
257
258 /*
259 * Power management hooks.
260 */
261 sc->sc_enable = tlp_cardbus_enable;
262 sc->sc_disable = tlp_cardbus_disable;
263 sc->sc_power = tlp_cardbus_power;
264
265 /*
266 * Get revision info, and set some chip-specific variables.
267 */
268 sc->sc_rev = PCI_REVISION(ca->ca_class);
269 switch (sc->sc_chip) {
270 case TULIP_CHIP_21142:
271 if (sc->sc_rev >= 0x20)
272 sc->sc_chip = TULIP_CHIP_21143;
273 break;
274
275 case TULIP_CHIP_AN985:
276 /*
277 * The AN983 and AN985 are very similar, and are
278 * differentiated by a "signature" register that
279 * is like, but not identical, to a PCI ID register.
280 */
281 reg = Cardbus_conf_read(ct, csc->sc_tag, 0x80);
282 switch (reg) {
283 case 0x09811317:
284 sc->sc_chip = TULIP_CHIP_AN985;
285 break;
286
287 case 0x09851317:
288 sc->sc_chip = TULIP_CHIP_AN983;
289 break;
290
291 }
292 break;
293
294 default:
295 /* Nothing. -- to make gcc happy */
296 break;
297 }
298
299 printf(": %s Ethernet, pass %d.%d\n",
300 tlp_chip_names[sc->sc_chip],
301 (sc->sc_rev >> 4) & 0xf, sc->sc_rev & 0xf);
302
303 /*
304 * Map the device.
305 */
306 csc->sc_csr = PCI_COMMAND_MASTER_ENABLE;
307 if (Cardbus_mapreg_map(ct, TULIP_PCI_MMBA,
308 PCI_MAPREG_TYPE_MEM, 0, &sc->sc_st, &sc->sc_sh, &adr,
309 &csc->sc_mapsize) == 0) {
310 #if rbus
311 #else
312 (*ct->ct_cf->cardbus_mem_open)(cc, 0, adr, adr+csc->sc_mapsize);
313 #endif
314 csc->sc_csr |= PCI_COMMAND_MEM_ENABLE;
315 csc->sc_bar_reg = TULIP_PCI_MMBA;
316 csc->sc_bar_val = adr | PCI_MAPREG_TYPE_MEM;
317 } else if (Cardbus_mapreg_map(ct, TULIP_PCI_IOBA,
318 PCI_MAPREG_TYPE_IO, 0, &sc->sc_st, &sc->sc_sh, &adr,
319 &csc->sc_mapsize) == 0) {
320 #if rbus
321 #else
322 (*ct->ct_cf->cardbus_io_open)(cc, 0, adr, adr+csc->sc_mapsize);
323 #endif
324 csc->sc_csr |= PCI_COMMAND_IO_ENABLE;
325 csc->sc_bar_reg = TULIP_PCI_IOBA;
326 csc->sc_bar_val = adr | PCI_MAPREG_TYPE_IO;
327 } else {
328 aprint_error_dev(self, "unable to map device registers\n");
329 return;
330 }
331
332 /*
333 * Bring the chip out of powersave mode and initialize the
334 * configuration registers.
335 */
336 tlp_cardbus_setup(csc);
337
338 /*
339 * Read the contents of the Ethernet Address ROM/SROM.
340 */
341 switch (sc->sc_chip) {
342 case TULIP_CHIP_X3201_3:
343 /*
344 * No SROM on this chip.
345 */
346 break;
347
348 default:
349 if (tlp_read_srom(sc) == 0)
350 goto cant_cope;
351 break;
352 }
353
354 /*
355 * Deal with chip/board quirks. This includes setting up
356 * the mediasw, and extracting the Ethernet address from
357 * the rombuf.
358 */
359 switch (sc->sc_chip) {
360 case TULIP_CHIP_21142:
361 case TULIP_CHIP_21143:
362 /* Check for new format SROM. */
363 if (tlp_isv_srom_enaddr(sc, enaddr) != 0) {
364 /*
365 * We start out with the 2114x ISV media switch.
366 * When we search for quirks, we may change to
367 * a different switch.
368 */
369 sc->sc_mediasw = &tlp_2114x_isv_mediasw;
370 } else if (tlp_parse_old_srom(sc, enaddr) == 0) {
371 /*
372 * Not an ISV SROM, and not in old DEC Address
373 * ROM format. Try to snarf it out of the CIS.
374 */
375 if (ca->ca_cis.funce.network.netid_present == 0)
376 goto cant_cope;
377
378 /* Grab the MAC address from the CIS. */
379 memcpy(enaddr, ca->ca_cis.funce.network.netid,
380 sizeof(enaddr));
381 }
382
383 /*
384 * Deal with any quirks this board might have.
385 */
386 tlp_cardbus_get_quirks(csc, enaddr, tlp_cardbus_21142_quirks);
387
388 /*
389 * If we don't already have a media switch, default to
390 * MII-over-SIO, with no special reset routine.
391 */
392 if (sc->sc_mediasw == NULL) {
393 printf("%s: defaulting to MII-over-SIO; no bets...\n",
394 device_xname(self));
395 sc->sc_mediasw = &tlp_sio_mii_mediasw;
396 }
397 break;
398
399 case TULIP_CHIP_AN983:
400 case TULIP_CHIP_AN985:
401 /*
402 * The ADMtek AN985's Ethernet address is located
403 * at offset 8 of its EEPROM.
404 */
405 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN);
406
407 /*
408 * The ADMtek AN985 can be configured in Single-Chip
409 * mode or MAC-only mode. Single-Chip uses the built-in
410 * PHY, MAC-only has an external PHY (usually HomePNA).
411 * The selection is based on an EEPROM setting, and both
412 * PHYs are access via MII attached to SIO.
413 *
414 * The AN985 "ghosts" the internal PHY onto all
415 * MII addresses, so we have to use a media init
416 * routine that limits the search.
417 * XXX How does this work with MAC-only mode?
418 */
419 sc->sc_mediasw = &tlp_an985_mediasw;
420 break;
421
422 case TULIP_CHIP_X3201_3:
423 /*
424 * The X3201 doesn't have an SROM. Lift the MAC address
425 * from the CIS. Also, we have a special media switch:
426 * MII-on-SIO, plus some special GPIO setup.
427 */
428 memcpy(enaddr, ca->ca_cis.funce.network.netid, sizeof(enaddr));
429 sc->sc_reset = tlp_cardbus_x3201_reset;
430 sc->sc_mediasw = &tlp_sio_mii_mediasw;
431 break;
432
433 default:
434 cant_cope:
435 printf("%s: sorry, unable to handle your board\n",
436 device_xname(self));
437 return;
438 }
439
440 /* Remember which interrupt line. */
441 csc->sc_intrline = ca->ca_intrline;
442
443 /*
444 * Finish off the attach.
445 */
446 tlp_attach(sc, enaddr);
447
448 /*
449 * Power down the socket.
450 */
451 Cardbus_function_disable(csc->sc_ct);
452 }
453
454 int
455 tlp_cardbus_detach(device_t self, int flags)
456 {
457 struct tulip_cardbus_softc *csc = device_private(self);
458 struct tulip_softc *sc = &csc->sc_tulip;
459 struct cardbus_devfunc *ct = csc->sc_ct;
460 int rv;
461
462 #if defined(DIAGNOSTIC)
463 if (ct == NULL)
464 panic("%s: data structure lacks", device_xname(self));
465 #endif
466
467 rv = tlp_detach(sc);
468 if (rv)
469 return (rv);
470
471 /*
472 * Unhook the interrupt handler.
473 */
474 if (csc->sc_ih != NULL)
475 cardbus_intr_disestablish(ct->ct_cc, ct->ct_cf, csc->sc_ih);
476
477 /*
478 * Release bus space and close window.
479 */
480 if (csc->sc_bar_reg != 0)
481 Cardbus_mapreg_unmap(ct, csc->sc_bar_reg,
482 sc->sc_st, sc->sc_sh, csc->sc_mapsize);
483
484 return (0);
485 }
486
487 int
488 tlp_cardbus_enable(struct tulip_softc *sc)
489 {
490 struct tulip_cardbus_softc *csc = (void *) sc;
491 cardbus_devfunc_t ct = csc->sc_ct;
492 cardbus_chipset_tag_t cc = ct->ct_cc;
493 cardbus_function_tag_t cf = ct->ct_cf;
494
495 /*
496 * Power on the socket.
497 */
498 Cardbus_function_enable(ct);
499
500 /*
501 * Set up the PCI configuration registers.
502 */
503 tlp_cardbus_setup(csc);
504
505 /*
506 * Map and establish the interrupt.
507 */
508 csc->sc_ih = cardbus_intr_establish(cc, cf, csc->sc_intrline, IPL_NET,
509 tlp_intr, sc);
510 if (csc->sc_ih == NULL) {
511 aprint_error_dev(sc->sc_dev,
512 "unable to establish interrupt\n");
513 Cardbus_function_disable(csc->sc_ct);
514 return (1);
515 }
516 return (0);
517 }
518
519 void
520 tlp_cardbus_disable(struct tulip_softc *sc)
521 {
522 struct tulip_cardbus_softc *csc = (void *) sc;
523 cardbus_devfunc_t ct = csc->sc_ct;
524 cardbus_chipset_tag_t cc = ct->ct_cc;
525 cardbus_function_tag_t cf = ct->ct_cf;
526
527 /* Unhook the interrupt handler. */
528 cardbus_intr_disestablish(cc, cf, csc->sc_ih);
529 csc->sc_ih = NULL;
530
531 /* Power down the socket. */
532 Cardbus_function_disable(ct);
533 }
534
535 void
536 tlp_cardbus_power(struct tulip_softc *sc, int why)
537 {
538
539 switch (why) {
540 case PWR_RESUME:
541 tlp_cardbus_enable(sc);
542 break;
543 case PWR_SUSPEND:
544 tlp_cardbus_disable(sc);
545 break;
546 }
547 }
548
549 void
550 tlp_cardbus_setup(struct tulip_cardbus_softc *csc)
551 {
552 struct tulip_softc *sc = &csc->sc_tulip;
553 cardbus_devfunc_t ct = csc->sc_ct;
554 pcireg_t reg;
555
556 /*
557 * Check to see if the device is in power-save mode, and
558 * bring it out if necessary.
559 */
560 switch (sc->sc_chip) {
561 case TULIP_CHIP_21142:
562 case TULIP_CHIP_21143:
563 case TULIP_CHIP_X3201_3:
564 /*
565 * Clear the "sleep mode" bit in the CFDA register.
566 */
567 reg = Cardbus_conf_read(ct, csc->sc_tag, TULIP_PCI_CFDA);
568 if (reg & (CFDA_SLEEP|CFDA_SNOOZE))
569 Cardbus_conf_write(ct, csc->sc_tag, TULIP_PCI_CFDA,
570 reg & ~(CFDA_SLEEP|CFDA_SNOOZE));
571 break;
572
573 default:
574 /* Nothing. -- to make gcc happy */
575 break;
576 }
577
578 (void)cardbus_set_powerstate(ct, csc->sc_tag, PCI_PWR_D0);
579
580 /* Program the BAR. */
581 Cardbus_conf_write(ct, csc->sc_tag, csc->sc_bar_reg, csc->sc_bar_val);
582
583 /* Enable the appropriate bits in the PCI CSR. */
584 reg = Cardbus_conf_read(ct, csc->sc_tag, PCI_COMMAND_STATUS_REG);
585 reg &= ~(PCI_COMMAND_IO_ENABLE|PCI_COMMAND_MEM_ENABLE);
586 reg |= csc->sc_csr;
587 Cardbus_conf_write(ct, csc->sc_tag, PCI_COMMAND_STATUS_REG, reg);
588
589 /*
590 * Make sure the latency timer is set to some reasonable
591 * value.
592 */
593 reg = Cardbus_conf_read(ct, csc->sc_tag, PCI_BHLC_REG);
594 if (PCI_LATTIMER(reg) < 0x20) {
595 reg &= ~(PCI_LATTIMER_MASK << PCI_LATTIMER_SHIFT);
596 reg |= (0x20 << PCI_LATTIMER_SHIFT);
597 Cardbus_conf_write(ct, csc->sc_tag, PCI_BHLC_REG, reg);
598 }
599 }
600
601 void
602 tlp_cardbus_x3201_reset(struct tulip_softc *sc)
603 {
604 u_int32_t reg;
605
606 reg = TULIP_READ(sc, CSR_SIAGEN);
607
608 /* make GP[2,0] outputs */
609 TULIP_WRITE(sc, CSR_SIAGEN, (reg & ~SIAGEN_MD) | SIAGEN_CWE |
610 0x00050000);
611 TULIP_WRITE(sc, CSR_SIAGEN, (reg & ~SIAGEN_CWE) | SIAGEN_MD);
612 }
613
614 void
615 tlp_cardbus_lxt_quirks(struct tulip_cardbus_softc *csc,
616 const u_int8_t *enaddr)
617 {
618 struct tulip_softc *sc = &csc->sc_tulip;
619
620 sc->sc_mediasw = &tlp_sio_mii_mediasw;
621 }
622