if_tlp_cardbus.c revision 1.8
1 /* $NetBSD: if_tlp_cardbus.c,v 1.8 2000/01/25 15:29:43 mycroft Exp $ */ 2 3 /*- 4 * Copyright (c) 1999 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * CardBus bus front-end for the Digital Semiconductor ``Tulip'' (21x4x) 42 * Ethernet controller family driver. 43 * 44 * TODO: 45 * 46 * - power management 47 * - add support for the Xircom clone 48 */ 49 50 #include "opt_inet.h" 51 #include "opt_ns.h" 52 #include "bpfilter.h" 53 54 #include <sys/param.h> 55 #include <sys/systm.h> 56 #include <sys/mbuf.h> 57 #include <sys/malloc.h> 58 #include <sys/kernel.h> 59 #include <sys/socket.h> 60 #include <sys/ioctl.h> 61 #include <sys/errno.h> 62 #include <sys/device.h> 63 64 #include <machine/endian.h> 65 66 #include <net/if.h> 67 #include <net/if_dl.h> 68 #include <net/if_media.h> 69 #include <net/if_ether.h> 70 71 #if NBPFILTER > 0 72 #include <net/bpf.h> 73 #endif 74 75 #ifdef INET 76 #include <netinet/in.h> 77 #include <netinet/if_inarp.h> 78 #endif 79 80 #ifdef NS 81 #include <netns/ns.h> 82 #include <netns/ns_if.h> 83 #endif 84 85 #include <machine/bus.h> 86 #include <machine/intr.h> 87 88 #include <dev/mii/miivar.h> 89 #include <dev/mii/mii_bitbang.h> 90 91 #include <dev/ic/tulipreg.h> 92 #include <dev/ic/tulipvar.h> 93 94 #include <dev/pci/pcivar.h> 95 #include <dev/pci/pcireg.h> 96 #include <dev/pci/pcidevs.h> 97 98 #include <dev/cardbus/cardbusvar.h> 99 100 /* 101 * PCI configuration space registers used by the Tulip. 102 */ 103 #define TULIP_PCI_IOBA 0x10 /* i/o mapped base */ 104 #define TULIP_PCI_MMBA 0x14 /* memory mapped base */ 105 #define TULIP_PCI_CFDA 0x40 /* configuration driver area */ 106 107 #define CFDA_SLEEP 0x80000000 /* sleep mode */ 108 #define CFDA_SNOOZE 0x40000000 /* snooze mode */ 109 110 struct tulip_cardbus_softc { 111 struct tulip_softc sc_tulip; /* real Tulip softc */ 112 113 /* CardBus-specific goo. */ 114 void *sc_ih; /* interrupt handle */ 115 116 cardbus_devfunc_t sc_ct; /* our CardBus devfuncs */ 117 int sc_intrline; /* our interrupt line */ 118 cardbustag_t sc_tag; 119 120 int sc_cbenable; /* what CardBus access type to enable */ 121 int sc_csr; /* CSR bits */ 122 }; 123 124 int tlp_cardbus_match __P((struct device *, struct cfdata *, void *)); 125 void tlp_cardbus_attach __P((struct device *, struct device *, void *)); 126 127 struct cfattach tlp_cardbus_ca = { 128 sizeof(struct tulip_cardbus_softc), 129 tlp_cardbus_match, tlp_cardbus_attach, 130 }; 131 132 const struct tulip_cardbus_product { 133 u_int32_t tcp_vendor; /* PCI vendor ID */ 134 u_int32_t tcp_product; /* PCI product ID */ 135 tulip_chip_t tcp_chip; /* base Tulip chip type */ 136 int tcp_pmreg; /* power management register offset */ 137 } tlp_cardbus_products[] = { 138 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21142, 139 TULIP_CHIP_21142, 0xe0 }, 140 141 { 0, 0, 142 TULIP_CHIP_INVALID, 0 }, 143 }; 144 145 const char *tlp_cardbus_chip_names[] = TULIP_CHIP_NAMES; 146 147 const struct tulip_cardbus_product *tlp_cardbus_lookup 148 __P((const struct cardbus_attach_args *)); 149 150 const struct tulip_cardbus_product * 151 tlp_cardbus_lookup(ca) 152 const struct cardbus_attach_args *ca; 153 { 154 const struct tulip_cardbus_product *tcp; 155 156 for (tcp = tlp_cardbus_products; 157 tlp_cardbus_chip_names[tcp->tcp_chip] != NULL; 158 tcp++) { 159 if (PCI_VENDOR(ca->ca_id) == tcp->tcp_vendor && 160 PCI_PRODUCT(ca->ca_id) == tcp->tcp_product) 161 return (tcp); 162 } 163 return (NULL); 164 } 165 166 int 167 tlp_cardbus_match(parent, match, aux) 168 struct device *parent; 169 struct cfdata *match; 170 void *aux; 171 { 172 struct cardbus_attach_args *ca = aux; 173 174 if (tlp_cardbus_lookup(ca) != NULL) 175 return (1); 176 177 return (0); 178 } 179 180 void 181 tlp_cardbus_attach(parent, self, aux) 182 struct device *parent, *self; 183 void *aux; 184 { 185 struct tulip_cardbus_softc *csc = (void *) self; 186 struct tulip_softc *sc = &csc->sc_tulip; 187 struct cardbus_attach_args *ca = aux; 188 cardbus_devfunc_t ct = ca->ca_ct; 189 cardbus_chipset_tag_t cc = ct->ct_cc; 190 cardbus_function_tag_t cf = ct->ct_cf; 191 const struct tulip_cardbus_product *tcp; 192 u_int8_t enaddr[ETHER_ADDR_LEN]; 193 pcireg_t reg; 194 195 sc->sc_devno = ca->ca_device; 196 sc->sc_dmat = ca->ca_dmat; 197 csc->sc_ct = ct; 198 csc->sc_tag = ca->ca_tag; 199 csc->sc_intrline = ca->ca_intrline; 200 201 tcp = tlp_cardbus_lookup(ca); 202 if (tcp == NULL) { 203 printf("\n"); 204 panic("tlp_cardbus_attach: impossible"); 205 } 206 sc->sc_chip = tcp->tcp_chip; 207 208 /* 209 * By default, Tulip registers are 8 bytes long (4 bytes 210 * followed by a 4 byte pad). 211 */ 212 sc->sc_regshift = 3; 213 214 /* 215 * Get revision info, and set some chip-specific variables. 216 */ 217 sc->sc_rev = PCI_REVISION(ca->ca_class); 218 switch (sc->sc_chip) { 219 case TULIP_CHIP_21142: 220 if (sc->sc_rev >= 0x20) 221 sc->sc_chip = TULIP_CHIP_21143; 222 break; 223 224 default: 225 /* Nothing. */ 226 } 227 228 printf(": %s Ethernet, pass %d.%d\n", 229 tlp_cardbus_chip_names[sc->sc_chip], 230 (sc->sc_rev >> 4) & 0xf, sc->sc_rev & 0xf); 231 232 /* 233 * Check to see if the device is in power-save mode, and 234 * bring it out if necessary. 235 */ 236 switch (sc->sc_chip) { 237 case TULIP_CHIP_21142: 238 case TULIP_CHIP_21143: 239 /* 240 * Clear the "sleep mode" bit in the CFDA register. 241 */ 242 reg = cardbus_conf_read(cc, cf, ca->ca_tag, TULIP_PCI_CFDA); 243 if (reg & (CFDA_SLEEP|CFDA_SNOOZE)) 244 cardbus_conf_write(cc, cf, ca->ca_tag, TULIP_PCI_CFDA, 245 reg & ~(CFDA_SLEEP|CFDA_SNOOZE)); 246 break; 247 248 default: 249 /* Nothing. */ 250 } 251 252 if (cardbus_get_capability(cc, cf, ca->ca_tag, PCI_CAP_PWRMGMT, 0, 0)) { 253 if (tcp->tcp_pmreg == 0) { 254 printf("%s: don't know location of PMCSR for this " 255 "chip\n", sc->sc_dev.dv_xname); 256 return; 257 } 258 reg = cardbus_conf_read(cc, cf, ca->ca_tag, 259 tcp->tcp_pmreg) & 0x03; 260 #if 1 /* XXX Probably not right for CardBus. */ 261 if (reg == 3) { 262 /* 263 * The card has lost all configuration data in 264 * this state, so punt. 265 */ 266 printf("%s: unable to wake up from power state D3\n", 267 sc->sc_dev.dv_xname); 268 return; 269 } 270 #endif 271 if (reg != 0) { 272 printf("%s: waking up from power state D%d\n", 273 sc->sc_dev.dv_xname, reg); 274 cardbus_conf_write(cc, cf, ca->ca_tag, 275 tcp->tcp_pmreg, 0); 276 } 277 } 278 279 /* 280 * Map the device. 281 */ 282 csc->sc_csr = PCI_COMMAND_MASTER_ENABLE; 283 if (Cardbus_mapreg_map(csc->sc_ct, TULIP_PCI_MMBA, 284 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0, 285 &sc->sc_st, &sc->sc_sh, NULL, NULL) == 0) { 286 csc->sc_cbenable = CARDBUS_MEM_ENABLE; 287 csc->sc_csr |= PCI_COMMAND_MEM_ENABLE; 288 } else if (Cardbus_mapreg_map(csc->sc_ct, TULIP_PCI_IOBA, 289 PCI_MAPREG_TYPE_IO, 0, &sc->sc_st, &sc->sc_sh, NULL, NULL) == 0) { 290 csc->sc_cbenable = CARDBUS_IO_ENABLE; 291 csc->sc_csr |= PCI_COMMAND_IO_ENABLE; 292 } else { 293 printf("%s: unable to map device registers\n", 294 sc->sc_dev.dv_xname); 295 return; 296 } 297 298 /* Make sure the right access type is on the CardBus bridge. */ 299 (*ct->ct_cf->cardbus_ctrl)(cc, csc->sc_cbenable); 300 (*ct->ct_cf->cardbus_ctrl)(cc, CARDBUS_BM_ENABLE); 301 302 /* Enable the appropriate bits in the PCI CSR. */ 303 reg = cardbus_conf_read(cc, cf, ca->ca_tag, PCI_COMMAND_STATUS_REG); 304 reg &= ~(PCI_COMMAND_IO_ENABLE|PCI_COMMAND_MEM_ENABLE); 305 reg |= csc->sc_csr; 306 cardbus_conf_write(cc, cf, ca->ca_tag, PCI_COMMAND_STATUS_REG, reg); 307 308 /* 309 * Make sure the latency timer is set to some reasonable 310 * value. 311 */ 312 reg = cardbus_conf_read(cc, cf, ca->ca_tag, PCI_BHLC_REG); 313 if (PCI_LATTIMER(reg) < 0x20) { 314 reg &= ~(PCI_LATTIMER_MASK << PCI_LATTIMER_SHIFT); 315 reg |= (0x20 << PCI_LATTIMER_SHIFT); 316 cardbus_conf_write(cc, cf, ca->ca_tag, PCI_BHLC_REG, reg); 317 } 318 319 /* 320 * Read the contents of the Ethernet Address ROM/SROM. Some 321 * chips have a 128 byte SROM (6 address bits), and some 322 * have a 512 byte SROM (8 address bits). 323 */ 324 sc->sc_srom_addrbits = 6; 325 try_again: 326 memset(sc->sc_srom, 0, sizeof(sc->sc_srom)); 327 tlp_read_srom(sc, 0, TULIP_ROM_SIZE(sc->sc_srom_addrbits) >> 1, 328 sc->sc_srom); 329 #if 0 330 { 331 int i; 332 333 printf("SROM CONTENTS:"); 334 for (i = 0; i < TULIP_ROM_SIZE(sc->sc_srom_addrbits); i++) { 335 if ((i % 8) == 0) 336 printf("\n\t"); 337 printf("0x%02x ", sc->sc_srom[i]); 338 } 339 printf("\n"); 340 } 341 #endif 342 343 /* 344 * Deal with chip/board quirks. This includes setting up 345 * the mediasw, and extracting the Ethernet address from 346 * the rombuf. 347 */ 348 switch (sc->sc_chip) { 349 case TULIP_CHIP_21142: 350 case TULIP_CHIP_21143: 351 /* Check for new format SROM. */ 352 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 353 /* 354 * Not an ISV SROM; can't cope, for now. 355 */ 356 goto cant_cope; 357 } else { 358 /* 359 * We start out with the 2114x ISV media switch. 360 * When we search for quirks, we may change to 361 * a different switch. 362 */ 363 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 364 } 365 366 /* 367 * Bail out now if we can't deal with this board. 368 */ 369 if (sc->sc_mediasw == NULL) 370 goto cant_cope; 371 break; 372 373 default: 374 cant_cope: 375 /* 376 * Try reading it again, with larger SROM 377 * size, if we haven't already. 378 */ 379 if (sc->sc_srom_addrbits != 8) { 380 sc->sc_srom_addrbits = 8; 381 goto try_again; 382 } 383 384 printf("%s: sorry, unable to handle your board\n", 385 sc->sc_dev.dv_xname); 386 return; 387 } 388 389 /* 390 * Map and establish the interrupt. 391 */ 392 csc->sc_ih = cardbus_intr_establish(cc, cf, ca->ca_intrline, IPL_NET, 393 tlp_intr, sc); 394 if (csc->sc_ih == NULL) { 395 printf("%s: unable to establish interrupt at %d\n", 396 sc->sc_dev.dv_xname, ca->ca_intrline); 397 return; 398 } 399 printf("%s: interrupting at %d\n", sc->sc_dev.dv_xname, 400 ca->ca_intrline); 401 402 /* 403 * Finish off the attach. 404 */ 405 tlp_attach(sc, enaddr); 406 } 407
Indexes created Mon Sep 29 21:09:56 GMT 2025