njs_cardbus.c revision 1.2.2.2
1 1.2.2.2 tron /* $NetBSD: njs_cardbus.c,v 1.2.2.2 2004/08/30 09:24:58 tron Exp $ */ 2 1.2.2.2 tron 3 1.2.2.2 tron /*- 4 1.2.2.2 tron * Copyright (c) 2004 The NetBSD Foundation, Inc. 5 1.2.2.2 tron * All rights reserved. 6 1.2.2.2 tron * 7 1.2.2.2 tron * This code is derived from software contributed to The NetBSD Foundation 8 1.2.2.2 tron * by ITOH Yasufumi. 9 1.2.2.2 tron * 10 1.2.2.2 tron * Redistribution and use in source and binary forms, with or without 11 1.2.2.2 tron * modification, are permitted provided that the following conditions 12 1.2.2.2 tron * are met: 13 1.2.2.2 tron * 1. Redistributions of source code must retain the above copyright 14 1.2.2.2 tron * notice, this list of conditions and the following disclaimer. 15 1.2.2.2 tron * 2. Redistributions in binary form must reproduce the above copyright 16 1.2.2.2 tron * notice, this list of conditions and the following disclaimer in the 17 1.2.2.2 tron * documentation and/or other materials provided with the distribution. 18 1.2.2.2 tron * 3. All advertising materials mentioning features or use of this software 19 1.2.2.2 tron * must display the following acknowledgement: 20 1.2.2.2 tron * This product includes software developed by the NetBSD 21 1.2.2.2 tron * Foundation, Inc. and its contributors. 22 1.2.2.2 tron * 4. Neither the name of The NetBSD Foundation nor the names of its 23 1.2.2.2 tron * contributors may be used to endorse or promote products derived 24 1.2.2.2 tron * from this software without specific prior written permission. 25 1.2.2.2 tron * 26 1.2.2.2 tron * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 1.2.2.2 tron * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 1.2.2.2 tron * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 1.2.2.2 tron * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 1.2.2.2 tron * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 1.2.2.2 tron * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 1.2.2.2 tron * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 1.2.2.2 tron * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 1.2.2.2 tron * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 1.2.2.2 tron * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 1.2.2.2 tron * POSSIBILITY OF SUCH DAMAGE. 37 1.2.2.2 tron */ 38 1.2.2.2 tron 39 1.2.2.2 tron #include <sys/cdefs.h> 40 1.2.2.2 tron __KERNEL_RCSID(0, "$NetBSD: njs_cardbus.c,v 1.2.2.2 2004/08/30 09:24:58 tron Exp $"); 41 1.2.2.2 tron 42 1.2.2.2 tron #include <sys/param.h> 43 1.2.2.2 tron #include <sys/systm.h> 44 1.2.2.2 tron #include <sys/kernel.h> 45 1.2.2.2 tron #include <sys/device.h> 46 1.2.2.2 tron 47 1.2.2.2 tron #include <machine/bus.h> 48 1.2.2.2 tron #include <machine/intr.h> 49 1.2.2.2 tron 50 1.2.2.2 tron #include <dev/scsipi/scsi_all.h> 51 1.2.2.2 tron #include <dev/scsipi/scsipi_all.h> 52 1.2.2.2 tron #include <dev/scsipi/scsiconf.h> 53 1.2.2.2 tron 54 1.2.2.2 tron #include <dev/cardbus/cardbusvar.h> 55 1.2.2.2 tron #include <dev/pci/pcidevs.h> 56 1.2.2.2 tron 57 1.2.2.2 tron #include <dev/ic/ninjascsi32reg.h> 58 1.2.2.2 tron #include <dev/ic/ninjascsi32var.h> 59 1.2.2.2 tron 60 1.2.2.2 tron #define NJSC32_CARDBUS_BASEADDR_IO CARDBUS_BASE0_REG 61 1.2.2.2 tron #define NJSC32_CARDBUS_BASEADDR_MEM CARDBUS_BASE1_REG 62 1.2.2.2 tron 63 1.2.2.2 tron struct njsc32_cardbus_softc { 64 1.2.2.2 tron struct njsc32_softc sc_njsc32; 65 1.2.2.2 tron 66 1.2.2.2 tron /* CardBus-specific goo */ 67 1.2.2.2 tron cardbus_devfunc_t sc_ct; /* our CardBus devfuncs */ 68 1.2.2.2 tron int sc_intrline; /* our interrupt line */ 69 1.2.2.2 tron cardbustag_t sc_tag; 70 1.2.2.2 tron 71 1.2.2.2 tron bus_space_handle_t sc_regmaph; 72 1.2.2.2 tron bus_size_t sc_regmap_size; 73 1.2.2.2 tron }; 74 1.2.2.2 tron 75 1.2.2.2 tron int njs_cardbus_match __P((struct device *, struct cfdata *, void *)); 76 1.2.2.2 tron void njs_cardbus_attach __P((struct device *, struct device *, void *)); 77 1.2.2.2 tron int njs_cardbus_detach __P((struct device *, int)); 78 1.2.2.2 tron 79 1.2.2.2 tron CFATTACH_DECL(njs_cardbus, sizeof(struct njsc32_cardbus_softc), 80 1.2.2.2 tron njs_cardbus_match, njs_cardbus_attach, njs_cardbus_detach, NULL); 81 1.2.2.2 tron 82 1.2.2.2 tron const struct njsc32_cardbus_product { 83 1.2.2.2 tron cardbus_vendor_id_t p_vendor; 84 1.2.2.2 tron cardbus_product_id_t p_product; 85 1.2.2.2 tron njsc32_model_t p_model; 86 1.2.2.2 tron int p_clk; /* one of NJSC32_CLK_* */ 87 1.2.2.2 tron } njsc32_cardbus_products[] = { 88 1.2.2.2 tron { PCI_VENDOR_IODATA, PCI_PRODUCT_IODATA_CBSCII, 89 1.2.2.2 tron NJSC32_MODEL_32BI, NJSC32_CLK_40M }, 90 1.2.2.2 tron { PCI_VENDOR_WORKBIT, PCI_PRODUCT_WORKBIT_NJSC32BI, 91 1.2.2.2 tron NJSC32_MODEL_32BI, NJSC32_CLK_40M }, 92 1.2.2.2 tron { PCI_VENDOR_WORKBIT, PCI_PRODUCT_WORKBIT_NJSC32UDE, 93 1.2.2.2 tron NJSC32_MODEL_32UDE | NJSC32_FLAG_DUALEDGE, NJSC32_CLK_40M }, 94 1.2.2.2 tron { PCI_VENDOR_WORKBIT, PCI_PRODUCT_WORKBIT_NJSC32BI_KME, 95 1.2.2.2 tron NJSC32_MODEL_32BI, NJSC32_CLK_40M }, 96 1.2.2.2 tron 97 1.2.2.2 tron { 0, 0, 98 1.2.2.2 tron NJSC32_MODEL_INVALID, 0 }, 99 1.2.2.2 tron }; 100 1.2.2.2 tron 101 1.2.2.2 tron const struct njsc32_cardbus_product *njs_cardbus_lookup 102 1.2.2.2 tron __P((const struct cardbus_attach_args *)); 103 1.2.2.2 tron 104 1.2.2.2 tron const struct njsc32_cardbus_product * 105 1.2.2.2 tron njs_cardbus_lookup(ca) 106 1.2.2.2 tron const struct cardbus_attach_args *ca; 107 1.2.2.2 tron { 108 1.2.2.2 tron const struct njsc32_cardbus_product *p; 109 1.2.2.2 tron 110 1.2.2.2 tron for (p = njsc32_cardbus_products; 111 1.2.2.2 tron p->p_model != NJSC32_MODEL_INVALID; p++) { 112 1.2.2.2 tron if (CARDBUS_VENDOR(ca->ca_id) == p->p_vendor && 113 1.2.2.2 tron CARDBUS_PRODUCT(ca->ca_id) == p->p_product) 114 1.2.2.2 tron return p; 115 1.2.2.2 tron } 116 1.2.2.2 tron 117 1.2.2.2 tron return NULL; 118 1.2.2.2 tron } 119 1.2.2.2 tron 120 1.2.2.2 tron int 121 1.2.2.2 tron njs_cardbus_match(parent, match, aux) 122 1.2.2.2 tron struct device *parent; 123 1.2.2.2 tron struct cfdata *match; 124 1.2.2.2 tron void *aux; 125 1.2.2.2 tron { 126 1.2.2.2 tron struct cardbus_attach_args *ca = aux; 127 1.2.2.2 tron 128 1.2.2.2 tron if (njs_cardbus_lookup(ca)) 129 1.2.2.2 tron return 1; 130 1.2.2.2 tron 131 1.2.2.2 tron return 0; 132 1.2.2.2 tron } 133 1.2.2.2 tron 134 1.2.2.2 tron void 135 1.2.2.2 tron njs_cardbus_attach(parent, self, aux) 136 1.2.2.2 tron struct device *parent, *self; 137 1.2.2.2 tron void *aux; 138 1.2.2.2 tron { 139 1.2.2.2 tron struct cardbus_attach_args *ca = aux; 140 1.2.2.2 tron struct njsc32_cardbus_softc *csc = (void *) self; 141 1.2.2.2 tron struct njsc32_softc *sc = &csc->sc_njsc32; 142 1.2.2.2 tron const struct njsc32_cardbus_product *prod; 143 1.2.2.2 tron cardbus_devfunc_t ct = ca->ca_ct; 144 1.2.2.2 tron cardbus_chipset_tag_t cc = ct->ct_cc; 145 1.2.2.2 tron cardbus_function_tag_t cf = ct->ct_cf; 146 1.2.2.2 tron pcireg_t reg; 147 1.2.2.2 tron int csr; 148 1.2.2.2 tron u_int8_t latency = 0x20; 149 1.2.2.2 tron 150 1.2.2.2 tron if ((prod = njs_cardbus_lookup(ca)) == NULL) 151 1.2.2.2 tron panic("njs_cardbus_attach"); 152 1.2.2.2 tron 153 1.2.2.2 tron printf(": Workbit NinjaSCSI-32 SCSI adapter\n"); 154 1.2.2.2 tron sc->sc_model = prod->p_model; 155 1.2.2.2 tron sc->sc_clk = prod->p_clk; 156 1.2.2.2 tron 157 1.2.2.2 tron csc->sc_ct = ct; 158 1.2.2.2 tron csc->sc_tag = ca->ca_tag; 159 1.2.2.2 tron csc->sc_intrline = ca->ca_intrline; 160 1.2.2.2 tron 161 1.2.2.2 tron /* 162 1.2.2.2 tron * Map the device. 163 1.2.2.2 tron */ 164 1.2.2.2 tron csr = PCI_COMMAND_MASTER_ENABLE; 165 1.2.2.2 tron 166 1.2.2.2 tron /* 167 1.2.2.2 tron * Map registers. 168 1.2.2.2 tron * Try memory map first, and then try I/O. 169 1.2.2.2 tron */ 170 1.2.2.2 tron if (Cardbus_mapreg_map(csc->sc_ct, NJSC32_CARDBUS_BASEADDR_MEM, 171 1.2.2.2 tron PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0, 172 1.2.2.2 tron &sc->sc_regt, &csc->sc_regmaph, NULL, &csc->sc_regmap_size) == 0) { 173 1.2.2.2 tron if (bus_space_subregion(sc->sc_regt, csc->sc_regmaph, 174 1.2.2.2 tron NJSC32_MEMOFFSET_REG, NJSC32_REGSIZE, &sc->sc_regh) != 0) { 175 1.2.2.2 tron /* failed -- undo map and try I/O */ 176 1.2.2.2 tron Cardbus_mapreg_unmap(csc->sc_ct, 177 1.2.2.2 tron NJSC32_CARDBUS_BASEADDR_MEM, 178 1.2.2.2 tron sc->sc_regt, csc->sc_regmaph, csc->sc_regmap_size); 179 1.2.2.2 tron goto try_io; 180 1.2.2.2 tron } 181 1.2.2.2 tron #ifdef NJSC32_DEBUG 182 1.2.2.2 tron printf("%s: memory space mapped\n", sc->sc_dev.dv_xname); 183 1.2.2.2 tron #endif 184 1.2.2.2 tron csr |= PCI_COMMAND_MEM_ENABLE; 185 1.2.2.2 tron sc->sc_flags = NJSC32_MEM_MAPPED; 186 1.2.2.2 tron (*ct->ct_cf->cardbus_ctrl)(cc, CARDBUS_MEM_ENABLE); 187 1.2.2.2 tron } else { 188 1.2.2.2 tron try_io: 189 1.2.2.2 tron if (Cardbus_mapreg_map(csc->sc_ct, NJSC32_CARDBUS_BASEADDR_IO, 190 1.2.2.2 tron PCI_MAPREG_TYPE_IO, 0, &sc->sc_regt, &sc->sc_regh, 191 1.2.2.2 tron NULL, &csc->sc_regmap_size) == 0) { 192 1.2.2.2 tron #ifdef NJSC32_DEBUG 193 1.2.2.2 tron printf("%s: io space mapped\n", sc->sc_dev.dv_xname); 194 1.2.2.2 tron #endif 195 1.2.2.2 tron csr |= PCI_COMMAND_IO_ENABLE; 196 1.2.2.2 tron sc->sc_flags = NJSC32_IO_MAPPED; 197 1.2.2.2 tron (*ct->ct_cf->cardbus_ctrl)(cc, CARDBUS_IO_ENABLE); 198 1.2.2.2 tron } else { 199 1.2.2.2 tron printf("%s: unable to map device registers\n", 200 1.2.2.2 tron sc->sc_dev.dv_xname); 201 1.2.2.2 tron return; 202 1.2.2.2 tron } 203 1.2.2.2 tron } 204 1.2.2.2 tron 205 1.2.2.2 tron /* Make sure the right access type is on the CardBus bridge. */ 206 1.2.2.2 tron (*ct->ct_cf->cardbus_ctrl)(cc, CARDBUS_BM_ENABLE); 207 1.2.2.2 tron 208 1.2.2.2 tron /* Enable the appropriate bits in the PCI CSR. */ 209 1.2.2.2 tron reg = cardbus_conf_read(cc, cf, ca->ca_tag, PCI_COMMAND_STATUS_REG); 210 1.2.2.2 tron reg &= ~(PCI_COMMAND_IO_ENABLE|PCI_COMMAND_MEM_ENABLE); 211 1.2.2.2 tron reg |= csr; 212 1.2.2.2 tron cardbus_conf_write(cc, cf, ca->ca_tag, PCI_COMMAND_STATUS_REG, reg); 213 1.2.2.2 tron 214 1.2.2.2 tron /* 215 1.2.2.2 tron * Make sure the latency timer is set to some reasonable 216 1.2.2.2 tron * value. 217 1.2.2.2 tron */ 218 1.2.2.2 tron reg = cardbus_conf_read(cc, cf, ca->ca_tag, CARDBUS_BHLC_REG); 219 1.2.2.2 tron if (CARDBUS_LATTIMER(reg) < latency) { 220 1.2.2.2 tron reg &= ~(CARDBUS_LATTIMER_MASK << CARDBUS_LATTIMER_SHIFT); 221 1.2.2.2 tron reg |= (latency << CARDBUS_LATTIMER_SHIFT); 222 1.2.2.2 tron cardbus_conf_write(cc, cf, ca->ca_tag, CARDBUS_BHLC_REG, reg); 223 1.2.2.2 tron } 224 1.2.2.2 tron 225 1.2.2.2 tron sc->sc_dmat = ca->ca_dmat; 226 1.2.2.2 tron 227 1.2.2.2 tron /* 228 1.2.2.2 tron * Establish the interrupt. 229 1.2.2.2 tron */ 230 1.2.2.2 tron sc->sc_ih = cardbus_intr_establish(cc, cf, ca->ca_intrline, IPL_BIO, 231 1.2.2.2 tron njsc32_intr, sc); 232 1.2.2.2 tron if (sc->sc_ih == NULL) { 233 1.2.2.2 tron printf("%s: unable to establish interrupt at %d\n", 234 1.2.2.2 tron sc->sc_dev.dv_xname, ca->ca_intrline); 235 1.2.2.2 tron return; 236 1.2.2.2 tron } 237 1.2.2.2 tron printf("%s: interrupting at %d\n", 238 1.2.2.2 tron sc->sc_dev.dv_xname, ca->ca_intrline); 239 1.2.2.2 tron 240 1.2.2.2 tron /* CardBus device cannot supply termination power. */ 241 1.2.2.2 tron sc->sc_flags |= NJSC32_CANNOT_SUPPLY_TERMPWR; 242 1.2.2.2 tron 243 1.2.2.2 tron /* attach */ 244 1.2.2.2 tron njsc32_attach(sc); 245 1.2.2.2 tron } 246 1.2.2.2 tron 247 1.2.2.2 tron int 248 1.2.2.2 tron njs_cardbus_detach(self, flags) 249 1.2.2.2 tron struct device *self; 250 1.2.2.2 tron int flags; 251 1.2.2.2 tron { 252 1.2.2.2 tron struct njsc32_cardbus_softc *csc = (void *) self; 253 1.2.2.2 tron struct njsc32_softc *sc = &csc->sc_njsc32; 254 1.2.2.2 tron int rv; 255 1.2.2.2 tron 256 1.2.2.2 tron rv = njsc32_detach(sc, flags); 257 1.2.2.2 tron if (rv) 258 1.2.2.2 tron return rv; 259 1.2.2.2 tron 260 1.2.2.2 tron if (sc->sc_ih) 261 1.2.2.2 tron cardbus_intr_disestablish(csc->sc_ct->ct_cc, 262 1.2.2.2 tron csc->sc_ct->ct_cf, sc->sc_ih); 263 1.2.2.2 tron 264 1.2.2.2 tron if (sc->sc_flags & NJSC32_IO_MAPPED) 265 1.2.2.2 tron Cardbus_mapreg_unmap(csc->sc_ct, NJSC32_CARDBUS_BASEADDR_IO, 266 1.2.2.2 tron sc->sc_regt, sc->sc_regh, csc->sc_regmap_size); 267 1.2.2.2 tron if (sc->sc_flags & NJSC32_MEM_MAPPED) 268 1.2.2.2 tron Cardbus_mapreg_unmap(csc->sc_ct, NJSC32_CARDBUS_BASEADDR_MEM, 269 1.2.2.2 tron sc->sc_regt, csc->sc_regmaph, csc->sc_regmap_size); 270 1.2.2.2 tron 271 1.2.2.2 tron return 0; 272 1.2.2.2 tron } 273
Indexes created Wed Oct 29 20:09:47 GMT 2025