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rbus_ppb.c revision 1.19
      1  1.19   thorpej /*	$NetBSD: rbus_ppb.c,v 1.19 2006/03/29 06:22:38 thorpej Exp $	*/
      2   1.1       mcr 
      3   1.1       mcr /*
      4   1.1       mcr  * Copyright (c) 1999 The NetBSD Foundation, Inc.
      5   1.1       mcr  * All rights reserved.
      6   1.1       mcr  *
      7   1.1       mcr  * This code is derived from software contributed to The NetBSD Foundation
      8   1.1       mcr  * by Michael Richardson <mcr (at) sandelman.ottawa.on.ca>
      9   1.1       mcr  *
     10   1.1       mcr  * Redistribution and use in source and binary forms, with or without
     11   1.1       mcr  * modification, are permitted provided that the following conditions
     12   1.1       mcr  * are met:
     13   1.1       mcr  * 1. Redistributions of source code must retain the above copyright
     14   1.1       mcr  *    notice, this list of conditions and the following disclaimer.
     15   1.1       mcr  * 2. Redistributions in binary form must reproduce the above copyright
     16   1.1       mcr  *    notice, this list of conditions and the following disclaimer in the
     17   1.1       mcr  *    documentation and/or other materials provided with the distribution.
     18   1.1       mcr  * 3. All advertising materials mentioning features or use of this software
     19   1.1       mcr  *    must display the following acknowledgement:
     20   1.1       mcr  *	This product includes software developed by the NetBSD
     21   1.1       mcr  *	Foundation, Inc. and its contributors.
     22   1.1       mcr  * 4. Neither the name of The NetBSD Foundation nor the names of its
     23   1.1       mcr  *    contributors may be used to endorse or promote products derived
     24   1.1       mcr  *    from this software without specific prior written permission.
     25   1.1       mcr  *
     26   1.1       mcr  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     27   1.1       mcr  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     28   1.1       mcr  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     29   1.1       mcr  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     30   1.1       mcr  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     31   1.1       mcr  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     32   1.1       mcr  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     33   1.1       mcr  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     34   1.1       mcr  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     35   1.1       mcr  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     36   1.1       mcr  * POSSIBILITY OF SUCH DAMAGE.
     37   1.1       mcr  */
     38   1.1       mcr 
     39   1.1       mcr /*
     40   1.1       mcr  * CardBus front-end for the Intel/Digital DECchip 21152 PCI-PCI bridge
     41   1.1       mcr  */
     42   1.2     lukem 
     43   1.2     lukem #include <sys/cdefs.h>
     44  1.19   thorpej __KERNEL_RCSID(0, "$NetBSD: rbus_ppb.c,v 1.19 2006/03/29 06:22:38 thorpej Exp $");
     45   1.1       mcr 
     46   1.1       mcr #include <sys/param.h>
     47   1.1       mcr #include <sys/systm.h>
     48   1.1       mcr #include <sys/mbuf.h>
     49   1.1       mcr #include <sys/malloc.h>
     50   1.1       mcr #include <sys/kernel.h>
     51   1.1       mcr #include <sys/socket.h>
     52   1.1       mcr #include <sys/ioctl.h>
     53   1.1       mcr #include <sys/errno.h>
     54   1.1       mcr #include <sys/device.h>
     55   1.1       mcr 
     56   1.1       mcr #if NRND > 0
     57   1.1       mcr #include <sys/rnd.h>
     58   1.1       mcr #endif
     59   1.1       mcr 
     60   1.1       mcr #include <machine/endian.h>
     61   1.1       mcr 
     62   1.1       mcr #include <machine/bus.h>
     63   1.1       mcr #include <machine/intr.h>
     64   1.1       mcr 
     65   1.1       mcr #include <dev/pci/pcivar.h>
     66   1.1       mcr #include <dev/pci/pcireg.h>
     67   1.1       mcr #include <dev/pci/pcidevs.h>
     68   1.1       mcr #include <dev/pci/ppbreg.h>
     69   1.1       mcr 
     70   1.1       mcr #include <dev/ic/i82365reg.h>
     71   1.1       mcr #include <dev/ic/i82365var.h>
     72   1.1       mcr 
     73   1.1       mcr #include <dev/pci/pccbbreg.h>
     74   1.1       mcr #include <dev/pci/pccbbvar.h>
     75   1.1       mcr 
     76   1.1       mcr #include <dev/cardbus/cardbusvar.h>
     77  1.12   mycroft #include <dev/pci/pcidevs.h>
     78   1.1       mcr 
     79   1.1       mcr #include <i386/pci/pci_addr_fixup.h>
     80   1.1       mcr #include <i386/pci/pci_bus_fixup.h>
     81   1.1       mcr #include <i386/pci/pci_intr_fixup.h>
     82   1.1       mcr #include <i386/pci/pcibios.h>
     83   1.1       mcr 
     84   1.1       mcr struct ppb_softc;
     85   1.1       mcr 
     86  1.14     perry static int  ppb_cardbus_match(struct device *, struct cfdata *, void *);
     87  1.14     perry static void ppb_cardbus_attach(struct device *, struct device *, void *);
     88  1.14     perry static int  ppb_cardbus_detach(struct device * self, int flags);
     89  1.14     perry /*static*/ void ppb_cardbus_setup(struct ppb_softc * sc);
     90  1.14     perry /*static*/ int  ppb_cardbus_enable(struct ppb_softc * sc);
     91  1.14     perry /*static*/ void ppb_cardbus_disable(struct ppb_softc * sc);
     92  1.16  drochner static int  ppb_activate(struct device *, enum devact);
     93  1.16  drochner int rppbprint(void *, const char *);
     94  1.16  drochner int rbus_intr_fixup(pci_chipset_tag_t, int, int, int);
     95  1.16  drochner void rbus_do_header_fixup(pci_chipset_tag_t, pcitag_t, void *);
     96   1.1       mcr 
     97  1.16  drochner static void rbus_pci_phys_allocate(pci_chipset_tag_t, pcitag_t, void *);
     98  1.16  drochner 
     99  1.16  drochner static int rbus_do_phys_allocate(pci_chipset_tag_t, pcitag_t, int,
    100  1.16  drochner 				 void *, int, bus_addr_t *, bus_size_t);
    101  1.16  drochner 
    102  1.16  drochner static void rbus_pci_phys_countspace(pci_chipset_tag_t, pcitag_t, void *);
    103  1.16  drochner 
    104  1.16  drochner static int rbus_do_phys_countspace(pci_chipset_tag_t, pcitag_t, int,
    105  1.16  drochner 				   void *, int, bus_addr_t *, bus_size_t);
    106  1.16  drochner 
    107  1.16  drochner unsigned int rbus_round_up(unsigned int, unsigned int);
    108   1.1       mcr 
    109   1.1       mcr 
    110   1.1       mcr struct ppb_cardbus_softc {
    111   1.1       mcr   struct device sc_dev;
    112   1.3   thorpej   pcitag_t sc_tag;
    113   1.1       mcr   int foo;
    114   1.1       mcr };
    115   1.1       mcr 
    116   1.7   thorpej CFATTACH_DECL(rbus_ppb, sizeof(struct ppb_cardbus_softc),
    117   1.8   thorpej     ppb_cardbus_match, ppb_cardbus_attach, ppb_cardbus_detach, ppb_activate);
    118   1.1       mcr 
    119   1.1       mcr #ifdef  CBB_DEBUG
    120   1.1       mcr int rbus_ppb_debug = 0;   /* hack with kdb */
    121   1.1       mcr #define DPRINTF(X) if(rbus_ppb_debug) printf X
    122   1.1       mcr #else
    123   1.1       mcr #define DPRINTF(X)
    124   1.1       mcr #endif
    125   1.1       mcr 
    126   1.1       mcr static int
    127   1.1       mcr ppb_cardbus_match(parent, match, aux)
    128   1.1       mcr 	struct device *parent;
    129   1.1       mcr 	struct cfdata *match;
    130   1.1       mcr 	void   *aux;
    131   1.1       mcr {
    132   1.1       mcr 	struct cardbus_attach_args *ca = aux;
    133   1.1       mcr 
    134   1.1       mcr 	if (CARDBUS_VENDOR(ca->ca_id) ==  PCI_VENDOR_DEC &&
    135   1.1       mcr 	    CARDBUS_PRODUCT(ca->ca_id) == PCI_PRODUCT_DEC_21152)
    136   1.1       mcr 		return (1);
    137   1.1       mcr 
    138   1.1       mcr 	if(PCI_CLASS(ca->ca_class) == PCI_CLASS_BRIDGE &&
    139   1.1       mcr 	   PCI_SUBCLASS(ca->ca_class) == PCI_SUBCLASS_BRIDGE_PCI) {
    140   1.1       mcr 	  /* XXX */
    141   1.1       mcr 	  printf("recognizing generic bridge chip\n");
    142   1.1       mcr 	}
    143   1.1       mcr 
    144   1.1       mcr 	return (0);
    145   1.1       mcr }
    146   1.1       mcr 
    147   1.1       mcr 
    148   1.1       mcr int
    149   1.1       mcr rppbprint(aux, pnp)
    150   1.1       mcr 	void *aux;
    151   1.1       mcr 	const char *pnp;
    152   1.1       mcr {
    153   1.1       mcr 	struct pcibus_attach_args *pba = aux;
    154   1.1       mcr 
    155   1.1       mcr 	/* only PCIs can attach to PPBs; easy. */
    156   1.1       mcr 	if (pnp)
    157   1.9   thorpej 		aprint_normal("pci at %s", pnp);
    158   1.9   thorpej 	aprint_normal(" bus %d (rbus)", pba->pba_bus);
    159   1.1       mcr 	return (UNCONF);
    160   1.1       mcr }
    161   1.1       mcr 
    162   1.1       mcr int
    163   1.1       mcr rbus_intr_fixup(pci_chipset_tag_t pc,
    164   1.1       mcr 		int minbus,
    165   1.1       mcr 		int maxbus,
    166   1.1       mcr 		int line)
    167   1.1       mcr {
    168   1.1       mcr   pci_device_foreach_min(pc, minbus,
    169   1.1       mcr 			 maxbus, rbus_do_header_fixup, (void *)&line);
    170   1.1       mcr   return 0;
    171   1.1       mcr }
    172   1.1       mcr 
    173   1.1       mcr void
    174   1.1       mcr rbus_do_header_fixup(pc, tag, context)
    175   1.1       mcr      	pci_chipset_tag_t pc;
    176   1.1       mcr 	pcitag_t tag;
    177   1.1       mcr 	void *context;
    178   1.1       mcr {
    179   1.1       mcr   int pin, irq;
    180   1.1       mcr   int bus, device, function;
    181   1.1       mcr   pcireg_t intr, id;
    182   1.1       mcr   int *pline = (int *)context;
    183   1.1       mcr   int line = *pline;
    184   1.1       mcr 
    185   1.1       mcr   pci_decompose_tag(pc, tag, &bus, &device, &function);
    186   1.1       mcr   id = pci_conf_read(pc, tag, PCI_ID_REG);
    187   1.1       mcr 
    188   1.1       mcr   intr = pci_conf_read(pc, tag, PCI_INTERRUPT_REG);
    189   1.1       mcr   pin = PCI_INTERRUPT_PIN(intr);
    190   1.1       mcr   irq = PCI_INTERRUPT_LINE(intr);
    191   1.1       mcr 
    192   1.1       mcr #if 0
    193   1.1       mcr   printf("do_header %02x:%02x:%02x pin=%d => line %d\n",
    194   1.1       mcr 	 bus, device, function, pin, line);
    195   1.1       mcr #endif
    196   1.1       mcr 
    197   1.1       mcr   intr &= ~(PCI_INTERRUPT_LINE_MASK << PCI_INTERRUPT_LINE_SHIFT);
    198   1.1       mcr   intr |= (line << PCI_INTERRUPT_LINE_SHIFT);
    199   1.1       mcr   pci_conf_write(pc, tag, PCI_INTERRUPT_REG, intr);
    200   1.1       mcr 
    201   1.1       mcr }
    202   1.1       mcr 
    203  1.15     perry /*
    204   1.1       mcr  * This function takes a range of PCI bus numbers and
    205   1.1       mcr  * allocates space for all devices found in this space (the BARs) from
    206   1.1       mcr  * the rbus space maps (I/O and memory).
    207   1.1       mcr  *
    208   1.1       mcr  * It assumes that "rbus" is defined. The whole concept does.
    209   1.1       mcr  *
    210   1.1       mcr  * It uses pci_device_foreach_min() to call rbus_pci_phys_allocate.
    211   1.1       mcr  * This function is mostly stolen from
    212  1.15     perry  *     pci_addr_fixup.c:pciaddr_resource_reserve.
    213   1.1       mcr  *
    214   1.1       mcr  */
    215   1.1       mcr struct rbus_pci_addr_fixup_context {
    216   1.1       mcr   struct ppb_cardbus_softc *csc;
    217   1.1       mcr   cardbus_chipset_tag_t ct;
    218   1.1       mcr   struct cardbus_softc *sc;
    219   1.1       mcr   struct cardbus_attach_args *caa;
    220   1.1       mcr   int    minbus;
    221   1.1       mcr   int    maxbus;
    222   1.1       mcr   bus_size_t  *bussize_ioreqs;
    223   1.1       mcr   bus_size_t  *bussize_memreqs;
    224   1.1       mcr   rbus_tag_t   *iobustags;
    225   1.1       mcr   rbus_tag_t   *membustags;
    226  1.15     perry };
    227   1.1       mcr 
    228  1.15     perry unsigned int
    229  1.16  drochner rbus_round_up(unsigned int size, unsigned int minval)
    230   1.1       mcr {
    231   1.1       mcr   unsigned int power2;
    232   1.1       mcr 
    233   1.1       mcr   if(size == 0) {
    234   1.1       mcr     return 0;
    235   1.1       mcr   }
    236   1.1       mcr 
    237  1.16  drochner   power2=minval;
    238   1.1       mcr 
    239   1.1       mcr   while(power2 < (1 << 31) &&
    240   1.1       mcr 	power2 < size) {
    241   1.1       mcr     power2 = power2 << 1;
    242   1.1       mcr   }
    243  1.15     perry 
    244   1.1       mcr   return power2;
    245   1.1       mcr }
    246  1.15     perry 
    247   1.1       mcr static void
    248   1.1       mcr rbus_pci_addr_fixup(struct ppb_cardbus_softc *csc,
    249   1.1       mcr 		    cardbus_chipset_tag_t ct,
    250   1.1       mcr 		    struct cardbus_softc *sc,
    251   1.1       mcr 		    pci_chipset_tag_t     pc,
    252   1.1       mcr 		    struct cardbus_attach_args *caa,
    253   1.1       mcr 		    int minbus, int maxbus)
    254   1.1       mcr {
    255   1.1       mcr 	struct rbus_pci_addr_fixup_context rct;
    256   1.1       mcr 	int    size, busnum;
    257   1.1       mcr 	bus_addr_t start;
    258   1.1       mcr 	bus_space_handle_t handle;
    259   1.1       mcr 	u_int32_t reg;
    260   1.1       mcr 
    261   1.1       mcr 	rct.csc=csc;
    262   1.1       mcr 	rct.ct=ct;
    263   1.1       mcr 	rct.sc=sc;
    264   1.1       mcr 	rct.caa=caa;
    265   1.1       mcr 	rct.minbus = minbus;
    266   1.1       mcr 	rct.maxbus = maxbus;
    267   1.1       mcr 	size = sizeof(bus_size_t)*(maxbus+1);
    268   1.1       mcr 	rct.bussize_ioreqs  = alloca(size);
    269   1.1       mcr 	rct.bussize_memreqs = alloca(size);
    270   1.1       mcr 	rct.iobustags = alloca(maxbus * sizeof(rbus_tag_t));
    271   1.1       mcr 	rct.membustags = alloca(maxbus * sizeof(rbus_tag_t));
    272   1.1       mcr 
    273   1.1       mcr 	bzero(rct.bussize_ioreqs, size);
    274   1.1       mcr 	bzero(rct.bussize_memreqs, size);
    275   1.1       mcr 
    276   1.1       mcr 	printf("%s: sizing buses %d-%d\n",
    277   1.1       mcr 	       rct.csc->sc_dev.dv_xname,
    278   1.1       mcr 	       minbus, maxbus);
    279   1.1       mcr 
    280   1.1       mcr 	pci_device_foreach_min(pc, minbus, maxbus,
    281   1.1       mcr 			       rbus_pci_phys_countspace, &rct);
    282   1.1       mcr 
    283   1.1       mcr 	/*
    284   1.1       mcr 	 * we need to determine amount of address space for each
    285   1.1       mcr 	 * bus. To do this, we have to roll up amounts and then
    286   1.1       mcr 	 * we need to divide up the cardbus's extent to allocate
    287   1.1       mcr 	 * some space to each bus.
    288   1.1       mcr 	 */
    289   1.1       mcr 
    290   1.1       mcr 	for(busnum=maxbus; busnum > minbus; busnum--) {
    291   1.1       mcr 	  if(pci_bus_parent[busnum] != 0) {
    292   1.1       mcr 	    if(pci_bus_parent[busnum] < minbus ||
    293   1.1       mcr 	       pci_bus_parent[busnum] >= maxbus) {
    294   1.1       mcr 	      printf("%s: bus %d has illegal parent %d\n",
    295   1.1       mcr 		     rct.csc->sc_dev.dv_xname,
    296   1.1       mcr 		     busnum, pci_bus_parent[busnum]);
    297   1.1       mcr 	      continue;
    298   1.1       mcr 	    }
    299   1.1       mcr 
    300   1.1       mcr 	    /* first round amount of space up */
    301   1.1       mcr 	    rct.bussize_ioreqs[busnum] =
    302   1.1       mcr 	      rbus_round_up(rct.bussize_ioreqs[busnum],  PPB_IO_MIN);
    303   1.1       mcr 	    rct.bussize_ioreqs[pci_bus_parent[busnum]] +=
    304   1.1       mcr 	      rct.bussize_ioreqs[busnum];
    305   1.1       mcr 
    306   1.1       mcr 	    rct.bussize_memreqs[busnum] =
    307   1.1       mcr 	      rbus_round_up(rct.bussize_memreqs[busnum], PPB_MEM_MIN);
    308   1.1       mcr 	    rct.bussize_memreqs[pci_bus_parent[busnum]] +=
    309   1.1       mcr 	      rct.bussize_memreqs[busnum];
    310   1.1       mcr 
    311   1.1       mcr 	  }
    312   1.1       mcr 	}
    313   1.1       mcr 
    314   1.1       mcr 	rct.bussize_ioreqs[minbus] =
    315   1.1       mcr 	  rbus_round_up(rct.bussize_ioreqs[minbus], 4096);
    316   1.1       mcr 	rct.bussize_memreqs[minbus] =
    317   1.1       mcr 	  rbus_round_up(rct.bussize_memreqs[minbus], 8);
    318   1.1       mcr 
    319   1.1       mcr 	printf("%s: total needs IO %08lx and MEM %08lx\n",
    320   1.1       mcr 	       rct.csc->sc_dev.dv_xname,
    321   1.1       mcr 	       rct.bussize_ioreqs[minbus], rct.bussize_memreqs[minbus]);
    322   1.1       mcr 
    323   1.1       mcr 	if(!caa->ca_rbus_iot) {
    324   1.1       mcr 	  panic("no iot bus");
    325   1.1       mcr 	}
    326   1.1       mcr 
    327   1.1       mcr 	if(rct.bussize_ioreqs[minbus]) {
    328   1.1       mcr 	  if(rbus_space_alloc(caa->ca_rbus_iot, 0,
    329   1.1       mcr 			      rct.bussize_ioreqs[minbus],
    330   1.1       mcr 			      rct.bussize_ioreqs[minbus]-1 /* mask  */,
    331   1.1       mcr 			      rct.bussize_ioreqs[minbus] /* align */,
    332   1.1       mcr 			      /* flags */ 0,
    333   1.1       mcr 			      &start,
    334   1.1       mcr 			      &handle) != 0) {
    335   1.5    provos 	    panic("rbus_ppb: can not allocate %ld bytes in IO bus %d",
    336   1.1       mcr 		  rct.bussize_ioreqs[minbus], minbus);
    337   1.1       mcr 	  }
    338   1.1       mcr 	  rct.iobustags[minbus]=rbus_new(caa->ca_rbus_iot,
    339  1.15     perry 					 start,
    340   1.1       mcr 					 rct.bussize_ioreqs[minbus],
    341   1.1       mcr 					 0 /* offset to add to physical address
    342   1.1       mcr 					      to make processor address */,
    343   1.1       mcr 					 RBUS_SPACE_DEDICATE);
    344   1.1       mcr 	}
    345   1.1       mcr 
    346   1.1       mcr 	if(rct.bussize_memreqs[minbus]) {
    347   1.1       mcr 	  if(rbus_space_alloc(caa->ca_rbus_memt, 0,
    348   1.1       mcr 			      rct.bussize_memreqs[minbus],
    349   1.1       mcr 			      rct.bussize_memreqs[minbus]-1 /* mask */,
    350   1.1       mcr 			      rct.bussize_memreqs[minbus] /* align */,
    351   1.1       mcr 			      /* flags */ 0,
    352   1.1       mcr 			      &start,
    353   1.1       mcr 			      &handle) != 0) {
    354   1.5    provos 	    panic("%s: can not allocate %ld bytes in MEM bus %d",
    355   1.1       mcr 		  rct.csc->sc_dev.dv_xname,
    356   1.1       mcr 		  rct.bussize_memreqs[minbus], minbus);
    357   1.1       mcr 	  }
    358   1.1       mcr 	  rct.membustags[minbus]=rbus_new(caa->ca_rbus_memt,
    359   1.1       mcr 					  start,
    360   1.1       mcr 					  rct.bussize_memreqs[minbus],
    361   1.1       mcr 					  0 /* offset to add to physical
    362   1.1       mcr 					       address to make processor
    363   1.1       mcr 					       address */,
    364   1.1       mcr 					  RBUS_SPACE_DEDICATE);
    365   1.1       mcr 	}
    366   1.1       mcr 
    367   1.1       mcr 	for(busnum=minbus+1; busnum <= maxbus; busnum++) {
    368   1.1       mcr 	  int busparent;
    369   1.1       mcr 
    370   1.1       mcr 	  busparent = pci_bus_parent[busnum];
    371   1.1       mcr 
    372   1.1       mcr 	  printf("%s: bus %d (parent=%d) needs IO %08lx and MEM %08lx\n",
    373   1.1       mcr 		 rct.csc->sc_dev.dv_xname,
    374   1.1       mcr 		 busnum,
    375   1.1       mcr 		 busparent,
    376   1.1       mcr 		 rct.bussize_ioreqs[busnum],
    377   1.1       mcr 		 rct.bussize_memreqs[busnum]);
    378   1.1       mcr 
    379   1.1       mcr 	  if(busparent > maxbus) {
    380   1.1       mcr 	    panic("rbus_ppb: illegal parent");
    381   1.1       mcr 	  }
    382   1.1       mcr 
    383   1.1       mcr 	  if(rct.bussize_ioreqs[busnum]) {
    384   1.1       mcr 	    if(rbus_space_alloc(rct.iobustags[busparent],
    385   1.1       mcr 				0,
    386   1.1       mcr 				rct.bussize_ioreqs[busnum],
    387   1.1       mcr 				rct.bussize_ioreqs[busnum]-1 /*mask */,
    388   1.1       mcr 				rct.bussize_ioreqs[busnum] /* align */,
    389   1.1       mcr 				/* flags */ 0,
    390   1.1       mcr 				&start,
    391   1.1       mcr 				&handle) != 0) {
    392   1.5    provos 	      panic("rbus_ppb: can not allocate %ld bytes in IO bus %d",
    393   1.1       mcr 		    rct.bussize_ioreqs[busnum], busnum);
    394   1.1       mcr 	    }
    395   1.1       mcr 	    rct.iobustags[busnum]=rbus_new(rct.iobustags[busparent],
    396   1.1       mcr 					   start,
    397   1.1       mcr 					   rct.bussize_ioreqs[busnum],
    398   1.1       mcr 					   0 /* offset to add to physical
    399   1.1       mcr 						address
    400   1.1       mcr 						to make processor address */,
    401   1.1       mcr 					   RBUS_SPACE_DEDICATE);
    402   1.1       mcr 
    403   1.1       mcr 	    /* program the bridge */
    404  1.15     perry 
    405   1.1       mcr 	    /* enable I/O space */
    406   1.1       mcr 	    reg = pci_conf_read(pc, pci_bus_tag[busnum],
    407   1.1       mcr 				PCI_COMMAND_STATUS_REG);
    408   1.1       mcr 	    reg |= PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MASTER_ENABLE;
    409   1.1       mcr 	    pci_conf_write(pc, pci_bus_tag[busnum],
    410   1.1       mcr 			   PCI_COMMAND_STATUS_REG, reg);
    411   1.1       mcr 
    412   1.1       mcr 	    /* now init the limit register for I/O */
    413   1.1       mcr 	    pci_conf_write(pc, pci_bus_tag[busnum], PPB_REG_IOSTATUS,
    414   1.1       mcr 			   (((start & 0xf000) >> 8) << PPB_IOBASE_SHIFT) |
    415   1.1       mcr 			   ((((start +
    416   1.1       mcr 			       rct.bussize_ioreqs[busnum] +
    417   1.1       mcr 			       4095) & 0xf000) >> 8) << PPB_IOLIMIT_SHIFT));
    418   1.1       mcr 	  }
    419  1.15     perry 
    420   1.1       mcr 	  if(rct.bussize_memreqs[busnum]) {
    421   1.1       mcr 	    if(rbus_space_alloc(rct.membustags[busparent],
    422   1.1       mcr 				0,
    423  1.15     perry 				rct.bussize_memreqs[busnum] /* size  */,
    424  1.15     perry 				rct.bussize_memreqs[busnum]-1 /*mask */,
    425   1.1       mcr 				rct.bussize_memreqs[busnum] /* align */,
    426   1.1       mcr 				/* flags */ 0,
    427   1.1       mcr 				&start,
    428   1.1       mcr 				&handle) != 0) {
    429   1.5    provos 	      panic("rbus_ppb: can not allocate %ld bytes in MEM bus %d",
    430   1.1       mcr 		    rct.bussize_memreqs[busnum], busnum);
    431   1.1       mcr 	    }
    432   1.1       mcr 	    rct.membustags[busnum]=rbus_new(rct.membustags[busparent],
    433   1.1       mcr 					    start,
    434   1.1       mcr 					    rct.bussize_memreqs[busnum],
    435   1.1       mcr 					    0 /* offset to add to physical
    436   1.1       mcr 						 address to make processor
    437   1.1       mcr 						 address */,
    438   1.1       mcr 					    RBUS_SPACE_DEDICATE);
    439   1.1       mcr 
    440   1.1       mcr 	    /* program the bridge */
    441   1.1       mcr 	    /* enable memory space */
    442   1.1       mcr 	    reg = pci_conf_read(pc, pci_bus_tag[busnum],
    443   1.1       mcr 				PCI_COMMAND_STATUS_REG);
    444   1.1       mcr 	    reg |= PCI_COMMAND_MEM_ENABLE | PCI_COMMAND_MASTER_ENABLE;
    445   1.1       mcr 	    pci_conf_write(pc, pci_bus_tag[busnum],
    446   1.1       mcr 			   PCI_COMMAND_STATUS_REG, reg);
    447   1.1       mcr 
    448   1.1       mcr 	    /* now init the limit register for memory */
    449   1.1       mcr 	    pci_conf_write(pc, pci_bus_tag[busnum], PPB_REG_MEM,
    450   1.1       mcr 			   ((start & PPB_MEM_MASK)
    451   1.1       mcr 			    >> PPB_MEM_SHIFT) << PPB_MEMBASE_SHIFT |
    452   1.1       mcr 			   (((start +
    453   1.1       mcr 			     rct.bussize_memreqs[busnum] +
    454   1.1       mcr 			      PPB_MEM_MIN-1) >> PPB_MEM_SHIFT)
    455   1.1       mcr 			    << PPB_MEMLIMIT_SHIFT));
    456   1.1       mcr 
    457   1.1       mcr 	    /* and set the prefetchable limits as well */
    458   1.1       mcr 	    pci_conf_write(pc, pci_bus_tag[busnum], PPB_REG_PREFMEM,
    459   1.1       mcr 			   ((start & PPB_MEM_MASK)
    460   1.1       mcr 			    >> PPB_MEM_SHIFT) << PPB_MEMBASE_SHIFT |
    461   1.1       mcr 			   (((start +
    462   1.1       mcr 			     rct.bussize_memreqs[busnum] +
    463   1.1       mcr 			      PPB_MEM_MIN-1) >> PPB_MEM_SHIFT)
    464   1.1       mcr 			    << PPB_MEMLIMIT_SHIFT));
    465   1.1       mcr 
    466   1.1       mcr 	    /* pci_conf_print(pc, pci_bus_tag[busnum], NULL); */
    467   1.1       mcr 	  }
    468   1.1       mcr 	}
    469   1.1       mcr 
    470   1.1       mcr 	printf("%s: configuring buses %d-%d\n",
    471   1.1       mcr 		rct.csc->sc_dev.dv_xname,
    472   1.1       mcr 	       minbus, maxbus);
    473   1.1       mcr 	pci_device_foreach_min(pc, minbus, maxbus,
    474   1.1       mcr 			       rbus_pci_phys_allocate, &rct);
    475   1.1       mcr }
    476   1.1       mcr 
    477   1.1       mcr static void
    478   1.1       mcr rbus_pci_phys_countspace(pc, tag, context)
    479   1.1       mcr         pci_chipset_tag_t pc;
    480   1.1       mcr 	pcitag_t          tag;
    481   1.1       mcr 	void             *context;
    482   1.1       mcr {
    483   1.1       mcr         int bus, device, function;
    484   1.1       mcr 	struct  rbus_pci_addr_fixup_context *rct =
    485   1.1       mcr 	  (struct  rbus_pci_addr_fixup_context *)context;
    486   1.1       mcr 
    487   1.1       mcr 	pci_decompose_tag(pc, tag, &bus, &device, &function);
    488   1.1       mcr 
    489   1.1       mcr 	printf("%s: configuring device %02x:%02x:%02x\n",
    490   1.1       mcr 	       rct->csc->sc_dev.dv_xname,
    491   1.1       mcr 	       bus, device, function);
    492   1.1       mcr 
    493   1.1       mcr 	pciaddr_resource_manage(pc, tag,
    494   1.1       mcr 				rbus_do_phys_countspace, context);
    495   1.1       mcr }
    496   1.1       mcr 
    497  1.15     perry 
    498   1.1       mcr int
    499   1.1       mcr rbus_do_phys_countspace(pc, tag, mapreg, ctx, type, addr, size)
    500   1.1       mcr 	pci_chipset_tag_t pc;
    501   1.1       mcr 	pcitag_t     tag;
    502   1.1       mcr 	void        *ctx;
    503   1.1       mcr 	int mapreg, type;
    504   1.1       mcr 	bus_addr_t *addr;
    505   1.1       mcr 	bus_size_t size;
    506   1.1       mcr {
    507   1.1       mcr 	struct  rbus_pci_addr_fixup_context *rct =
    508   1.1       mcr 	  (struct  rbus_pci_addr_fixup_context *)ctx;
    509   1.1       mcr 	int bus, device, function;
    510   1.1       mcr 
    511   1.1       mcr 	pci_decompose_tag(pc, tag, &bus, &device, &function);
    512   1.1       mcr 
    513   1.1       mcr 	if(size > (1<<24)) {
    514   1.1       mcr 	  printf("%s: skipping huge space request of size=%08x\n",
    515   1.1       mcr 		 rct->csc->sc_dev.dv_xname, (unsigned int)size);
    516   1.1       mcr 	  return 0;
    517   1.1       mcr 	}
    518   1.1       mcr 
    519   1.1       mcr 	if(PCI_MAPREG_TYPE(type) == PCI_MAPREG_TYPE_IO) {
    520   1.1       mcr 	  rct->bussize_ioreqs[bus] += size;
    521   1.1       mcr 	} else {
    522   1.1       mcr 	  rct->bussize_memreqs[bus]+= size;
    523   1.1       mcr 	}
    524  1.15     perry 
    525   1.1       mcr 	return 0;
    526   1.1       mcr }
    527   1.1       mcr 
    528   1.1       mcr static void
    529   1.1       mcr rbus_pci_phys_allocate(pc, tag, context)
    530   1.1       mcr         pci_chipset_tag_t pc;
    531   1.1       mcr 	pcitag_t          tag;
    532   1.1       mcr 	void             *context;
    533   1.1       mcr {
    534   1.1       mcr         int bus, device, function, command;
    535   1.1       mcr 	struct rbus_pci_addr_fixup_context *rct =
    536   1.1       mcr 	  (struct rbus_pci_addr_fixup_context *)context;
    537   1.1       mcr 	//cardbus_chipset_tag_t ct = rct->ct;
    538   1.1       mcr 	//	struct cardbus_softc *sc = rct->sc;
    539  1.15     perry 
    540   1.1       mcr 	pci_decompose_tag(pc, tag, &bus, &device, &function);
    541   1.1       mcr 
    542   1.1       mcr 	printf("%s: configuring device %02x:%02x:%02x\n",
    543   1.1       mcr 	       rct->csc->sc_dev.dv_xname,
    544   1.1       mcr 	       bus, device, function);
    545   1.1       mcr 
    546   1.1       mcr 	pciaddr_resource_manage(pc, tag,
    547   1.1       mcr 				rbus_do_phys_allocate, context);
    548   1.1       mcr 
    549   1.1       mcr 	/* now turn the device's memory and I/O on */
    550   1.1       mcr 	command = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
    551   1.1       mcr 	command |= PCI_COMMAND_IO_ENABLE|PCI_COMMAND_MEM_ENABLE;
    552   1.1       mcr 	pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, command);
    553   1.1       mcr }
    554   1.1       mcr 
    555   1.1       mcr int
    556   1.1       mcr rbus_do_phys_allocate(pc, tag, mapreg, ctx, type, addr, size)
    557   1.1       mcr 	pci_chipset_tag_t pc;
    558   1.1       mcr 	pcitag_t     tag;
    559   1.1       mcr 	void        *ctx;
    560   1.1       mcr 	int mapreg, type;
    561   1.1       mcr 	bus_addr_t *addr;
    562   1.1       mcr 	bus_size_t size;
    563   1.1       mcr {
    564   1.1       mcr 	struct  rbus_pci_addr_fixup_context *rct =
    565   1.1       mcr 	  (struct  rbus_pci_addr_fixup_context *)ctx;
    566   1.1       mcr 	cardbus_chipset_tag_t ct     = rct->ct;
    567   1.1       mcr 	struct cardbus_softc *sc     = rct->sc;
    568   1.1       mcr 	cardbus_function_t       *cf = sc->sc_cf;
    569   1.1       mcr 	rbus_tag_t          rbustag;
    570   1.1       mcr 	bus_space_tag_t     bustag;
    571   1.1       mcr 	bus_addr_t mask = size -1;
    572   1.1       mcr 	bus_addr_t base = 0;
    573   1.1       mcr 	bus_space_handle_t handle;
    574   1.1       mcr 	int busflags = 0;
    575   1.1       mcr 	int flags    = 0;
    576  1.16  drochner 	const char *bustype;
    577   1.1       mcr 	int bus, device, function;
    578   1.1       mcr 
    579   1.1       mcr 	pci_decompose_tag(pc, tag, &bus, &device, &function);
    580   1.1       mcr 
    581   1.1       mcr 	/*
    582   1.1       mcr 	 * some devices come up with garbage in them (Tulip?)
    583   1.1       mcr 	 * we are in charge here, so give them address
    584  1.15     perry 	 * space anyway.
    585   1.1       mcr 	 *
    586   1.1       mcr 	 * XXX this may be due to no secondary PCI reset!!!
    587   1.1       mcr 	 */
    588   1.1       mcr #if 0
    589   1.1       mcr 	if (*addr) {
    590   1.1       mcr 		printf("Already allocated space at %08x\n",
    591   1.1       mcr 		       (unsigned int)*addr);
    592   1.1       mcr 		return (0);
    593   1.1       mcr 	}
    594   1.1       mcr #endif
    595   1.1       mcr 
    596   1.1       mcr 	if(size > (1<<24)) {
    597   1.1       mcr 	  printf("%s: skipping huge space request of size=%08x\n",
    598   1.1       mcr 		 rct->csc->sc_dev.dv_xname, (unsigned int)size);
    599   1.1       mcr 	  return 0;
    600   1.1       mcr 	}
    601   1.1       mcr 
    602   1.1       mcr 	if(PCI_MAPREG_TYPE(type) == PCI_MAPREG_TYPE_IO) {
    603   1.1       mcr 	  bustag  = sc->sc_iot;
    604   1.1       mcr 	  rbustag = rct->iobustags[bus];
    605   1.1       mcr 	  bustype = "io";
    606   1.1       mcr 	} else {
    607   1.1       mcr 	  bustag  = sc->sc_memt;
    608   1.1       mcr 	  rbustag = rct->membustags[bus];
    609   1.1       mcr 	  bustype = "mem";
    610   1.1       mcr 	}
    611   1.1       mcr 
    612   1.1       mcr 	if((*cf->cardbus_space_alloc)(ct, rbustag, base, size,
    613   1.1       mcr 				      mask, size, busflags|flags,
    614   1.1       mcr 				      addr, &handle)) {
    615   1.1       mcr 	  printf("%s: no available resources (size=%08x) for bar %2d. fixup failed\n",
    616   1.1       mcr 		 rct->csc->sc_dev.dv_xname, (unsigned int)size, mapreg);
    617   1.1       mcr 
    618   1.1       mcr 	  *addr = 0;
    619   1.1       mcr 	  pci_conf_write(pc, tag, mapreg, *addr);
    620   1.1       mcr 	  return (1);
    621   1.1       mcr 	}
    622   1.1       mcr 
    623   1.1       mcr 	printf("%s: alloc %s space of size %08x for %02d:%02d:%02d -> %08x\n",
    624   1.1       mcr 	       rct->csc->sc_dev.dv_xname,
    625  1.15     perry 	       bustype,
    626   1.1       mcr 	       (unsigned int)size,
    627   1.1       mcr 	       bus, device, function, (unsigned int)*addr);
    628   1.1       mcr 
    629   1.1       mcr 	/* write new address to PCI device configuration header */
    630   1.1       mcr 	pci_conf_write(pc, tag, mapreg, *addr);
    631   1.1       mcr 
    632   1.1       mcr 	/* check */
    633   1.1       mcr 	{
    634   1.1       mcr 		DPRINTF(("%s: pci_addr_fixup: ",
    635   1.1       mcr 			 rct->csc->sc_dev.dv_xname));
    636   1.1       mcr #ifdef  CBB_DEBUG
    637   1.1       mcr 		if(rbus_ppb_debug) { pciaddr_print_devid(pc, tag); }
    638   1.1       mcr #endif
    639   1.1       mcr 	}
    640   1.1       mcr 
    641   1.1       mcr 	/* double check that the value got inserted correctly */
    642   1.1       mcr 	if (pciaddr_ioaddr(pci_conf_read(pc, tag, mapreg)) != *addr) {
    643   1.1       mcr 		pci_conf_write(pc, tag, mapreg, 0); /* clear */
    644   1.1       mcr 		printf("%s: fixup failed. (new address=%#x)\n",
    645   1.1       mcr 		       rct->csc->sc_dev.dv_xname,
    646   1.1       mcr 		       (unsigned)*addr);
    647   1.1       mcr 		return (1);
    648   1.1       mcr 	}
    649   1.1       mcr 
    650   1.1       mcr 	DPRINTF(("new address 0x%08x\n",
    651   1.1       mcr 		 (unsigned)*addr));
    652   1.1       mcr 
    653   1.1       mcr 	return (0);
    654   1.1       mcr }
    655   1.1       mcr 
    656   1.1       mcr static void
    657   1.1       mcr ppb_cardbus_attach(parent, self, aux)
    658   1.1       mcr 	struct device *parent, *self;
    659   1.1       mcr 	void *aux;
    660   1.1       mcr {
    661  1.19   thorpej 	struct ppb_cardbus_softc *csc = device_private(self);
    662   1.1       mcr 	struct cardbus_softc *parent_sc =
    663  1.19   thorpej 	    device_private(device_parent(&csc->sc_dev));
    664   1.1       mcr 	struct cardbus_attach_args *ca = aux;
    665   1.1       mcr 	cardbus_devfunc_t ct = ca->ca_ct;
    666   1.1       mcr 	cardbus_chipset_tag_t cc = ct->ct_cc;
    667   1.1       mcr 	cardbus_function_tag_t cf = ct->ct_cf;
    668   1.1       mcr 	struct pccbb_softc *psc = (struct pccbb_softc *)cc;
    669   1.1       mcr 	struct pcibus_attach_args pba;
    670   1.1       mcr 	char devinfo[256];
    671   1.1       mcr 	pcireg_t busdata;
    672   1.1       mcr 	int mybus, rv;
    673   1.1       mcr 	u_int16_t pciirq;
    674   1.1       mcr 	int minbus, maxbus;
    675   1.1       mcr 
    676   1.1       mcr 	mybus = ct->ct_bus;
    677   1.1       mcr 	pciirq = 0;
    678   1.1       mcr 	rv = 0;
    679   1.1       mcr 
    680   1.1       mcr 	/* shut up compiler */
    681   1.1       mcr 	csc->foo=parent_sc->sc_intrline;
    682  1.15     perry 
    683   1.1       mcr 
    684  1.11    itojun 	pci_devinfo(ca->ca_id, ca->ca_class, 0, devinfo, sizeof(devinfo));
    685   1.1       mcr 	printf(": %s (rev. 0x%02x)\n", devinfo, PCI_REVISION(ca->ca_class));
    686   1.1       mcr 
    687   1.4     lukem 	csc->sc_tag = ca->ca_tag;	/* XXX cardbustag_t == pcitag_t */
    688   1.3   thorpej 
    689   1.1       mcr 	busdata = cardbus_conf_read(cc, cf, ca->ca_tag, PPB_REG_BUSINFO);
    690   1.1       mcr 	minbus = pcibios_max_bus;
    691  1.10     lukem 	maxbus = minbus;		/* XXX; gcc */
    692   1.1       mcr 
    693   1.1       mcr 	if (PPB_BUSINFO_SECONDARY(busdata) == 0) {
    694   1.1       mcr 	  printf("%s: not configured by system firmware calling pci_bus_fixup(%d)\n",
    695   1.1       mcr 		 self->dv_xname, 0);
    696   1.1       mcr 
    697   1.1       mcr 	  /*
    698   1.1       mcr 	   * first, pull the reset wire on the secondary bridge
    699   1.1       mcr 	   * to clear all devices
    700   1.1       mcr 	   */
    701   1.1       mcr 	  busdata = cardbus_conf_read(cc, cf, ca->ca_tag,
    702   1.1       mcr 				      PPB_REG_BRIDGECONTROL);
    703   1.1       mcr 	  cardbus_conf_write(cc, cf, ca->ca_tag, PPB_REG_BRIDGECONTROL,
    704   1.1       mcr 			     busdata | PPB_BC_SECONDARY_RESET);
    705   1.1       mcr 	  delay(1);
    706   1.1       mcr 	  cardbus_conf_write(cc, cf, ca->ca_tag, PPB_REG_BRIDGECONTROL,
    707   1.1       mcr 			     busdata);
    708   1.1       mcr 
    709   1.1       mcr 	  /* then go initialize the bridge control registers */
    710   1.1       mcr 	  maxbus = pci_bus_fixup(psc->sc_pc, 0);
    711   1.1       mcr 	}
    712   1.1       mcr 
    713   1.1       mcr 	busdata = cardbus_conf_read(cc, cf, ca->ca_tag, PPB_REG_BUSINFO);
    714   1.1       mcr 	if(PPB_BUSINFO_SECONDARY(busdata) == 0) {
    715   1.1       mcr 	  printf("%s: still not configured, not fixable.\n",
    716   1.1       mcr 		 self->dv_xname);
    717   1.1       mcr 	  return;
    718   1.1       mcr 	}
    719   1.1       mcr 
    720  1.15     perry #if 0
    721   1.1       mcr 	minbus = PPB_BUSINFO_SECONDARY(busdata);
    722   1.1       mcr 	maxbus = PPB_BUSINFO_SUBORDINATE(busdata);
    723   1.1       mcr #endif
    724  1.15     perry 
    725   1.1       mcr 	/* now, go and assign addresses for the new devices */
    726   1.1       mcr 	rbus_pci_addr_fixup(csc, cc, parent_sc,
    727   1.1       mcr 			    psc->sc_pc,
    728   1.1       mcr 			    ca,
    729   1.1       mcr 			    minbus, maxbus);
    730   1.1       mcr 
    731   1.1       mcr 	/*
    732   1.1       mcr 	 * now configure all connected devices to the IRQ which
    733   1.1       mcr 	 * was assigned to this slot, as they will all arrive from
    734   1.1       mcr 	 * that IRQ.
    735   1.1       mcr 	 */
    736   1.1       mcr 	rbus_intr_fixup(psc->sc_pc, minbus, maxbus, ca->ca_intrline);
    737   1.1       mcr 
    738  1.15     perry 	/*
    739   1.1       mcr 	 * enable direct routing of interrupts. We do this because
    740   1.1       mcr 	 * we can not manage to get pccb_intr_establish() called until
    741   1.1       mcr 	 * PCI subsystem is merged with rbus. The major thing that this
    742   1.1       mcr 	 * routine does is avoid calling the driver's interrupt routine
    743   1.1       mcr 	 * when the card has been removed.
    744   1.1       mcr 	 *
    745   1.1       mcr 	 * The rbus_ppb.c can not cope with card desertions until the merging
    746   1.1       mcr 	 * anyway.
    747   1.1       mcr 	 */
    748   1.1       mcr 	pccbb_intr_route(psc);
    749   1.1       mcr 
    750   1.1       mcr 	/*
    751   1.1       mcr 	 * Attach the PCI bus than hangs off of it.
    752   1.1       mcr 	 *
    753   1.1       mcr 	 * XXX Don't pass-through Memory Read Multiple.  Should we?
    754   1.1       mcr 	 * XXX Consult the spec...
    755  1.15     perry 	 */
    756   1.1       mcr 	pba.pba_iot  = ca->ca_iot;
    757   1.1       mcr 	pba.pba_memt = ca->ca_memt;
    758   1.1       mcr 	pba.pba_dmat = ca->ca_dmat;
    759   1.1       mcr 	pba.pba_pc   = psc->sc_pc;
    760   1.1       mcr 	pba.pba_flags    = PCI_FLAGS_IO_ENABLED|PCI_FLAGS_MEM_ENABLED;
    761   1.1       mcr 	pba.pba_bus      = PPB_BUSINFO_SECONDARY(busdata);
    762   1.4     lukem 	pba.pba_bridgetag = &csc->sc_tag;
    763   1.1       mcr 	/*pba.pba_intrswiz = parent_sc->sc_intrswiz; */
    764   1.1       mcr 	pba.pba_intrtag  = psc->sc_pa.pa_intrtag;
    765   1.1       mcr 
    766  1.13  drochner 	config_found_ia(self, "pcibus", &pba, rppbprint);
    767   1.1       mcr }
    768   1.1       mcr 
    769   1.1       mcr void
    770   1.1       mcr ppb_cardbus_setup(struct ppb_softc * sc)
    771   1.1       mcr {
    772   1.1       mcr 	struct ppb_cardbus_softc *csc = (struct ppb_cardbus_softc *) sc;
    773   1.1       mcr #if 0
    774   1.1       mcr 	cardbus_chipset_tag_t cc  = psc->sc_cc;
    775   1.1       mcr 	cardbus_function_tag_t cf = psc->sc_cf;
    776   1.1       mcr #endif
    777   1.1       mcr 
    778   1.1       mcr 	/* shut up compiler */
    779   1.1       mcr 	csc->foo=2;
    780   1.1       mcr 
    781   1.1       mcr 	printf("ppb_cardbus_setup called\n");
    782   1.1       mcr #if 0
    783   1.1       mcr 	/* not sure what to do here */
    784   1.1       mcr 	cardbustag_t tag = cardbus_make_tag(cc, cf, csc->ct->ct_bus,
    785   1.1       mcr 	    csc->ct->ct_dev, csc->ct->ct_func);
    786   1.1       mcr 
    787   1.1       mcr 	command = Cardbus_conf_read(csc->ct, tag, CARDBUS_COMMAND_STATUS_REG);
    788   1.1       mcr 	if (csc->base0_reg) {
    789   1.1       mcr 		Cardbus_conf_write(csc->ct, tag,
    790   1.1       mcr 		    CARDBUS_BASE0_REG, csc->base0_reg);
    791   1.1       mcr 		(cf->cardbus_ctrl) (cc, CARDBUS_MEM_ENABLE);
    792   1.1       mcr 		command |= CARDBUS_COMMAND_MEM_ENABLE |
    793   1.1       mcr 		    CARDBUS_COMMAND_MASTER_ENABLE;
    794   1.1       mcr 	} else if (csc->base1_reg) {
    795   1.1       mcr 		Cardbus_conf_write(csc->ct, tag,
    796   1.1       mcr 		    CARDBUS_BASE1_REG, csc->base1_reg);
    797   1.1       mcr 		(cf->cardbus_ctrl) (cc, CARDBUS_IO_ENABLE);
    798   1.1       mcr 		command |= (CARDBUS_COMMAND_IO_ENABLE |
    799   1.1       mcr 		    CARDBUS_COMMAND_MASTER_ENABLE);
    800   1.1       mcr 	}
    801   1.1       mcr 
    802   1.1       mcr 	(cf->cardbus_ctrl) (cc, CARDBUS_BM_ENABLE);
    803   1.1       mcr 
    804   1.1       mcr 	/* enable the card */
    805   1.1       mcr 	Cardbus_conf_write(csc->ct, tag, CARDBUS_COMMAND_STATUS_REG, command);
    806   1.1       mcr #endif
    807   1.1       mcr }
    808   1.1       mcr 
    809   1.1       mcr int
    810   1.1       mcr ppb_cardbus_enable(struct ppb_softc * sc)
    811   1.1       mcr {
    812   1.1       mcr #if 0
    813   1.1       mcr 	struct ppb_cardbus_softc *csc = (struct fxp_cardbus_softc *) sc;
    814   1.1       mcr 	struct cardbus_softc *psc =
    815  1.18   thorpej 	    (struct cardbus_softc *) device_parent(&sc->sc_dev);
    816   1.1       mcr 	cardbus_chipset_tag_t cc = psc->sc_cc;
    817   1.1       mcr 	cardbus_function_tag_t cf = psc->sc_cf;
    818   1.1       mcr 
    819   1.1       mcr 	Cardbus_function_enable(csc->ct);
    820   1.1       mcr 
    821   1.1       mcr 	fxp_cardbus_setup(sc);
    822   1.1       mcr 
    823   1.1       mcr 	/* Map and establish the interrupt. */
    824   1.1       mcr 
    825   1.1       mcr 	sc->sc_ih = cardbus_intr_establish(cc, cf, psc->sc_intrline, IPL_NET,
    826   1.1       mcr 	    fxp_intr, sc);
    827   1.1       mcr 	if (NULL == sc->sc_ih) {
    828   1.1       mcr 		printf("%s: couldn't establish interrupt\n",
    829   1.1       mcr 		    sc->sc_dev.dv_xname);
    830   1.1       mcr 		return 1;
    831   1.1       mcr 	}
    832   1.1       mcr 
    833   1.1       mcr 	printf("%s: interrupting at %d\n", sc->sc_dev.dv_xname,
    834   1.1       mcr 	    psc->sc_intrline);
    835   1.1       mcr 
    836   1.1       mcr #endif
    837   1.1       mcr 	return 0;
    838   1.1       mcr }
    839   1.1       mcr 
    840   1.1       mcr void
    841   1.1       mcr ppb_cardbus_disable(struct ppb_softc * sc)
    842   1.1       mcr {
    843   1.1       mcr #if 0
    844   1.1       mcr 	struct cardbus_softc *psc =
    845  1.18   thorpej 	    (struct cardbus_softc *) device_parent(&sc->sc_dev);
    846   1.1       mcr 	cardbus_chipset_tag_t cc = psc->sc_cc;
    847   1.1       mcr 	cardbus_function_tag_t cf = psc->sc_cf;
    848   1.1       mcr 
    849   1.1       mcr 	/* Remove interrupt handler. */
    850   1.1       mcr 	cardbus_intr_disestablish(cc, cf, sc->sc_ih);
    851   1.1       mcr 
    852   1.1       mcr 	Cardbus_function_disable(((struct fxp_cardbus_softc *) sc)->ct);
    853   1.1       mcr #endif
    854   1.1       mcr }
    855   1.1       mcr 
    856   1.1       mcr static int
    857   1.1       mcr ppb_cardbus_detach(self, flags)
    858   1.1       mcr 	struct device *self;
    859   1.1       mcr 	int flags;
    860   1.1       mcr {
    861  1.19   thorpej   /* struct ppb_softc *sc = device_private(self);*/
    862  1.19   thorpej 	struct ppb_cardbus_softc *csc = device_private(self);
    863   1.1       mcr 
    864   1.1       mcr #if 0
    865   1.1       mcr 	struct cardbus_devfunc *ct = csc->ct;
    866   1.1       mcr 	int rv, reg;
    867   1.1       mcr 
    868   1.1       mcr #ifdef DIAGNOSTIC
    869   1.1       mcr 	if (ct == NULL)
    870   1.5    provos 		panic("%s: data structure lacks", sc->sc_dev.dv_xname);
    871   1.1       mcr #endif
    872   1.1       mcr 
    873   1.1       mcr 	rv = fxp_detach(sc);
    874   1.1       mcr 	if (rv == 0) {
    875   1.1       mcr 		/*
    876   1.1       mcr 		 * Unhook the interrupt handler.
    877   1.1       mcr 		 */
    878   1.1       mcr 		cardbus_intr_disestablish(ct->ct_cc, ct->ct_cf, sc->sc_ih);
    879   1.1       mcr 
    880   1.1       mcr 		/*
    881   1.1       mcr 		 * release bus space and close window
    882   1.1       mcr 		 */
    883   1.1       mcr 		if (csc->base0_reg)
    884   1.1       mcr 			reg = CARDBUS_BASE0_REG;
    885   1.1       mcr 		else
    886   1.1       mcr 			reg = CARDBUS_BASE1_REG;
    887   1.1       mcr 		Cardbus_mapreg_unmap(ct, reg, sc->sc_st, sc->sc_sh, csc->size);
    888   1.1       mcr 	}
    889   1.1       mcr 	return (rv);
    890   1.1       mcr 
    891   1.1       mcr #endif
    892   1.1       mcr 	csc->foo=1;
    893   1.1       mcr 	return 0;
    894   1.1       mcr 
    895   1.1       mcr }
    896   1.1       mcr 
    897   1.1       mcr int
    898   1.1       mcr ppb_activate(self, act)
    899   1.1       mcr 	struct device *self;
    900   1.1       mcr 	enum devact act;
    901   1.1       mcr {
    902   1.1       mcr   printf("ppb_activate called\n");
    903   1.1       mcr   return 0;
    904   1.1       mcr }
    905   1.1       mcr 
    906