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rbus_ppb.c revision 1.43.2.1
      1  1.43.2.1     skrll /*	$NetBSD: rbus_ppb.c,v 1.43.2.1 2015/06/06 14:40:06 skrll Exp $	*/
      2       1.1       mcr 
      3       1.1       mcr /*
      4       1.1       mcr  * Copyright (c) 1999 The NetBSD Foundation, Inc.
      5       1.1       mcr  * All rights reserved.
      6       1.1       mcr  *
      7       1.1       mcr  * This code is derived from software contributed to The NetBSD Foundation
      8       1.1       mcr  * by Michael Richardson <mcr (at) sandelman.ottawa.on.ca>
      9       1.1       mcr  *
     10       1.1       mcr  * Redistribution and use in source and binary forms, with or without
     11       1.1       mcr  * modification, are permitted provided that the following conditions
     12       1.1       mcr  * are met:
     13       1.1       mcr  * 1. Redistributions of source code must retain the above copyright
     14       1.1       mcr  *    notice, this list of conditions and the following disclaimer.
     15       1.1       mcr  * 2. Redistributions in binary form must reproduce the above copyright
     16       1.1       mcr  *    notice, this list of conditions and the following disclaimer in the
     17       1.1       mcr  *    documentation and/or other materials provided with the distribution.
     18       1.1       mcr  *
     19       1.1       mcr  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20       1.1       mcr  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21       1.1       mcr  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22       1.1       mcr  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23       1.1       mcr  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24       1.1       mcr  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25       1.1       mcr  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26       1.1       mcr  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27       1.1       mcr  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28       1.1       mcr  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29       1.1       mcr  * POSSIBILITY OF SUCH DAMAGE.
     30       1.1       mcr  */
     31       1.1       mcr 
     32       1.1       mcr /*
     33       1.1       mcr  * CardBus front-end for the Intel/Digital DECchip 21152 PCI-PCI bridge
     34       1.1       mcr  */
     35       1.2     lukem 
     36       1.2     lukem #include <sys/cdefs.h>
     37  1.43.2.1     skrll __KERNEL_RCSID(0, "$NetBSD: rbus_ppb.c,v 1.43.2.1 2015/06/06 14:40:06 skrll Exp $");
     38       1.1       mcr 
     39       1.1       mcr #include <sys/param.h>
     40       1.1       mcr #include <sys/systm.h>
     41       1.1       mcr #include <sys/mbuf.h>
     42       1.1       mcr #include <sys/malloc.h>
     43       1.1       mcr #include <sys/kernel.h>
     44       1.1       mcr #include <sys/socket.h>
     45       1.1       mcr #include <sys/ioctl.h>
     46       1.1       mcr #include <sys/errno.h>
     47       1.1       mcr #include <sys/device.h>
     48      1.38    dyoung #include <sys/kmem.h>
     49       1.1       mcr 
     50       1.1       mcr #include <machine/endian.h>
     51       1.1       mcr 
     52      1.20        ad #include <sys/bus.h>
     53      1.20        ad #include <sys/intr.h>
     54       1.1       mcr 
     55       1.1       mcr #include <dev/pci/pcivar.h>
     56       1.1       mcr #include <dev/pci/pcireg.h>
     57       1.1       mcr #include <dev/pci/pcidevs.h>
     58       1.1       mcr #include <dev/pci/ppbreg.h>
     59       1.1       mcr 
     60       1.1       mcr #include <dev/ic/i82365reg.h>
     61       1.1       mcr 
     62      1.41  drochner #include <dev/cardbus/rbus.h>
     63       1.1       mcr #include <dev/pci/pccbbreg.h>
     64       1.1       mcr #include <dev/pci/pccbbvar.h>
     65       1.1       mcr 
     66       1.1       mcr #include <dev/cardbus/cardbusvar.h>
     67      1.12   mycroft #include <dev/pci/pcidevs.h>
     68       1.1       mcr 
     69      1.23  jmcneill #include <x86/pci/pci_addr_fixup.h>
     70      1.23  jmcneill #include <x86/pci/pci_bus_fixup.h>
     71       1.1       mcr #include <i386/pci/pci_intr_fixup.h>
     72       1.1       mcr #include <i386/pci/pcibios.h>
     73       1.1       mcr 
     74       1.1       mcr struct ppb_softc;
     75       1.1       mcr 
     76      1.31    cegger static int  ppb_cardbus_match(device_t, cfdata_t, void *);
     77      1.31    cegger static void ppb_cardbus_attach(device_t, device_t, void *);
     78      1.31    cegger static int  ppb_activate(device_t, enum devact);
     79      1.16  drochner int rppbprint(void *, const char *);
     80      1.16  drochner int rbus_intr_fixup(pci_chipset_tag_t, int, int, int);
     81      1.16  drochner void rbus_do_header_fixup(pci_chipset_tag_t, pcitag_t, void *);
     82       1.1       mcr 
     83      1.16  drochner static void rbus_pci_phys_allocate(pci_chipset_tag_t, pcitag_t, void *);
     84      1.16  drochner 
     85      1.16  drochner static int rbus_do_phys_allocate(pci_chipset_tag_t, pcitag_t, int,
     86      1.16  drochner 				 void *, int, bus_addr_t *, bus_size_t);
     87      1.16  drochner 
     88      1.16  drochner static void rbus_pci_phys_countspace(pci_chipset_tag_t, pcitag_t, void *);
     89      1.16  drochner 
     90      1.16  drochner static int rbus_do_phys_countspace(pci_chipset_tag_t, pcitag_t, int,
     91      1.16  drochner 				   void *, int, bus_addr_t *, bus_size_t);
     92      1.16  drochner 
     93      1.16  drochner unsigned int rbus_round_up(unsigned int, unsigned int);
     94       1.1       mcr 
     95       1.1       mcr 
     96       1.1       mcr struct ppb_cardbus_softc {
     97      1.25     joerg   device_t sc_dev;
     98       1.3   thorpej   pcitag_t sc_tag;
     99       1.1       mcr   int foo;
    100       1.1       mcr };
    101       1.1       mcr 
    102      1.25     joerg CFATTACH_DECL_NEW(rbus_ppb, sizeof(struct ppb_cardbus_softc),
    103      1.39    dyoung     ppb_cardbus_match, ppb_cardbus_attach, NULL, ppb_activate);
    104       1.1       mcr 
    105       1.1       mcr #ifdef  CBB_DEBUG
    106       1.1       mcr int rbus_ppb_debug = 0;   /* hack with kdb */
    107       1.1       mcr #define DPRINTF(X) if(rbus_ppb_debug) printf X
    108       1.1       mcr #else
    109       1.1       mcr #define DPRINTF(X)
    110       1.1       mcr #endif
    111       1.1       mcr 
    112       1.1       mcr static int
    113      1.31    cegger ppb_cardbus_match(device_t parent, cfdata_t match, void *aux)
    114       1.1       mcr {
    115       1.1       mcr 	struct cardbus_attach_args *ca = aux;
    116       1.1       mcr 
    117      1.35    dyoung 	if (PCI_VENDOR(ca->ca_id) ==  PCI_VENDOR_DEC &&
    118      1.35    dyoung 	    PCI_PRODUCT(ca->ca_id) == PCI_PRODUCT_DEC_21152)
    119       1.1       mcr 		return (1);
    120       1.1       mcr 
    121       1.1       mcr 	if(PCI_CLASS(ca->ca_class) == PCI_CLASS_BRIDGE &&
    122       1.1       mcr 	   PCI_SUBCLASS(ca->ca_class) == PCI_SUBCLASS_BRIDGE_PCI) {
    123       1.1       mcr 	  /* XXX */
    124       1.1       mcr 	  printf("recognizing generic bridge chip\n");
    125       1.1       mcr 	}
    126       1.1       mcr 
    127       1.1       mcr 	return (0);
    128       1.1       mcr }
    129       1.1       mcr 
    130       1.1       mcr 
    131       1.1       mcr int
    132      1.27       dsl rppbprint(void *aux, const char *pnp)
    133       1.1       mcr {
    134       1.1       mcr 	struct pcibus_attach_args *pba = aux;
    135       1.1       mcr 
    136       1.1       mcr 	/* only PCIs can attach to PPBs; easy. */
    137       1.1       mcr 	if (pnp)
    138       1.9   thorpej 		aprint_normal("pci at %s", pnp);
    139       1.9   thorpej 	aprint_normal(" bus %d (rbus)", pba->pba_bus);
    140       1.1       mcr 	return (UNCONF);
    141       1.1       mcr }
    142       1.1       mcr 
    143       1.1       mcr int
    144       1.1       mcr rbus_intr_fixup(pci_chipset_tag_t pc,
    145       1.1       mcr 		int minbus,
    146       1.1       mcr 		int maxbus,
    147       1.1       mcr 		int line)
    148       1.1       mcr {
    149       1.1       mcr   pci_device_foreach_min(pc, minbus,
    150       1.1       mcr 			 maxbus, rbus_do_header_fixup, (void *)&line);
    151       1.1       mcr   return 0;
    152       1.1       mcr }
    153       1.1       mcr 
    154       1.1       mcr void
    155      1.27       dsl rbus_do_header_fixup(pci_chipset_tag_t pc, pcitag_t tag, void *context)
    156       1.1       mcr {
    157       1.1       mcr   int bus, device, function;
    158      1.43  uebayasi   pcireg_t intr;
    159       1.1       mcr   int *pline = (int *)context;
    160       1.1       mcr   int line = *pline;
    161       1.1       mcr 
    162       1.1       mcr   pci_decompose_tag(pc, tag, &bus, &device, &function);
    163       1.1       mcr 
    164       1.1       mcr   intr = pci_conf_read(pc, tag, PCI_INTERRUPT_REG);
    165       1.1       mcr 
    166       1.1       mcr   intr &= ~(PCI_INTERRUPT_LINE_MASK << PCI_INTERRUPT_LINE_SHIFT);
    167       1.1       mcr   intr |= (line << PCI_INTERRUPT_LINE_SHIFT);
    168       1.1       mcr   pci_conf_write(pc, tag, PCI_INTERRUPT_REG, intr);
    169       1.1       mcr 
    170       1.1       mcr }
    171       1.1       mcr 
    172      1.15     perry /*
    173       1.1       mcr  * This function takes a range of PCI bus numbers and
    174       1.1       mcr  * allocates space for all devices found in this space (the BARs) from
    175       1.1       mcr  * the rbus space maps (I/O and memory).
    176       1.1       mcr  *
    177       1.1       mcr  * It assumes that "rbus" is defined. The whole concept does.
    178       1.1       mcr  *
    179       1.1       mcr  * It uses pci_device_foreach_min() to call rbus_pci_phys_allocate.
    180       1.1       mcr  * This function is mostly stolen from
    181      1.15     perry  *     pci_addr_fixup.c:pciaddr_resource_reserve.
    182       1.1       mcr  *
    183       1.1       mcr  */
    184       1.1       mcr struct rbus_pci_addr_fixup_context {
    185       1.1       mcr   struct ppb_cardbus_softc *csc;
    186       1.1       mcr   cardbus_chipset_tag_t ct;
    187       1.1       mcr   struct cardbus_softc *sc;
    188       1.1       mcr   struct cardbus_attach_args *caa;
    189       1.1       mcr   int    minbus;
    190       1.1       mcr   int    maxbus;
    191       1.1       mcr   bus_size_t  *bussize_ioreqs;
    192       1.1       mcr   bus_size_t  *bussize_memreqs;
    193       1.1       mcr   rbus_tag_t   *iobustags;
    194       1.1       mcr   rbus_tag_t   *membustags;
    195      1.15     perry };
    196       1.1       mcr 
    197      1.15     perry unsigned int
    198      1.16  drochner rbus_round_up(unsigned int size, unsigned int minval)
    199       1.1       mcr {
    200       1.1       mcr   unsigned int power2;
    201       1.1       mcr 
    202       1.1       mcr   if(size == 0) {
    203       1.1       mcr     return 0;
    204       1.1       mcr   }
    205       1.1       mcr 
    206      1.16  drochner   power2=minval;
    207       1.1       mcr 
    208       1.1       mcr   while(power2 < (1 << 31) &&
    209       1.1       mcr 	power2 < size) {
    210       1.1       mcr     power2 = power2 << 1;
    211       1.1       mcr   }
    212      1.15     perry 
    213       1.1       mcr   return power2;
    214       1.1       mcr }
    215      1.15     perry 
    216       1.1       mcr static void
    217       1.1       mcr rbus_pci_addr_fixup(struct ppb_cardbus_softc *csc,
    218       1.1       mcr 		    cardbus_chipset_tag_t ct,
    219       1.1       mcr 		    struct cardbus_softc *sc,
    220       1.1       mcr 		    pci_chipset_tag_t     pc,
    221       1.1       mcr 		    struct cardbus_attach_args *caa,
    222      1.38    dyoung 		    int minbus, const int maxbus)
    223       1.1       mcr {
    224       1.1       mcr 	struct rbus_pci_addr_fixup_context rct;
    225      1.38    dyoung 	const size_t size = sizeof(bus_size_t[maxbus+1]);
    226      1.38    dyoung 	int busnum;
    227       1.1       mcr 	bus_addr_t start;
    228       1.1       mcr 	bus_space_handle_t handle;
    229       1.1       mcr 	u_int32_t reg;
    230       1.1       mcr 
    231       1.1       mcr 	rct.csc=csc;
    232       1.1       mcr 	rct.ct=ct;
    233       1.1       mcr 	rct.sc=sc;
    234       1.1       mcr 	rct.caa=caa;
    235       1.1       mcr 	rct.minbus = minbus;
    236       1.1       mcr 	rct.maxbus = maxbus;
    237      1.38    dyoung 	if ((rct.bussize_ioreqs  = kmem_zalloc(size, KM_SLEEP)) == NULL ||
    238      1.38    dyoung 	    (rct.bussize_memreqs = kmem_zalloc(size, KM_SLEEP)) == NULL ||
    239      1.38    dyoung 	    (rct.iobustags =
    240      1.38    dyoung 	     kmem_zalloc(maxbus * sizeof(rbus_tag_t), KM_SLEEP)) == NULL ||
    241      1.38    dyoung 	    (rct.membustags =
    242      1.38    dyoung 	     kmem_zalloc(maxbus * sizeof(rbus_tag_t), KM_SLEEP)) == NULL)
    243      1.38    dyoung 		panic("%s: memory allocation failed", __func__);
    244       1.1       mcr 
    245       1.1       mcr 	printf("%s: sizing buses %d-%d\n",
    246      1.25     joerg 	       device_xname(rct.csc->sc_dev),
    247       1.1       mcr 	       minbus, maxbus);
    248       1.1       mcr 
    249       1.1       mcr 	pci_device_foreach_min(pc, minbus, maxbus,
    250       1.1       mcr 			       rbus_pci_phys_countspace, &rct);
    251       1.1       mcr 
    252       1.1       mcr 	/*
    253       1.1       mcr 	 * we need to determine amount of address space for each
    254       1.1       mcr 	 * bus. To do this, we have to roll up amounts and then
    255       1.1       mcr 	 * we need to divide up the cardbus's extent to allocate
    256       1.1       mcr 	 * some space to each bus.
    257       1.1       mcr 	 */
    258       1.1       mcr 
    259       1.1       mcr 	for(busnum=maxbus; busnum > minbus; busnum--) {
    260       1.1       mcr 	  if(pci_bus_parent[busnum] != 0) {
    261       1.1       mcr 	    if(pci_bus_parent[busnum] < minbus ||
    262       1.1       mcr 	       pci_bus_parent[busnum] >= maxbus) {
    263       1.1       mcr 	      printf("%s: bus %d has illegal parent %d\n",
    264      1.25     joerg 		     device_xname(rct.csc->sc_dev),
    265       1.1       mcr 		     busnum, pci_bus_parent[busnum]);
    266       1.1       mcr 	      continue;
    267       1.1       mcr 	    }
    268       1.1       mcr 
    269       1.1       mcr 	    /* first round amount of space up */
    270       1.1       mcr 	    rct.bussize_ioreqs[busnum] =
    271       1.1       mcr 	      rbus_round_up(rct.bussize_ioreqs[busnum],  PPB_IO_MIN);
    272       1.1       mcr 	    rct.bussize_ioreqs[pci_bus_parent[busnum]] +=
    273       1.1       mcr 	      rct.bussize_ioreqs[busnum];
    274       1.1       mcr 
    275       1.1       mcr 	    rct.bussize_memreqs[busnum] =
    276       1.1       mcr 	      rbus_round_up(rct.bussize_memreqs[busnum], PPB_MEM_MIN);
    277       1.1       mcr 	    rct.bussize_memreqs[pci_bus_parent[busnum]] +=
    278       1.1       mcr 	      rct.bussize_memreqs[busnum];
    279       1.1       mcr 
    280       1.1       mcr 	  }
    281       1.1       mcr 	}
    282       1.1       mcr 
    283       1.1       mcr 	rct.bussize_ioreqs[minbus] =
    284       1.1       mcr 	  rbus_round_up(rct.bussize_ioreqs[minbus], 4096);
    285       1.1       mcr 	rct.bussize_memreqs[minbus] =
    286       1.1       mcr 	  rbus_round_up(rct.bussize_memreqs[minbus], 8);
    287       1.1       mcr 
    288      1.38    dyoung 	printf("%s: total needs IO %08zx and MEM %08zx\n",
    289      1.25     joerg 	       device_xname(rct.csc->sc_dev),
    290       1.1       mcr 	       rct.bussize_ioreqs[minbus], rct.bussize_memreqs[minbus]);
    291       1.1       mcr 
    292       1.1       mcr 	if(!caa->ca_rbus_iot) {
    293       1.1       mcr 	  panic("no iot bus");
    294       1.1       mcr 	}
    295       1.1       mcr 
    296       1.1       mcr 	if(rct.bussize_ioreqs[minbus]) {
    297       1.1       mcr 	  if(rbus_space_alloc(caa->ca_rbus_iot, 0,
    298       1.1       mcr 			      rct.bussize_ioreqs[minbus],
    299       1.1       mcr 			      rct.bussize_ioreqs[minbus]-1 /* mask  */,
    300       1.1       mcr 			      rct.bussize_ioreqs[minbus] /* align */,
    301       1.1       mcr 			      /* flags */ 0,
    302       1.1       mcr 			      &start,
    303       1.1       mcr 			      &handle) != 0) {
    304      1.38    dyoung 	    panic("rbus_ppb: can not allocate %zu bytes in IO bus %d",
    305       1.1       mcr 		  rct.bussize_ioreqs[minbus], minbus);
    306       1.1       mcr 	  }
    307       1.1       mcr 	  rct.iobustags[minbus]=rbus_new(caa->ca_rbus_iot,
    308      1.15     perry 					 start,
    309       1.1       mcr 					 rct.bussize_ioreqs[minbus],
    310       1.1       mcr 					 0 /* offset to add to physical address
    311       1.1       mcr 					      to make processor address */,
    312       1.1       mcr 					 RBUS_SPACE_DEDICATE);
    313       1.1       mcr 	}
    314       1.1       mcr 
    315       1.1       mcr 	if(rct.bussize_memreqs[minbus]) {
    316       1.1       mcr 	  if(rbus_space_alloc(caa->ca_rbus_memt, 0,
    317       1.1       mcr 			      rct.bussize_memreqs[minbus],
    318       1.1       mcr 			      rct.bussize_memreqs[minbus]-1 /* mask */,
    319       1.1       mcr 			      rct.bussize_memreqs[minbus] /* align */,
    320       1.1       mcr 			      /* flags */ 0,
    321       1.1       mcr 			      &start,
    322       1.1       mcr 			      &handle) != 0) {
    323      1.38    dyoung 	    panic("%s: can not allocate %zu bytes in MEM bus %d",
    324      1.25     joerg 		  device_xname(rct.csc->sc_dev),
    325       1.1       mcr 		  rct.bussize_memreqs[minbus], minbus);
    326       1.1       mcr 	  }
    327       1.1       mcr 	  rct.membustags[minbus]=rbus_new(caa->ca_rbus_memt,
    328       1.1       mcr 					  start,
    329       1.1       mcr 					  rct.bussize_memreqs[minbus],
    330       1.1       mcr 					  0 /* offset to add to physical
    331       1.1       mcr 					       address to make processor
    332       1.1       mcr 					       address */,
    333       1.1       mcr 					  RBUS_SPACE_DEDICATE);
    334       1.1       mcr 	}
    335       1.1       mcr 
    336       1.1       mcr 	for(busnum=minbus+1; busnum <= maxbus; busnum++) {
    337       1.1       mcr 	  int busparent;
    338       1.1       mcr 
    339       1.1       mcr 	  busparent = pci_bus_parent[busnum];
    340       1.1       mcr 
    341      1.38    dyoung 	  printf("%s: bus %d (parent=%d) needs IO %08zx and MEM %08zx\n",
    342      1.25     joerg 		 device_xname(rct.csc->sc_dev),
    343       1.1       mcr 		 busnum,
    344       1.1       mcr 		 busparent,
    345       1.1       mcr 		 rct.bussize_ioreqs[busnum],
    346       1.1       mcr 		 rct.bussize_memreqs[busnum]);
    347       1.1       mcr 
    348       1.1       mcr 	  if(busparent > maxbus) {
    349       1.1       mcr 	    panic("rbus_ppb: illegal parent");
    350       1.1       mcr 	  }
    351       1.1       mcr 
    352       1.1       mcr 	  if(rct.bussize_ioreqs[busnum]) {
    353       1.1       mcr 	    if(rbus_space_alloc(rct.iobustags[busparent],
    354       1.1       mcr 				0,
    355       1.1       mcr 				rct.bussize_ioreqs[busnum],
    356       1.1       mcr 				rct.bussize_ioreqs[busnum]-1 /*mask */,
    357       1.1       mcr 				rct.bussize_ioreqs[busnum] /* align */,
    358       1.1       mcr 				/* flags */ 0,
    359       1.1       mcr 				&start,
    360       1.1       mcr 				&handle) != 0) {
    361      1.38    dyoung 	      panic("rbus_ppb: can not allocate %zu bytes in IO bus %d",
    362       1.1       mcr 		    rct.bussize_ioreqs[busnum], busnum);
    363       1.1       mcr 	    }
    364       1.1       mcr 	    rct.iobustags[busnum]=rbus_new(rct.iobustags[busparent],
    365       1.1       mcr 					   start,
    366       1.1       mcr 					   rct.bussize_ioreqs[busnum],
    367       1.1       mcr 					   0 /* offset to add to physical
    368       1.1       mcr 						address
    369       1.1       mcr 						to make processor address */,
    370       1.1       mcr 					   RBUS_SPACE_DEDICATE);
    371       1.1       mcr 
    372       1.1       mcr 	    /* program the bridge */
    373      1.15     perry 
    374       1.1       mcr 	    /* enable I/O space */
    375       1.1       mcr 	    reg = pci_conf_read(pc, pci_bus_tag[busnum],
    376       1.1       mcr 				PCI_COMMAND_STATUS_REG);
    377       1.1       mcr 	    reg |= PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MASTER_ENABLE;
    378       1.1       mcr 	    pci_conf_write(pc, pci_bus_tag[busnum],
    379       1.1       mcr 			   PCI_COMMAND_STATUS_REG, reg);
    380       1.1       mcr 
    381       1.1       mcr 	    /* now init the limit register for I/O */
    382       1.1       mcr 	    pci_conf_write(pc, pci_bus_tag[busnum], PPB_REG_IOSTATUS,
    383       1.1       mcr 			   (((start & 0xf000) >> 8) << PPB_IOBASE_SHIFT) |
    384       1.1       mcr 			   ((((start +
    385       1.1       mcr 			       rct.bussize_ioreqs[busnum] +
    386       1.1       mcr 			       4095) & 0xf000) >> 8) << PPB_IOLIMIT_SHIFT));
    387       1.1       mcr 	  }
    388      1.15     perry 
    389       1.1       mcr 	  if(rct.bussize_memreqs[busnum]) {
    390       1.1       mcr 	    if(rbus_space_alloc(rct.membustags[busparent],
    391       1.1       mcr 				0,
    392      1.15     perry 				rct.bussize_memreqs[busnum] /* size  */,
    393      1.15     perry 				rct.bussize_memreqs[busnum]-1 /*mask */,
    394       1.1       mcr 				rct.bussize_memreqs[busnum] /* align */,
    395       1.1       mcr 				/* flags */ 0,
    396       1.1       mcr 				&start,
    397       1.1       mcr 				&handle) != 0) {
    398      1.38    dyoung 	      panic("rbus_ppb: can not allocate %zu bytes in MEM bus %d",
    399       1.1       mcr 		    rct.bussize_memreqs[busnum], busnum);
    400       1.1       mcr 	    }
    401       1.1       mcr 	    rct.membustags[busnum]=rbus_new(rct.membustags[busparent],
    402       1.1       mcr 					    start,
    403       1.1       mcr 					    rct.bussize_memreqs[busnum],
    404       1.1       mcr 					    0 /* offset to add to physical
    405       1.1       mcr 						 address to make processor
    406       1.1       mcr 						 address */,
    407       1.1       mcr 					    RBUS_SPACE_DEDICATE);
    408       1.1       mcr 
    409       1.1       mcr 	    /* program the bridge */
    410       1.1       mcr 	    /* enable memory space */
    411       1.1       mcr 	    reg = pci_conf_read(pc, pci_bus_tag[busnum],
    412       1.1       mcr 				PCI_COMMAND_STATUS_REG);
    413       1.1       mcr 	    reg |= PCI_COMMAND_MEM_ENABLE | PCI_COMMAND_MASTER_ENABLE;
    414       1.1       mcr 	    pci_conf_write(pc, pci_bus_tag[busnum],
    415       1.1       mcr 			   PCI_COMMAND_STATUS_REG, reg);
    416       1.1       mcr 
    417       1.1       mcr 	    /* now init the limit register for memory */
    418       1.1       mcr 	    pci_conf_write(pc, pci_bus_tag[busnum], PPB_REG_MEM,
    419       1.1       mcr 			   ((start & PPB_MEM_MASK)
    420       1.1       mcr 			    >> PPB_MEM_SHIFT) << PPB_MEMBASE_SHIFT |
    421       1.1       mcr 			   (((start +
    422       1.1       mcr 			     rct.bussize_memreqs[busnum] +
    423       1.1       mcr 			      PPB_MEM_MIN-1) >> PPB_MEM_SHIFT)
    424       1.1       mcr 			    << PPB_MEMLIMIT_SHIFT));
    425       1.1       mcr 
    426       1.1       mcr 	    /* and set the prefetchable limits as well */
    427       1.1       mcr 	    pci_conf_write(pc, pci_bus_tag[busnum], PPB_REG_PREFMEM,
    428       1.1       mcr 			   ((start & PPB_MEM_MASK)
    429       1.1       mcr 			    >> PPB_MEM_SHIFT) << PPB_MEMBASE_SHIFT |
    430       1.1       mcr 			   (((start +
    431       1.1       mcr 			     rct.bussize_memreqs[busnum] +
    432       1.1       mcr 			      PPB_MEM_MIN-1) >> PPB_MEM_SHIFT)
    433       1.1       mcr 			    << PPB_MEMLIMIT_SHIFT));
    434       1.1       mcr 
    435       1.1       mcr 	    /* pci_conf_print(pc, pci_bus_tag[busnum], NULL); */
    436       1.1       mcr 	  }
    437       1.1       mcr 	}
    438       1.1       mcr 
    439       1.1       mcr 	printf("%s: configuring buses %d-%d\n",
    440      1.25     joerg 		device_xname(rct.csc->sc_dev),
    441       1.1       mcr 	       minbus, maxbus);
    442       1.1       mcr 	pci_device_foreach_min(pc, minbus, maxbus,
    443       1.1       mcr 			       rbus_pci_phys_allocate, &rct);
    444      1.38    dyoung 
    445      1.38    dyoung 	kmem_free(rct.bussize_ioreqs, size);
    446      1.38    dyoung 	kmem_free(rct.bussize_memreqs, size);
    447      1.38    dyoung 	kmem_free(rct.iobustags, maxbus * sizeof(rbus_tag_t));
    448      1.38    dyoung 	kmem_free(rct.membustags, maxbus * sizeof(rbus_tag_t));
    449       1.1       mcr }
    450       1.1       mcr 
    451       1.1       mcr static void
    452      1.27       dsl rbus_pci_phys_countspace(pci_chipset_tag_t pc, pcitag_t tag, void *context)
    453       1.1       mcr {
    454       1.1       mcr         int bus, device, function;
    455       1.1       mcr 	struct  rbus_pci_addr_fixup_context *rct =
    456       1.1       mcr 	  (struct  rbus_pci_addr_fixup_context *)context;
    457       1.1       mcr 
    458       1.1       mcr 	pci_decompose_tag(pc, tag, &bus, &device, &function);
    459       1.1       mcr 
    460       1.1       mcr 	printf("%s: configuring device %02x:%02x:%02x\n",
    461      1.25     joerg 	       device_xname(rct->csc->sc_dev),
    462       1.1       mcr 	       bus, device, function);
    463       1.1       mcr 
    464       1.1       mcr 	pciaddr_resource_manage(pc, tag,
    465       1.1       mcr 				rbus_do_phys_countspace, context);
    466       1.1       mcr }
    467       1.1       mcr 
    468      1.15     perry 
    469       1.1       mcr int
    470      1.28       dsl rbus_do_phys_countspace(pci_chipset_tag_t pc, pcitag_t tag, int mapreg, void *ctx, int type, bus_addr_t *addr, bus_size_t size)
    471       1.1       mcr {
    472       1.1       mcr 	struct  rbus_pci_addr_fixup_context *rct =
    473       1.1       mcr 	  (struct  rbus_pci_addr_fixup_context *)ctx;
    474       1.1       mcr 	int bus, device, function;
    475       1.1       mcr 
    476       1.1       mcr 	pci_decompose_tag(pc, tag, &bus, &device, &function);
    477       1.1       mcr 
    478       1.1       mcr 	if(size > (1<<24)) {
    479       1.1       mcr 	  printf("%s: skipping huge space request of size=%08x\n",
    480      1.25     joerg 		 device_xname(rct->csc->sc_dev), (unsigned int)size);
    481       1.1       mcr 	  return 0;
    482       1.1       mcr 	}
    483       1.1       mcr 
    484       1.1       mcr 	if(PCI_MAPREG_TYPE(type) == PCI_MAPREG_TYPE_IO) {
    485       1.1       mcr 	  rct->bussize_ioreqs[bus] += size;
    486       1.1       mcr 	} else {
    487       1.1       mcr 	  rct->bussize_memreqs[bus]+= size;
    488       1.1       mcr 	}
    489      1.15     perry 
    490       1.1       mcr 	return 0;
    491       1.1       mcr }
    492       1.1       mcr 
    493       1.1       mcr static void
    494      1.27       dsl rbus_pci_phys_allocate(pci_chipset_tag_t pc, pcitag_t tag, void *context)
    495       1.1       mcr {
    496       1.1       mcr         int bus, device, function, command;
    497       1.1       mcr 	struct rbus_pci_addr_fixup_context *rct =
    498       1.1       mcr 	  (struct rbus_pci_addr_fixup_context *)context;
    499      1.15     perry 
    500       1.1       mcr 	pci_decompose_tag(pc, tag, &bus, &device, &function);
    501       1.1       mcr 
    502       1.1       mcr 	printf("%s: configuring device %02x:%02x:%02x\n",
    503      1.25     joerg 	       device_xname(rct->csc->sc_dev),
    504       1.1       mcr 	       bus, device, function);
    505       1.1       mcr 
    506       1.1       mcr 	pciaddr_resource_manage(pc, tag,
    507       1.1       mcr 				rbus_do_phys_allocate, context);
    508       1.1       mcr 
    509       1.1       mcr 	/* now turn the device's memory and I/O on */
    510       1.1       mcr 	command = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
    511       1.1       mcr 	command |= PCI_COMMAND_IO_ENABLE|PCI_COMMAND_MEM_ENABLE;
    512       1.1       mcr 	pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, command);
    513       1.1       mcr }
    514       1.1       mcr 
    515       1.1       mcr int
    516      1.28       dsl rbus_do_phys_allocate(pci_chipset_tag_t pc, pcitag_t tag, int mapreg, void *ctx, int type, bus_addr_t *addr, bus_size_t size)
    517       1.1       mcr {
    518       1.1       mcr 	struct  rbus_pci_addr_fixup_context *rct =
    519       1.1       mcr 	  (struct  rbus_pci_addr_fixup_context *)ctx;
    520       1.1       mcr 	cardbus_chipset_tag_t ct     = rct->ct;
    521       1.1       mcr 	struct cardbus_softc *sc     = rct->sc;
    522       1.1       mcr 	cardbus_function_t       *cf = sc->sc_cf;
    523       1.1       mcr 	rbus_tag_t          rbustag;
    524       1.1       mcr 	bus_addr_t mask = size -1;
    525       1.1       mcr 	bus_addr_t base = 0;
    526       1.1       mcr 	bus_space_handle_t handle;
    527       1.1       mcr 	int busflags = 0;
    528       1.1       mcr 	int flags    = 0;
    529      1.16  drochner 	const char *bustype;
    530       1.1       mcr 	int bus, device, function;
    531       1.1       mcr 
    532       1.1       mcr 	pci_decompose_tag(pc, tag, &bus, &device, &function);
    533       1.1       mcr 
    534       1.1       mcr 	/*
    535       1.1       mcr 	 * some devices come up with garbage in them (Tulip?)
    536       1.1       mcr 	 * we are in charge here, so give them address
    537      1.15     perry 	 * space anyway.
    538       1.1       mcr 	 *
    539       1.1       mcr 	 * XXX this may be due to no secondary PCI reset!!!
    540       1.1       mcr 	 */
    541       1.1       mcr #if 0
    542       1.1       mcr 	if (*addr) {
    543       1.1       mcr 		printf("Already allocated space at %08x\n",
    544       1.1       mcr 		       (unsigned int)*addr);
    545       1.1       mcr 		return (0);
    546       1.1       mcr 	}
    547       1.1       mcr #endif
    548       1.1       mcr 
    549       1.1       mcr 	if(size > (1<<24)) {
    550       1.1       mcr 	  printf("%s: skipping huge space request of size=%08x\n",
    551      1.25     joerg 		 device_xname(rct->csc->sc_dev), (unsigned int)size);
    552       1.1       mcr 	  return 0;
    553       1.1       mcr 	}
    554       1.1       mcr 
    555       1.1       mcr 	if(PCI_MAPREG_TYPE(type) == PCI_MAPREG_TYPE_IO) {
    556       1.1       mcr 	  rbustag = rct->iobustags[bus];
    557       1.1       mcr 	  bustype = "io";
    558       1.1       mcr 	} else {
    559       1.1       mcr 	  rbustag = rct->membustags[bus];
    560       1.1       mcr 	  bustype = "mem";
    561       1.1       mcr 	}
    562       1.1       mcr 
    563       1.1       mcr 	if((*cf->cardbus_space_alloc)(ct, rbustag, base, size,
    564       1.1       mcr 				      mask, size, busflags|flags,
    565       1.1       mcr 				      addr, &handle)) {
    566       1.1       mcr 	  printf("%s: no available resources (size=%08x) for bar %2d. fixup failed\n",
    567      1.25     joerg 		 device_xname(rct->csc->sc_dev), (unsigned int)size, mapreg);
    568       1.1       mcr 
    569       1.1       mcr 	  *addr = 0;
    570       1.1       mcr 	  pci_conf_write(pc, tag, mapreg, *addr);
    571       1.1       mcr 	  return (1);
    572       1.1       mcr 	}
    573       1.1       mcr 
    574       1.1       mcr 	printf("%s: alloc %s space of size %08x for %02d:%02d:%02d -> %08x\n",
    575      1.25     joerg 	       device_xname(rct->csc->sc_dev),
    576      1.15     perry 	       bustype,
    577       1.1       mcr 	       (unsigned int)size,
    578       1.1       mcr 	       bus, device, function, (unsigned int)*addr);
    579       1.1       mcr 
    580       1.1       mcr 	/* write new address to PCI device configuration header */
    581       1.1       mcr 	pci_conf_write(pc, tag, mapreg, *addr);
    582       1.1       mcr 
    583       1.1       mcr 	/* check */
    584       1.1       mcr 	{
    585       1.1       mcr 		DPRINTF(("%s: pci_addr_fixup: ",
    586      1.25     joerg 			 device_xname(rct->csc->sc_dev)));
    587       1.1       mcr #ifdef  CBB_DEBUG
    588       1.1       mcr 		if(rbus_ppb_debug) { pciaddr_print_devid(pc, tag); }
    589       1.1       mcr #endif
    590       1.1       mcr 	}
    591       1.1       mcr 
    592       1.1       mcr 	/* double check that the value got inserted correctly */
    593       1.1       mcr 	if (pciaddr_ioaddr(pci_conf_read(pc, tag, mapreg)) != *addr) {
    594       1.1       mcr 		pci_conf_write(pc, tag, mapreg, 0); /* clear */
    595       1.1       mcr 		printf("%s: fixup failed. (new address=%#x)\n",
    596      1.25     joerg 		       device_xname(rct->csc->sc_dev),
    597       1.1       mcr 		       (unsigned)*addr);
    598       1.1       mcr 		return (1);
    599       1.1       mcr 	}
    600       1.1       mcr 
    601       1.1       mcr 	DPRINTF(("new address 0x%08x\n",
    602       1.1       mcr 		 (unsigned)*addr));
    603       1.1       mcr 
    604       1.1       mcr 	return (0);
    605       1.1       mcr }
    606       1.1       mcr 
    607       1.1       mcr static void
    608      1.25     joerg ppb_cardbus_attach(device_t parent, device_t self, void *aux)
    609       1.1       mcr {
    610      1.19   thorpej 	struct ppb_cardbus_softc *csc = device_private(self);
    611      1.24     joerg 	struct cardbus_softc *parent_sc = device_private(parent);
    612       1.1       mcr 	struct cardbus_attach_args *ca = aux;
    613       1.1       mcr 	cardbus_devfunc_t ct = ca->ca_ct;
    614       1.1       mcr 	cardbus_chipset_tag_t cc = ct->ct_cc;
    615       1.1       mcr 	struct pccbb_softc *psc = (struct pccbb_softc *)cc;
    616       1.1       mcr 	struct pcibus_attach_args pba;
    617       1.1       mcr 	char devinfo[256];
    618       1.1       mcr 	pcireg_t busdata;
    619       1.1       mcr 	int minbus, maxbus;
    620       1.1       mcr 
    621      1.25     joerg 	csc->sc_dev = self;
    622      1.25     joerg 
    623      1.11    itojun 	pci_devinfo(ca->ca_id, ca->ca_class, 0, devinfo, sizeof(devinfo));
    624       1.1       mcr 	printf(": %s (rev. 0x%02x)\n", devinfo, PCI_REVISION(ca->ca_class));
    625       1.1       mcr 
    626      1.32    dyoung 	csc->sc_tag = ca->ca_tag;
    627       1.3   thorpej 
    628      1.35    dyoung 	busdata = Cardbus_conf_read(ct, ca->ca_tag, PPB_REG_BUSINFO);
    629       1.1       mcr 	minbus = pcibios_max_bus;
    630      1.10     lukem 	maxbus = minbus;		/* XXX; gcc */
    631       1.1       mcr 
    632       1.1       mcr 	if (PPB_BUSINFO_SECONDARY(busdata) == 0) {
    633      1.21    cegger 		aprint_error_dev(self, "not configured by system firmware calling pci_bus_fixup(%d)\n", 0);
    634       1.1       mcr 
    635       1.1       mcr 	  /*
    636       1.1       mcr 	   * first, pull the reset wire on the secondary bridge
    637       1.1       mcr 	   * to clear all devices
    638       1.1       mcr 	   */
    639      1.35    dyoung 	  busdata = Cardbus_conf_read(ct, ca->ca_tag,
    640       1.1       mcr 				      PPB_REG_BRIDGECONTROL);
    641      1.35    dyoung 	  Cardbus_conf_write(ct, ca->ca_tag, PPB_REG_BRIDGECONTROL,
    642       1.1       mcr 			     busdata | PPB_BC_SECONDARY_RESET);
    643       1.1       mcr 	  delay(1);
    644      1.35    dyoung 	  Cardbus_conf_write(ct, ca->ca_tag, PPB_REG_BRIDGECONTROL,
    645       1.1       mcr 			     busdata);
    646       1.1       mcr 
    647       1.1       mcr 	  /* then go initialize the bridge control registers */
    648       1.1       mcr 	  maxbus = pci_bus_fixup(psc->sc_pc, 0);
    649       1.1       mcr 	}
    650       1.1       mcr 
    651      1.35    dyoung 	busdata = Cardbus_conf_read(ct, ca->ca_tag, PPB_REG_BUSINFO);
    652       1.1       mcr 	if(PPB_BUSINFO_SECONDARY(busdata) == 0) {
    653      1.21    cegger 		aprint_error_dev(self, "still not configured, not fixable.\n");
    654      1.21    cegger 		return;
    655       1.1       mcr 	}
    656       1.1       mcr 
    657      1.15     perry #if 0
    658       1.1       mcr 	minbus = PPB_BUSINFO_SECONDARY(busdata);
    659       1.1       mcr 	maxbus = PPB_BUSINFO_SUBORDINATE(busdata);
    660       1.1       mcr #endif
    661      1.15     perry 
    662       1.1       mcr 	/* now, go and assign addresses for the new devices */
    663       1.1       mcr 	rbus_pci_addr_fixup(csc, cc, parent_sc,
    664       1.1       mcr 			    psc->sc_pc,
    665       1.1       mcr 			    ca,
    666       1.1       mcr 			    minbus, maxbus);
    667       1.1       mcr 
    668       1.1       mcr 	/*
    669       1.1       mcr 	 * now configure all connected devices to the IRQ which
    670       1.1       mcr 	 * was assigned to this slot, as they will all arrive from
    671       1.1       mcr 	 * that IRQ.
    672       1.1       mcr 	 */
    673      1.41  drochner 	rbus_intr_fixup(psc->sc_pc, minbus, maxbus, 0);
    674       1.1       mcr 
    675      1.15     perry 	/*
    676       1.1       mcr 	 * enable direct routing of interrupts. We do this because
    677       1.1       mcr 	 * we can not manage to get pccb_intr_establish() called until
    678       1.1       mcr 	 * PCI subsystem is merged with rbus. The major thing that this
    679       1.1       mcr 	 * routine does is avoid calling the driver's interrupt routine
    680       1.1       mcr 	 * when the card has been removed.
    681       1.1       mcr 	 *
    682       1.1       mcr 	 * The rbus_ppb.c can not cope with card desertions until the merging
    683       1.1       mcr 	 * anyway.
    684       1.1       mcr 	 */
    685       1.1       mcr 	pccbb_intr_route(psc);
    686       1.1       mcr 
    687       1.1       mcr 	/*
    688       1.1       mcr 	 * Attach the PCI bus than hangs off of it.
    689       1.1       mcr 	 *
    690       1.1       mcr 	 * XXX Don't pass-through Memory Read Multiple.  Should we?
    691       1.1       mcr 	 * XXX Consult the spec...
    692      1.15     perry 	 */
    693       1.1       mcr 	pba.pba_iot  = ca->ca_iot;
    694       1.1       mcr 	pba.pba_memt = ca->ca_memt;
    695       1.1       mcr 	pba.pba_dmat = ca->ca_dmat;
    696       1.1       mcr 	pba.pba_pc   = psc->sc_pc;
    697      1.40    dyoung 	pba.pba_flags    = PCI_FLAGS_IO_OKAY|PCI_FLAGS_MEM_OKAY;
    698       1.1       mcr 	pba.pba_bus      = PPB_BUSINFO_SECONDARY(busdata);
    699       1.4     lukem 	pba.pba_bridgetag = &csc->sc_tag;
    700       1.1       mcr 	/*pba.pba_intrswiz = parent_sc->sc_intrswiz; */
    701       1.1       mcr 	pba.pba_intrtag  = psc->sc_pa.pa_intrtag;
    702       1.1       mcr 
    703      1.13  drochner 	config_found_ia(self, "pcibus", &pba, rppbprint);
    704       1.1       mcr }
    705       1.1       mcr 
    706       1.1       mcr int
    707      1.31    cegger ppb_activate(device_t self, enum devact act)
    708       1.1       mcr {
    709       1.1       mcr   printf("ppb_activate called\n");
    710       1.1       mcr   return 0;
    711       1.1       mcr }
    712       1.1       mcr 
    713