rbus_ppb.c revision 1.22.2.2
1 /* $NetBSD: rbus_ppb.c,v 1.22.2.2 2008/09/18 04:35:02 wrstuden Exp $ */ 2 3 /* 4 * Copyright (c) 1999 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Michael Richardson <mcr (at) sandelman.ottawa.on.ca> 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /* 33 * CardBus front-end for the Intel/Digital DECchip 21152 PCI-PCI bridge 34 */ 35 36 #include <sys/cdefs.h> 37 __KERNEL_RCSID(0, "$NetBSD: rbus_ppb.c,v 1.22.2.2 2008/09/18 04:35:02 wrstuden Exp $"); 38 39 #include <sys/param.h> 40 #include <sys/systm.h> 41 #include <sys/mbuf.h> 42 #include <sys/malloc.h> 43 #include <sys/kernel.h> 44 #include <sys/socket.h> 45 #include <sys/ioctl.h> 46 #include <sys/errno.h> 47 #include <sys/device.h> 48 49 #if NRND > 0 50 #include <sys/rnd.h> 51 #endif 52 53 #include <machine/endian.h> 54 55 #include <sys/bus.h> 56 #include <sys/intr.h> 57 58 #include <dev/pci/pcivar.h> 59 #include <dev/pci/pcireg.h> 60 #include <dev/pci/pcidevs.h> 61 #include <dev/pci/ppbreg.h> 62 63 #include <dev/ic/i82365reg.h> 64 65 #include <dev/pci/pccbbreg.h> 66 #include <dev/pci/pccbbvar.h> 67 68 #include <dev/cardbus/cardbusvar.h> 69 #include <dev/pci/pcidevs.h> 70 71 #include <x86/pci/pci_addr_fixup.h> 72 #include <x86/pci/pci_bus_fixup.h> 73 #include <i386/pci/pci_intr_fixup.h> 74 #include <i386/pci/pcibios.h> 75 76 struct ppb_softc; 77 78 static int ppb_cardbus_match(struct device *, struct cfdata *, void *); 79 static void ppb_cardbus_attach(struct device *, struct device *, void *); 80 static int ppb_cardbus_detach(struct device * self, int flags); 81 /*static*/ void ppb_cardbus_setup(struct ppb_softc * sc); 82 /*static*/ int ppb_cardbus_enable(struct ppb_softc * sc); 83 /*static*/ void ppb_cardbus_disable(struct ppb_softc * sc); 84 static int ppb_activate(struct device *, enum devact); 85 int rppbprint(void *, const char *); 86 int rbus_intr_fixup(pci_chipset_tag_t, int, int, int); 87 void rbus_do_header_fixup(pci_chipset_tag_t, pcitag_t, void *); 88 89 static void rbus_pci_phys_allocate(pci_chipset_tag_t, pcitag_t, void *); 90 91 static int rbus_do_phys_allocate(pci_chipset_tag_t, pcitag_t, int, 92 void *, int, bus_addr_t *, bus_size_t); 93 94 static void rbus_pci_phys_countspace(pci_chipset_tag_t, pcitag_t, void *); 95 96 static int rbus_do_phys_countspace(pci_chipset_tag_t, pcitag_t, int, 97 void *, int, bus_addr_t *, bus_size_t); 98 99 unsigned int rbus_round_up(unsigned int, unsigned int); 100 101 102 struct ppb_cardbus_softc { 103 device_t sc_dev; 104 pcitag_t sc_tag; 105 int foo; 106 }; 107 108 CFATTACH_DECL_NEW(rbus_ppb, sizeof(struct ppb_cardbus_softc), 109 ppb_cardbus_match, ppb_cardbus_attach, ppb_cardbus_detach, ppb_activate); 110 111 #ifdef CBB_DEBUG 112 int rbus_ppb_debug = 0; /* hack with kdb */ 113 #define DPRINTF(X) if(rbus_ppb_debug) printf X 114 #else 115 #define DPRINTF(X) 116 #endif 117 118 static int 119 ppb_cardbus_match(parent, match, aux) 120 struct device *parent; 121 struct cfdata *match; 122 void *aux; 123 { 124 struct cardbus_attach_args *ca = aux; 125 126 if (CARDBUS_VENDOR(ca->ca_id) == PCI_VENDOR_DEC && 127 CARDBUS_PRODUCT(ca->ca_id) == PCI_PRODUCT_DEC_21152) 128 return (1); 129 130 if(PCI_CLASS(ca->ca_class) == PCI_CLASS_BRIDGE && 131 PCI_SUBCLASS(ca->ca_class) == PCI_SUBCLASS_BRIDGE_PCI) { 132 /* XXX */ 133 printf("recognizing generic bridge chip\n"); 134 } 135 136 return (0); 137 } 138 139 140 int 141 rppbprint(aux, pnp) 142 void *aux; 143 const char *pnp; 144 { 145 struct pcibus_attach_args *pba = aux; 146 147 /* only PCIs can attach to PPBs; easy. */ 148 if (pnp) 149 aprint_normal("pci at %s", pnp); 150 aprint_normal(" bus %d (rbus)", pba->pba_bus); 151 return (UNCONF); 152 } 153 154 int 155 rbus_intr_fixup(pci_chipset_tag_t pc, 156 int minbus, 157 int maxbus, 158 int line) 159 { 160 pci_device_foreach_min(pc, minbus, 161 maxbus, rbus_do_header_fixup, (void *)&line); 162 return 0; 163 } 164 165 void 166 rbus_do_header_fixup(pc, tag, context) 167 pci_chipset_tag_t pc; 168 pcitag_t tag; 169 void *context; 170 { 171 int pin, irq; 172 int bus, device, function; 173 pcireg_t intr, id; 174 int *pline = (int *)context; 175 int line = *pline; 176 177 pci_decompose_tag(pc, tag, &bus, &device, &function); 178 id = pci_conf_read(pc, tag, PCI_ID_REG); 179 180 intr = pci_conf_read(pc, tag, PCI_INTERRUPT_REG); 181 pin = PCI_INTERRUPT_PIN(intr); 182 irq = PCI_INTERRUPT_LINE(intr); 183 184 #if 0 185 printf("do_header %02x:%02x:%02x pin=%d => line %d\n", 186 bus, device, function, pin, line); 187 #endif 188 189 intr &= ~(PCI_INTERRUPT_LINE_MASK << PCI_INTERRUPT_LINE_SHIFT); 190 intr |= (line << PCI_INTERRUPT_LINE_SHIFT); 191 pci_conf_write(pc, tag, PCI_INTERRUPT_REG, intr); 192 193 } 194 195 /* 196 * This function takes a range of PCI bus numbers and 197 * allocates space for all devices found in this space (the BARs) from 198 * the rbus space maps (I/O and memory). 199 * 200 * It assumes that "rbus" is defined. The whole concept does. 201 * 202 * It uses pci_device_foreach_min() to call rbus_pci_phys_allocate. 203 * This function is mostly stolen from 204 * pci_addr_fixup.c:pciaddr_resource_reserve. 205 * 206 */ 207 struct rbus_pci_addr_fixup_context { 208 struct ppb_cardbus_softc *csc; 209 cardbus_chipset_tag_t ct; 210 struct cardbus_softc *sc; 211 struct cardbus_attach_args *caa; 212 int minbus; 213 int maxbus; 214 bus_size_t *bussize_ioreqs; 215 bus_size_t *bussize_memreqs; 216 rbus_tag_t *iobustags; 217 rbus_tag_t *membustags; 218 }; 219 220 unsigned int 221 rbus_round_up(unsigned int size, unsigned int minval) 222 { 223 unsigned int power2; 224 225 if(size == 0) { 226 return 0; 227 } 228 229 power2=minval; 230 231 while(power2 < (1 << 31) && 232 power2 < size) { 233 power2 = power2 << 1; 234 } 235 236 return power2; 237 } 238 239 static void 240 rbus_pci_addr_fixup(struct ppb_cardbus_softc *csc, 241 cardbus_chipset_tag_t ct, 242 struct cardbus_softc *sc, 243 pci_chipset_tag_t pc, 244 struct cardbus_attach_args *caa, 245 int minbus, int maxbus) 246 { 247 struct rbus_pci_addr_fixup_context rct; 248 int size, busnum; 249 bus_addr_t start; 250 bus_space_handle_t handle; 251 u_int32_t reg; 252 253 rct.csc=csc; 254 rct.ct=ct; 255 rct.sc=sc; 256 rct.caa=caa; 257 rct.minbus = minbus; 258 rct.maxbus = maxbus; 259 size = sizeof(bus_size_t)*(maxbus+1); 260 rct.bussize_ioreqs = alloca(size); 261 rct.bussize_memreqs = alloca(size); 262 rct.iobustags = alloca(maxbus * sizeof(rbus_tag_t)); 263 rct.membustags = alloca(maxbus * sizeof(rbus_tag_t)); 264 265 bzero(rct.bussize_ioreqs, size); 266 bzero(rct.bussize_memreqs, size); 267 268 printf("%s: sizing buses %d-%d\n", 269 device_xname(rct.csc->sc_dev), 270 minbus, maxbus); 271 272 pci_device_foreach_min(pc, minbus, maxbus, 273 rbus_pci_phys_countspace, &rct); 274 275 /* 276 * we need to determine amount of address space for each 277 * bus. To do this, we have to roll up amounts and then 278 * we need to divide up the cardbus's extent to allocate 279 * some space to each bus. 280 */ 281 282 for(busnum=maxbus; busnum > minbus; busnum--) { 283 if(pci_bus_parent[busnum] != 0) { 284 if(pci_bus_parent[busnum] < minbus || 285 pci_bus_parent[busnum] >= maxbus) { 286 printf("%s: bus %d has illegal parent %d\n", 287 device_xname(rct.csc->sc_dev), 288 busnum, pci_bus_parent[busnum]); 289 continue; 290 } 291 292 /* first round amount of space up */ 293 rct.bussize_ioreqs[busnum] = 294 rbus_round_up(rct.bussize_ioreqs[busnum], PPB_IO_MIN); 295 rct.bussize_ioreqs[pci_bus_parent[busnum]] += 296 rct.bussize_ioreqs[busnum]; 297 298 rct.bussize_memreqs[busnum] = 299 rbus_round_up(rct.bussize_memreqs[busnum], PPB_MEM_MIN); 300 rct.bussize_memreqs[pci_bus_parent[busnum]] += 301 rct.bussize_memreqs[busnum]; 302 303 } 304 } 305 306 rct.bussize_ioreqs[minbus] = 307 rbus_round_up(rct.bussize_ioreqs[minbus], 4096); 308 rct.bussize_memreqs[minbus] = 309 rbus_round_up(rct.bussize_memreqs[minbus], 8); 310 311 printf("%s: total needs IO %08lx and MEM %08lx\n", 312 device_xname(rct.csc->sc_dev), 313 rct.bussize_ioreqs[minbus], rct.bussize_memreqs[minbus]); 314 315 if(!caa->ca_rbus_iot) { 316 panic("no iot bus"); 317 } 318 319 if(rct.bussize_ioreqs[minbus]) { 320 if(rbus_space_alloc(caa->ca_rbus_iot, 0, 321 rct.bussize_ioreqs[minbus], 322 rct.bussize_ioreqs[minbus]-1 /* mask */, 323 rct.bussize_ioreqs[minbus] /* align */, 324 /* flags */ 0, 325 &start, 326 &handle) != 0) { 327 panic("rbus_ppb: can not allocate %ld bytes in IO bus %d", 328 rct.bussize_ioreqs[minbus], minbus); 329 } 330 rct.iobustags[minbus]=rbus_new(caa->ca_rbus_iot, 331 start, 332 rct.bussize_ioreqs[minbus], 333 0 /* offset to add to physical address 334 to make processor address */, 335 RBUS_SPACE_DEDICATE); 336 } 337 338 if(rct.bussize_memreqs[minbus]) { 339 if(rbus_space_alloc(caa->ca_rbus_memt, 0, 340 rct.bussize_memreqs[minbus], 341 rct.bussize_memreqs[minbus]-1 /* mask */, 342 rct.bussize_memreqs[minbus] /* align */, 343 /* flags */ 0, 344 &start, 345 &handle) != 0) { 346 panic("%s: can not allocate %ld bytes in MEM bus %d", 347 device_xname(rct.csc->sc_dev), 348 rct.bussize_memreqs[minbus], minbus); 349 } 350 rct.membustags[minbus]=rbus_new(caa->ca_rbus_memt, 351 start, 352 rct.bussize_memreqs[minbus], 353 0 /* offset to add to physical 354 address to make processor 355 address */, 356 RBUS_SPACE_DEDICATE); 357 } 358 359 for(busnum=minbus+1; busnum <= maxbus; busnum++) { 360 int busparent; 361 362 busparent = pci_bus_parent[busnum]; 363 364 printf("%s: bus %d (parent=%d) needs IO %08lx and MEM %08lx\n", 365 device_xname(rct.csc->sc_dev), 366 busnum, 367 busparent, 368 rct.bussize_ioreqs[busnum], 369 rct.bussize_memreqs[busnum]); 370 371 if(busparent > maxbus) { 372 panic("rbus_ppb: illegal parent"); 373 } 374 375 if(rct.bussize_ioreqs[busnum]) { 376 if(rbus_space_alloc(rct.iobustags[busparent], 377 0, 378 rct.bussize_ioreqs[busnum], 379 rct.bussize_ioreqs[busnum]-1 /*mask */, 380 rct.bussize_ioreqs[busnum] /* align */, 381 /* flags */ 0, 382 &start, 383 &handle) != 0) { 384 panic("rbus_ppb: can not allocate %ld bytes in IO bus %d", 385 rct.bussize_ioreqs[busnum], busnum); 386 } 387 rct.iobustags[busnum]=rbus_new(rct.iobustags[busparent], 388 start, 389 rct.bussize_ioreqs[busnum], 390 0 /* offset to add to physical 391 address 392 to make processor address */, 393 RBUS_SPACE_DEDICATE); 394 395 /* program the bridge */ 396 397 /* enable I/O space */ 398 reg = pci_conf_read(pc, pci_bus_tag[busnum], 399 PCI_COMMAND_STATUS_REG); 400 reg |= PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MASTER_ENABLE; 401 pci_conf_write(pc, pci_bus_tag[busnum], 402 PCI_COMMAND_STATUS_REG, reg); 403 404 /* now init the limit register for I/O */ 405 pci_conf_write(pc, pci_bus_tag[busnum], PPB_REG_IOSTATUS, 406 (((start & 0xf000) >> 8) << PPB_IOBASE_SHIFT) | 407 ((((start + 408 rct.bussize_ioreqs[busnum] + 409 4095) & 0xf000) >> 8) << PPB_IOLIMIT_SHIFT)); 410 } 411 412 if(rct.bussize_memreqs[busnum]) { 413 if(rbus_space_alloc(rct.membustags[busparent], 414 0, 415 rct.bussize_memreqs[busnum] /* size */, 416 rct.bussize_memreqs[busnum]-1 /*mask */, 417 rct.bussize_memreqs[busnum] /* align */, 418 /* flags */ 0, 419 &start, 420 &handle) != 0) { 421 panic("rbus_ppb: can not allocate %ld bytes in MEM bus %d", 422 rct.bussize_memreqs[busnum], busnum); 423 } 424 rct.membustags[busnum]=rbus_new(rct.membustags[busparent], 425 start, 426 rct.bussize_memreqs[busnum], 427 0 /* offset to add to physical 428 address to make processor 429 address */, 430 RBUS_SPACE_DEDICATE); 431 432 /* program the bridge */ 433 /* enable memory space */ 434 reg = pci_conf_read(pc, pci_bus_tag[busnum], 435 PCI_COMMAND_STATUS_REG); 436 reg |= PCI_COMMAND_MEM_ENABLE | PCI_COMMAND_MASTER_ENABLE; 437 pci_conf_write(pc, pci_bus_tag[busnum], 438 PCI_COMMAND_STATUS_REG, reg); 439 440 /* now init the limit register for memory */ 441 pci_conf_write(pc, pci_bus_tag[busnum], PPB_REG_MEM, 442 ((start & PPB_MEM_MASK) 443 >> PPB_MEM_SHIFT) << PPB_MEMBASE_SHIFT | 444 (((start + 445 rct.bussize_memreqs[busnum] + 446 PPB_MEM_MIN-1) >> PPB_MEM_SHIFT) 447 << PPB_MEMLIMIT_SHIFT)); 448 449 /* and set the prefetchable limits as well */ 450 pci_conf_write(pc, pci_bus_tag[busnum], PPB_REG_PREFMEM, 451 ((start & PPB_MEM_MASK) 452 >> PPB_MEM_SHIFT) << PPB_MEMBASE_SHIFT | 453 (((start + 454 rct.bussize_memreqs[busnum] + 455 PPB_MEM_MIN-1) >> PPB_MEM_SHIFT) 456 << PPB_MEMLIMIT_SHIFT)); 457 458 /* pci_conf_print(pc, pci_bus_tag[busnum], NULL); */ 459 } 460 } 461 462 printf("%s: configuring buses %d-%d\n", 463 device_xname(rct.csc->sc_dev), 464 minbus, maxbus); 465 pci_device_foreach_min(pc, minbus, maxbus, 466 rbus_pci_phys_allocate, &rct); 467 } 468 469 static void 470 rbus_pci_phys_countspace(pc, tag, context) 471 pci_chipset_tag_t pc; 472 pcitag_t tag; 473 void *context; 474 { 475 int bus, device, function; 476 struct rbus_pci_addr_fixup_context *rct = 477 (struct rbus_pci_addr_fixup_context *)context; 478 479 pci_decompose_tag(pc, tag, &bus, &device, &function); 480 481 printf("%s: configuring device %02x:%02x:%02x\n", 482 device_xname(rct->csc->sc_dev), 483 bus, device, function); 484 485 pciaddr_resource_manage(pc, tag, 486 rbus_do_phys_countspace, context); 487 } 488 489 490 int 491 rbus_do_phys_countspace(pc, tag, mapreg, ctx, type, addr, size) 492 pci_chipset_tag_t pc; 493 pcitag_t tag; 494 void *ctx; 495 int mapreg, type; 496 bus_addr_t *addr; 497 bus_size_t size; 498 { 499 struct rbus_pci_addr_fixup_context *rct = 500 (struct rbus_pci_addr_fixup_context *)ctx; 501 int bus, device, function; 502 503 pci_decompose_tag(pc, tag, &bus, &device, &function); 504 505 if(size > (1<<24)) { 506 printf("%s: skipping huge space request of size=%08x\n", 507 device_xname(rct->csc->sc_dev), (unsigned int)size); 508 return 0; 509 } 510 511 if(PCI_MAPREG_TYPE(type) == PCI_MAPREG_TYPE_IO) { 512 rct->bussize_ioreqs[bus] += size; 513 } else { 514 rct->bussize_memreqs[bus]+= size; 515 } 516 517 return 0; 518 } 519 520 static void 521 rbus_pci_phys_allocate(pc, tag, context) 522 pci_chipset_tag_t pc; 523 pcitag_t tag; 524 void *context; 525 { 526 int bus, device, function, command; 527 struct rbus_pci_addr_fixup_context *rct = 528 (struct rbus_pci_addr_fixup_context *)context; 529 //cardbus_chipset_tag_t ct = rct->ct; 530 // struct cardbus_softc *sc = rct->sc; 531 532 pci_decompose_tag(pc, tag, &bus, &device, &function); 533 534 printf("%s: configuring device %02x:%02x:%02x\n", 535 device_xname(rct->csc->sc_dev), 536 bus, device, function); 537 538 pciaddr_resource_manage(pc, tag, 539 rbus_do_phys_allocate, context); 540 541 /* now turn the device's memory and I/O on */ 542 command = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG); 543 command |= PCI_COMMAND_IO_ENABLE|PCI_COMMAND_MEM_ENABLE; 544 pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, command); 545 } 546 547 int 548 rbus_do_phys_allocate(pc, tag, mapreg, ctx, type, addr, size) 549 pci_chipset_tag_t pc; 550 pcitag_t tag; 551 void *ctx; 552 int mapreg, type; 553 bus_addr_t *addr; 554 bus_size_t size; 555 { 556 struct rbus_pci_addr_fixup_context *rct = 557 (struct rbus_pci_addr_fixup_context *)ctx; 558 cardbus_chipset_tag_t ct = rct->ct; 559 struct cardbus_softc *sc = rct->sc; 560 cardbus_function_t *cf = sc->sc_cf; 561 rbus_tag_t rbustag; 562 bus_space_tag_t bustag; 563 bus_addr_t mask = size -1; 564 bus_addr_t base = 0; 565 bus_space_handle_t handle; 566 int busflags = 0; 567 int flags = 0; 568 const char *bustype; 569 int bus, device, function; 570 571 pci_decompose_tag(pc, tag, &bus, &device, &function); 572 573 /* 574 * some devices come up with garbage in them (Tulip?) 575 * we are in charge here, so give them address 576 * space anyway. 577 * 578 * XXX this may be due to no secondary PCI reset!!! 579 */ 580 #if 0 581 if (*addr) { 582 printf("Already allocated space at %08x\n", 583 (unsigned int)*addr); 584 return (0); 585 } 586 #endif 587 588 if(size > (1<<24)) { 589 printf("%s: skipping huge space request of size=%08x\n", 590 device_xname(rct->csc->sc_dev), (unsigned int)size); 591 return 0; 592 } 593 594 if(PCI_MAPREG_TYPE(type) == PCI_MAPREG_TYPE_IO) { 595 bustag = sc->sc_iot; 596 rbustag = rct->iobustags[bus]; 597 bustype = "io"; 598 } else { 599 bustag = sc->sc_memt; 600 rbustag = rct->membustags[bus]; 601 bustype = "mem"; 602 } 603 604 if((*cf->cardbus_space_alloc)(ct, rbustag, base, size, 605 mask, size, busflags|flags, 606 addr, &handle)) { 607 printf("%s: no available resources (size=%08x) for bar %2d. fixup failed\n", 608 device_xname(rct->csc->sc_dev), (unsigned int)size, mapreg); 609 610 *addr = 0; 611 pci_conf_write(pc, tag, mapreg, *addr); 612 return (1); 613 } 614 615 printf("%s: alloc %s space of size %08x for %02d:%02d:%02d -> %08x\n", 616 device_xname(rct->csc->sc_dev), 617 bustype, 618 (unsigned int)size, 619 bus, device, function, (unsigned int)*addr); 620 621 /* write new address to PCI device configuration header */ 622 pci_conf_write(pc, tag, mapreg, *addr); 623 624 /* check */ 625 { 626 DPRINTF(("%s: pci_addr_fixup: ", 627 device_xname(rct->csc->sc_dev))); 628 #ifdef CBB_DEBUG 629 if(rbus_ppb_debug) { pciaddr_print_devid(pc, tag); } 630 #endif 631 } 632 633 /* double check that the value got inserted correctly */ 634 if (pciaddr_ioaddr(pci_conf_read(pc, tag, mapreg)) != *addr) { 635 pci_conf_write(pc, tag, mapreg, 0); /* clear */ 636 printf("%s: fixup failed. (new address=%#x)\n", 637 device_xname(rct->csc->sc_dev), 638 (unsigned)*addr); 639 return (1); 640 } 641 642 DPRINTF(("new address 0x%08x\n", 643 (unsigned)*addr)); 644 645 return (0); 646 } 647 648 static void 649 ppb_cardbus_attach(device_t parent, device_t self, void *aux) 650 { 651 struct ppb_cardbus_softc *csc = device_private(self); 652 struct cardbus_softc *parent_sc = device_private(parent); 653 struct cardbus_attach_args *ca = aux; 654 cardbus_devfunc_t ct = ca->ca_ct; 655 cardbus_chipset_tag_t cc = ct->ct_cc; 656 cardbus_function_tag_t cf = ct->ct_cf; 657 struct pccbb_softc *psc = (struct pccbb_softc *)cc; 658 struct pcibus_attach_args pba; 659 char devinfo[256]; 660 pcireg_t busdata; 661 int mybus, rv; 662 u_int16_t pciirq; 663 int minbus, maxbus; 664 665 csc->sc_dev = self; 666 667 mybus = ct->ct_bus; 668 pciirq = 0; 669 rv = 0; 670 671 /* shut up compiler */ 672 csc->foo = parent_sc->sc_intrline; 673 674 675 pci_devinfo(ca->ca_id, ca->ca_class, 0, devinfo, sizeof(devinfo)); 676 printf(": %s (rev. 0x%02x)\n", devinfo, PCI_REVISION(ca->ca_class)); 677 678 csc->sc_tag = ca->ca_tag; /* XXX cardbustag_t == pcitag_t */ 679 680 busdata = cardbus_conf_read(cc, cf, ca->ca_tag, PPB_REG_BUSINFO); 681 minbus = pcibios_max_bus; 682 maxbus = minbus; /* XXX; gcc */ 683 684 if (PPB_BUSINFO_SECONDARY(busdata) == 0) { 685 aprint_error_dev(self, "not configured by system firmware calling pci_bus_fixup(%d)\n", 0); 686 687 /* 688 * first, pull the reset wire on the secondary bridge 689 * to clear all devices 690 */ 691 busdata = cardbus_conf_read(cc, cf, ca->ca_tag, 692 PPB_REG_BRIDGECONTROL); 693 cardbus_conf_write(cc, cf, ca->ca_tag, PPB_REG_BRIDGECONTROL, 694 busdata | PPB_BC_SECONDARY_RESET); 695 delay(1); 696 cardbus_conf_write(cc, cf, ca->ca_tag, PPB_REG_BRIDGECONTROL, 697 busdata); 698 699 /* then go initialize the bridge control registers */ 700 maxbus = pci_bus_fixup(psc->sc_pc, 0); 701 } 702 703 busdata = cardbus_conf_read(cc, cf, ca->ca_tag, PPB_REG_BUSINFO); 704 if(PPB_BUSINFO_SECONDARY(busdata) == 0) { 705 aprint_error_dev(self, "still not configured, not fixable.\n"); 706 return; 707 } 708 709 #if 0 710 minbus = PPB_BUSINFO_SECONDARY(busdata); 711 maxbus = PPB_BUSINFO_SUBORDINATE(busdata); 712 #endif 713 714 /* now, go and assign addresses for the new devices */ 715 rbus_pci_addr_fixup(csc, cc, parent_sc, 716 psc->sc_pc, 717 ca, 718 minbus, maxbus); 719 720 /* 721 * now configure all connected devices to the IRQ which 722 * was assigned to this slot, as they will all arrive from 723 * that IRQ. 724 */ 725 rbus_intr_fixup(psc->sc_pc, minbus, maxbus, ca->ca_intrline); 726 727 /* 728 * enable direct routing of interrupts. We do this because 729 * we can not manage to get pccb_intr_establish() called until 730 * PCI subsystem is merged with rbus. The major thing that this 731 * routine does is avoid calling the driver's interrupt routine 732 * when the card has been removed. 733 * 734 * The rbus_ppb.c can not cope with card desertions until the merging 735 * anyway. 736 */ 737 pccbb_intr_route(psc); 738 739 /* 740 * Attach the PCI bus than hangs off of it. 741 * 742 * XXX Don't pass-through Memory Read Multiple. Should we? 743 * XXX Consult the spec... 744 */ 745 pba.pba_iot = ca->ca_iot; 746 pba.pba_memt = ca->ca_memt; 747 pba.pba_dmat = ca->ca_dmat; 748 pba.pba_pc = psc->sc_pc; 749 pba.pba_flags = PCI_FLAGS_IO_ENABLED|PCI_FLAGS_MEM_ENABLED; 750 pba.pba_bus = PPB_BUSINFO_SECONDARY(busdata); 751 pba.pba_bridgetag = &csc->sc_tag; 752 /*pba.pba_intrswiz = parent_sc->sc_intrswiz; */ 753 pba.pba_intrtag = psc->sc_pa.pa_intrtag; 754 755 config_found_ia(self, "pcibus", &pba, rppbprint); 756 } 757 758 void 759 ppb_cardbus_setup(struct ppb_softc * sc) 760 { 761 struct ppb_cardbus_softc *csc = (struct ppb_cardbus_softc *) sc; 762 #if 0 763 cardbus_chipset_tag_t cc = psc->sc_cc; 764 cardbus_function_tag_t cf = psc->sc_cf; 765 #endif 766 767 /* shut up compiler */ 768 csc->foo=2; 769 770 printf("ppb_cardbus_setup called\n"); 771 #if 0 772 /* not sure what to do here */ 773 cardbustag_t tag = cardbus_make_tag(cc, cf, csc->ct->ct_bus, 774 csc->ct->ct_dev, csc->ct->ct_func); 775 776 command = Cardbus_conf_read(csc->ct, tag, CARDBUS_COMMAND_STATUS_REG); 777 if (csc->base0_reg) { 778 Cardbus_conf_write(csc->ct, tag, 779 CARDBUS_BASE0_REG, csc->base0_reg); 780 (cf->cardbus_ctrl) (cc, CARDBUS_MEM_ENABLE); 781 command |= CARDBUS_COMMAND_MEM_ENABLE | 782 CARDBUS_COMMAND_MASTER_ENABLE; 783 } else if (csc->base1_reg) { 784 Cardbus_conf_write(csc->ct, tag, 785 CARDBUS_BASE1_REG, csc->base1_reg); 786 (cf->cardbus_ctrl) (cc, CARDBUS_IO_ENABLE); 787 command |= (CARDBUS_COMMAND_IO_ENABLE | 788 CARDBUS_COMMAND_MASTER_ENABLE); 789 } 790 791 (cf->cardbus_ctrl) (cc, CARDBUS_BM_ENABLE); 792 793 /* enable the card */ 794 Cardbus_conf_write(csc->ct, tag, CARDBUS_COMMAND_STATUS_REG, command); 795 #endif 796 } 797 798 int 799 ppb_cardbus_enable(struct ppb_softc * sc) 800 { 801 #if 0 802 struct ppb_cardbus_softc *csc = (struct ppb_cardbus_softc *) sc; 803 struct cardbus_softc *psc = device_private(device_parent(sc->sc_dev)); 804 cardbus_chipset_tag_t cc = psc->sc_cc; 805 cardbus_function_tag_t cf = psc->sc_cf; 806 807 Cardbus_function_enable(csc->ct); 808 809 fxp_cardbus_setup(sc); 810 811 /* Map and establish the interrupt. */ 812 813 sc->sc_ih = cardbus_intr_establish(cc, cf, psc->sc_intrline, IPL_NET, 814 fxp_intr, sc); 815 if (NULL == sc->sc_ih) { 816 aprint_error_dev(sc->sc_dev, "couldn't establish interrupt\n"); 817 return 1; 818 } 819 820 printf("%s: interrupting at %d\n", device_xname(sc->sc_dev), 821 psc->sc_intrline); 822 823 #endif 824 return 0; 825 } 826 827 void 828 ppb_cardbus_disable(struct ppb_softc * sc) 829 { 830 #if 0 831 struct cardbus_softc *psc = device_private(device_parent(sc->sc_dev)); 832 cardbus_chipset_tag_t cc = psc->sc_cc; 833 cardbus_function_tag_t cf = psc->sc_cf; 834 835 /* Remove interrupt handler. */ 836 cardbus_intr_disestablish(cc, cf, sc->sc_ih); 837 838 Cardbus_function_disable(((struct fxp_cardbus_softc *) sc)->ct); 839 #endif 840 } 841 842 static int 843 ppb_cardbus_detach(self, flags) 844 struct device *self; 845 int flags; 846 { 847 /* struct ppb_softc *sc = device_private(self);*/ 848 struct ppb_cardbus_softc *csc = device_private(self); 849 850 #if 0 851 struct cardbus_devfunc *ct = csc->ct; 852 int rv, reg; 853 854 #ifdef DIAGNOSTIC 855 if (ct == NULL) 856 panic("%s: data structure lacks", device_xname(sc->sc_dev)); 857 #endif 858 859 rv = fxp_detach(sc); 860 if (rv == 0) { 861 /* 862 * Unhook the interrupt handler. 863 */ 864 cardbus_intr_disestablish(ct->ct_cc, ct->ct_cf, sc->sc_ih); 865 866 /* 867 * release bus space and close window 868 */ 869 if (csc->base0_reg) 870 reg = CARDBUS_BASE0_REG; 871 else 872 reg = CARDBUS_BASE1_REG; 873 Cardbus_mapreg_unmap(ct, reg, sc->sc_st, sc->sc_sh, csc->size); 874 } 875 return (rv); 876 877 #endif 878 csc->foo=1; 879 return 0; 880 881 } 882 883 int 884 ppb_activate(self, act) 885 struct device *self; 886 enum devact act; 887 { 888 printf("ppb_activate called\n"); 889 return 0; 890 } 891 892
Indexes created Wed Oct 22 13:09:56 GMT 2025