siisata_cardbus.c revision 1.1.2.2 1 1.1.2.2 jym /* $NetBSD: siisata_cardbus.c,v 1.1.2.2 2009/07/23 23:31:46 jym Exp $ */
2 1.1.2.2 jym /* Id: siisata_pci.c,v 1.11 2008/05/21 16:20:11 jakllsch Exp */
3 1.1.2.2 jym
4 1.1.2.2 jym /*
5 1.1.2.2 jym * Copyright (c) 2006 Manuel Bouyer.
6 1.1.2.2 jym *
7 1.1.2.2 jym * Redistribution and use in source and binary forms, with or without
8 1.1.2.2 jym * modification, are permitted provided that the following conditions
9 1.1.2.2 jym * are met:
10 1.1.2.2 jym * 1. Redistributions of source code must retain the above copyright
11 1.1.2.2 jym * notice, this list of conditions and the following disclaimer.
12 1.1.2.2 jym * 2. Redistributions in binary form must reproduce the above copyright
13 1.1.2.2 jym * notice, this list of conditions and the following disclaimer in the
14 1.1.2.2 jym * documentation and/or other materials provided with the distribution.
15 1.1.2.2 jym * 3. All advertising materials mentioning features or use of this software
16 1.1.2.2 jym * must display the following acknowledgement:
17 1.1.2.2 jym * This product includes software developed by Manuel Bouyer.
18 1.1.2.2 jym * 4. The name of the author may not be used to endorse or promote products
19 1.1.2.2 jym * derived from this software without specific prior written permission.
20 1.1.2.2 jym *
21 1.1.2.2 jym * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
22 1.1.2.2 jym * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
23 1.1.2.2 jym * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
24 1.1.2.2 jym * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
25 1.1.2.2 jym * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
26 1.1.2.2 jym * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 1.1.2.2 jym * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 1.1.2.2 jym * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 1.1.2.2 jym * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
30 1.1.2.2 jym * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 1.1.2.2 jym *
32 1.1.2.2 jym */
33 1.1.2.2 jym
34 1.1.2.2 jym /*-
35 1.1.2.2 jym * Copyright (c) 2007, 2008 Jonathan A. Kollasch.
36 1.1.2.2 jym * All rights reserved.
37 1.1.2.2 jym *
38 1.1.2.2 jym * Redistribution and use in source and binary forms, with or without
39 1.1.2.2 jym * modification, are permitted provided that the following conditions
40 1.1.2.2 jym * are met:
41 1.1.2.2 jym * 1. Redistributions of source code must retain the above copyright
42 1.1.2.2 jym * notice, this list of conditions and the following disclaimer.
43 1.1.2.2 jym * 2. Redistributions in binary form must reproduce the above copyright
44 1.1.2.2 jym * notice, this list of conditions and the following disclaimer in the
45 1.1.2.2 jym * documentation and/or other materials provided with the distribution.
46 1.1.2.2 jym *
47 1.1.2.2 jym * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
48 1.1.2.2 jym * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
49 1.1.2.2 jym * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
50 1.1.2.2 jym * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
51 1.1.2.2 jym * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
52 1.1.2.2 jym * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
53 1.1.2.2 jym * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
54 1.1.2.2 jym * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
55 1.1.2.2 jym * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
56 1.1.2.2 jym * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
57 1.1.2.2 jym *
58 1.1.2.2 jym */
59 1.1.2.2 jym
60 1.1.2.2 jym #include <sys/cdefs.h>
61 1.1.2.2 jym
62 1.1.2.2 jym
63 1.1.2.2 jym #include <sys/types.h>
64 1.1.2.2 jym #include <sys/malloc.h>
65 1.1.2.2 jym #include <sys/param.h>
66 1.1.2.2 jym #include <sys/kernel.h>
67 1.1.2.2 jym #include <sys/systm.h>
68 1.1.2.2 jym
69 1.1.2.2 jym #include <uvm/uvm_extern.h>
70 1.1.2.2 jym
71 1.1.2.2 jym #include <dev/cardbus/cardbusvar.h>
72 1.1.2.2 jym #include <dev/pci/pcidevs.h>
73 1.1.2.2 jym #include <dev/ic/siisatavar.h>
74 1.1.2.2 jym
75 1.1.2.2 jym #define cardbus_devinfo pci_devinfo
76 1.1.2.2 jym
77 1.1.2.2 jym struct siisata_cardbus_softc {
78 1.1.2.2 jym struct siisata_softc si_sc;
79 1.1.2.2 jym cardbus_chipset_tag_t sc_cc;
80 1.1.2.2 jym cardbus_function_tag_t sc_cf;
81 1.1.2.2 jym cardbus_devfunc_t sc_ct;
82 1.1.2.2 jym
83 1.1.2.2 jym bus_size_t sc_grsize;
84 1.1.2.2 jym bus_size_t sc_prsize;
85 1.1.2.2 jym void *sc_ih;
86 1.1.2.2 jym };
87 1.1.2.2 jym
88 1.1.2.2 jym static int siisata_cardbus_match(device_t, cfdata_t, void *);
89 1.1.2.2 jym static void siisata_cardbus_attach(device_t, device_t, void *);
90 1.1.2.2 jym static int siisata_cardbus_detach(device_t, int);
91 1.1.2.2 jym static bool siisata_cardbus_resume(device_t PMF_FN_PROTO);
92 1.1.2.2 jym
93 1.1.2.2 jym static const struct siisata_cardbus_product {
94 1.1.2.2 jym cardbus_vendor_id_t scp_vendor;
95 1.1.2.2 jym cardbus_product_id_t scp_product;
96 1.1.2.2 jym int scp_ports;
97 1.1.2.2 jym int scp_chip;
98 1.1.2.2 jym
99 1.1.2.2 jym } siisata_cardbus_products[] = {
100 1.1.2.2 jym {
101 1.1.2.2 jym PCI_VENDOR_CMDTECH, PCI_PRODUCT_CMDTECH_3124,
102 1.1.2.2 jym 4, 3124
103 1.1.2.2 jym },
104 1.1.2.2 jym {
105 1.1.2.2 jym 0, 0,
106 1.1.2.2 jym 0, 0
107 1.1.2.2 jym },
108 1.1.2.2 jym };
109 1.1.2.2 jym
110 1.1.2.2 jym CFATTACH_DECL_NEW(siisata_cardbus, sizeof(struct siisata_cardbus_softc),
111 1.1.2.2 jym siisata_cardbus_match, siisata_cardbus_attach, siisata_cardbus_detach,
112 1.1.2.2 jym NULL);
113 1.1.2.2 jym
114 1.1.2.2 jym static const struct siisata_cardbus_product *
115 1.1.2.2 jym siisata_cardbus_lookup(const struct cardbus_attach_args *ca)
116 1.1.2.2 jym {
117 1.1.2.2 jym const struct siisata_cardbus_product *scp;
118 1.1.2.2 jym
119 1.1.2.2 jym for (scp = siisata_cardbus_products; scp->scp_ports > 0; scp++) {
120 1.1.2.2 jym if (CARDBUS_VENDOR(ca->ca_id) == scp->scp_vendor &&
121 1.1.2.2 jym CARDBUS_PRODUCT(ca->ca_id) == scp->scp_product)
122 1.1.2.2 jym return scp;
123 1.1.2.2 jym }
124 1.1.2.2 jym return NULL;
125 1.1.2.2 jym }
126 1.1.2.2 jym
127 1.1.2.2 jym static int
128 1.1.2.2 jym siisata_cardbus_match(device_t parent, cfdata_t match, void *aux)
129 1.1.2.2 jym {
130 1.1.2.2 jym struct cardbus_attach_args *ca = aux;
131 1.1.2.2 jym
132 1.1.2.2 jym if (siisata_cardbus_lookup(ca) != NULL)
133 1.1.2.2 jym return 3;
134 1.1.2.2 jym
135 1.1.2.2 jym return 0;
136 1.1.2.2 jym }
137 1.1.2.2 jym
138 1.1.2.2 jym static void
139 1.1.2.2 jym siisata_cardbus_attach(device_t parent, device_t self, void *aux)
140 1.1.2.2 jym {
141 1.1.2.2 jym struct cardbus_attach_args *ca = aux;
142 1.1.2.2 jym struct cardbus_softc *cbsc = device_private(parent);
143 1.1.2.2 jym struct siisata_cardbus_softc *csc = device_private(self);
144 1.1.2.2 jym struct siisata_softc *sc = &csc->si_sc;
145 1.1.2.2 jym cardbus_devfunc_t ct = ca->ca_ct;
146 1.1.2.2 jym cardbus_chipset_tag_t cc = ct->ct_cc;
147 1.1.2.2 jym cardbus_function_tag_t cf = ct->ct_cf;
148 1.1.2.2 jym cardbusreg_t csr;
149 1.1.2.2 jym const struct siisata_cardbus_product *scp;
150 1.1.2.2 jym bus_space_tag_t memt;
151 1.1.2.2 jym bus_space_handle_t memh;
152 1.1.2.2 jym bus_addr_t base;
153 1.1.2.2 jym bus_size_t grsize, prsize;
154 1.1.2.2 jym uint32_t gcreg;
155 1.1.2.2 jym char devinfo[256];
156 1.1.2.2 jym
157 1.1.2.2 jym sc->sc_atac.atac_dev = self;
158 1.1.2.2 jym
159 1.1.2.2 jym csc->sc_cc = cc;
160 1.1.2.2 jym csc->sc_cf = cf;
161 1.1.2.2 jym csc->sc_ct = ct;
162 1.1.2.2 jym
163 1.1.2.2 jym cardbus_devinfo(ca->ca_id, ca->ca_class, 0, devinfo, sizeof(devinfo));
164 1.1.2.2 jym aprint_naive(": SATA-II HBA\n");
165 1.1.2.2 jym aprint_normal(": %s\n", devinfo);
166 1.1.2.2 jym
167 1.1.2.2 jym /*
168 1.1.2.2 jym * XXXX
169 1.1.2.2 jym * Our BAR0/BAR1 type is 64bit Memory. Cardbus_mapreg_map() don't
170 1.1.2.2 jym * support 64bit Memory. We map ourself...
171 1.1.2.2 jym */
172 1.1.2.2 jym /* map bar0 */
173 1.1.2.2 jym {
174 1.1.2.2 jym #define SIISATA_BAR0_SIZE 128
175 1.1.2.2 jym grsize = SIISATA_BAR0_SIZE;
176 1.1.2.2 jym csr =
177 1.1.2.2 jym cardbus_conf_read(cc, cf, ca->ca_tag, SIISATA_CARDBUS_BAR0);
178 1.1.2.2 jym base = PCI_MAPREG_MEM_ADDR(csr);
179 1.1.2.2 jym memt = cbsc->sc_memt;
180 1.1.2.2 jym if ((*cf->cardbus_space_alloc)(cc, cbsc->sc_rbus_memt, base,
181 1.1.2.2 jym grsize, grsize - 1, grsize, 0, &base, &memh)) {
182 1.1.2.2 jym aprint_error(
183 1.1.2.2 jym "%s: unable to map device global registers\n",
184 1.1.2.2 jym SIISATANAME(sc));
185 1.1.2.2 jym return;
186 1.1.2.2 jym }
187 1.1.2.2 jym cardbus_conf_write(cc, cf, ca->ca_tag, SIISATA_CARDBUS_BAR0,
188 1.1.2.2 jym base);
189 1.1.2.2 jym }
190 1.1.2.2 jym sc->sc_grt = memt;
191 1.1.2.2 jym sc->sc_grh = memh;
192 1.1.2.2 jym csc->sc_grsize = grsize;
193 1.1.2.2 jym
194 1.1.2.2 jym /* map bar1 */
195 1.1.2.2 jym {
196 1.1.2.2 jym #define SIISATA_BAR1_SIZE (32 * 1024)
197 1.1.2.2 jym prsize = SIISATA_BAR1_SIZE;
198 1.1.2.2 jym base = PCI_MAPREG_MEM_ADDR(cardbus_conf_read(cc, cf, ca->ca_tag,
199 1.1.2.2 jym SIISATA_CARDBUS_BAR1));
200 1.1.2.2 jym memt = cbsc->sc_memt;
201 1.1.2.2 jym if ((*cf->cardbus_space_alloc)(cc, cbsc->sc_rbus_memt, base,
202 1.1.2.2 jym prsize, prsize - 1, prsize, 0, &base, &memh)) {
203 1.1.2.2 jym cardbus_conf_write(cc, cf, ca->ca_tag,
204 1.1.2.2 jym SIISATA_CARDBUS_BAR0, 0);
205 1.1.2.2 jym (*cf->cardbus_space_free)(cc, cbsc->sc_rbus_memt,
206 1.1.2.2 jym sc->sc_grh, grsize);
207 1.1.2.2 jym aprint_error(
208 1.1.2.2 jym "%s: unable to map device port registers\n",
209 1.1.2.2 jym SIISATANAME(sc));
210 1.1.2.2 jym return;
211 1.1.2.2 jym }
212 1.1.2.2 jym cardbus_conf_write(cc, cf, ca->ca_tag, SIISATA_CARDBUS_BAR1,
213 1.1.2.2 jym base);
214 1.1.2.2 jym }
215 1.1.2.2 jym sc->sc_prt = memt;
216 1.1.2.2 jym sc->sc_prh = memh;
217 1.1.2.2 jym csc->sc_prsize = prsize;
218 1.1.2.2 jym
219 1.1.2.2 jym sc->sc_dmat = ca->ca_dmat;
220 1.1.2.2 jym
221 1.1.2.2 jym /* map interrupt */
222 1.1.2.2 jym csc->sc_ih = cardbus_intr_establish(cc, cf, ca->ca_intrline, IPL_BIO,
223 1.1.2.2 jym siisata_intr, sc);
224 1.1.2.2 jym if (csc->sc_ih == NULL) {
225 1.1.2.2 jym cardbus_conf_write(cc, cf, ca->ca_tag, SIISATA_CARDBUS_BAR0, 0);
226 1.1.2.2 jym (*cf->cardbus_space_free)(cc, cbsc->sc_rbus_memt, sc->sc_grh,
227 1.1.2.2 jym grsize);
228 1.1.2.2 jym cardbus_conf_write(cc, cf, ca->ca_tag, SIISATA_CARDBUS_BAR1, 0);
229 1.1.2.2 jym (*cf->cardbus_space_free)(cc, cbsc->sc_rbus_memt, sc->sc_prh,
230 1.1.2.2 jym prsize);
231 1.1.2.2 jym aprint_error("%s: couldn't establish interrupt\n",
232 1.1.2.2 jym SIISATANAME(sc));
233 1.1.2.2 jym return;
234 1.1.2.2 jym }
235 1.1.2.2 jym
236 1.1.2.2 jym /* fill in number of ports on this device */
237 1.1.2.2 jym scp = siisata_cardbus_lookup(ca);
238 1.1.2.2 jym if (scp != NULL)
239 1.1.2.2 jym sc->sc_atac.atac_nchannels = scp->scp_ports;
240 1.1.2.2 jym else
241 1.1.2.2 jym /* _match() should prevent us from getting here */
242 1.1.2.2 jym panic("siisata: the universe might be falling apart!\n");
243 1.1.2.2 jym
244 1.1.2.2 jym /* enable bus mastering in case the firmware didn't */
245 1.1.2.2 jym csr = cardbus_conf_read(cc, cf, ca->ca_tag, CARDBUS_COMMAND_STATUS_REG);
246 1.1.2.2 jym csr |= CARDBUS_COMMAND_MASTER_ENABLE;
247 1.1.2.2 jym csr |= CARDBUS_COMMAND_MEM_ENABLE;
248 1.1.2.2 jym cardbus_conf_write(cc, cf, ca->ca_tag, CARDBUS_COMMAND_STATUS_REG, csr);
249 1.1.2.2 jym
250 1.1.2.2 jym gcreg = GRREAD(sc, GR_GC);
251 1.1.2.2 jym
252 1.1.2.2 jym /* CardBus supports only 32-bit 33MHz */
253 1.1.2.2 jym KASSERT(!(gcreg &
254 1.1.2.2 jym (GR_GC_REQ64|GR_GC_DEVSEL|GR_GC_STOP|GR_GC_TRDY|GR_GC_M66EN)));
255 1.1.2.2 jym
256 1.1.2.2 jym aprint_normal("%s: SiI%d on 32-bit, 33MHz PCI (CardBus).",
257 1.1.2.2 jym SIISATANAME(sc), scp->scp_chip);
258 1.1.2.2 jym if (gcreg & GR_GC_3GBPS)
259 1.1.2.2 jym aprint_normal(" 3.0Gb/s capable.\n");
260 1.1.2.2 jym else
261 1.1.2.2 jym aprint_normal("\n");
262 1.1.2.2 jym
263 1.1.2.2 jym siisata_attach(sc);
264 1.1.2.2 jym
265 1.1.2.2 jym if (!pmf_device_register(self, NULL, siisata_cardbus_resume))
266 1.1.2.2 jym aprint_error_dev(self, "couldn't establish power handler\n");
267 1.1.2.2 jym }
268 1.1.2.2 jym
269 1.1.2.2 jym static int
270 1.1.2.2 jym siisata_cardbus_detach(device_t self, int flags)
271 1.1.2.2 jym {
272 1.1.2.2 jym struct cardbus_softc *cbsc = device_private(device_parent(self));
273 1.1.2.2 jym struct siisata_cardbus_softc *csc = device_private(self);
274 1.1.2.2 jym struct siisata_softc *sc = &csc->si_sc;
275 1.1.2.2 jym struct cardbus_devfunc *ct = csc->sc_ct;
276 1.1.2.2 jym cardbus_chipset_tag_t cc = ct->ct_cc;
277 1.1.2.2 jym cardbus_function_tag_t cf = ct->ct_cf;
278 1.1.2.2 jym cardbustag_t ctag = cardbus_make_tag(cc, cf, cbsc->sc_bus, ct->ct_func);
279 1.1.2.2 jym int rv;
280 1.1.2.2 jym
281 1.1.2.2 jym rv = siisata_detach(sc, flags);
282 1.1.2.2 jym if (rv)
283 1.1.2.2 jym return (rv);
284 1.1.2.2 jym if (csc->sc_ih != NULL) {
285 1.1.2.2 jym cardbus_intr_disestablish(csc->sc_cc, csc->sc_cf, csc->sc_ih);
286 1.1.2.2 jym csc->sc_ih = NULL;
287 1.1.2.2 jym }
288 1.1.2.2 jym if (csc->sc_grsize) {
289 1.1.2.2 jym cardbus_conf_write(cc, cf, ctag, SIISATA_CARDBUS_BAR0, 0);
290 1.1.2.2 jym (*cf->cardbus_space_free)(cc, cbsc->sc_rbus_memt, sc->sc_grh,
291 1.1.2.2 jym csc->sc_grsize);
292 1.1.2.2 jym csc->sc_grsize = 0;
293 1.1.2.2 jym }
294 1.1.2.2 jym if (csc->sc_prsize) {
295 1.1.2.2 jym cardbus_conf_write(cc, cf, ctag, SIISATA_CARDBUS_BAR1, 0);
296 1.1.2.2 jym (*cf->cardbus_space_free)(cc, cbsc->sc_rbus_memt, sc->sc_prh,
297 1.1.2.2 jym csc->sc_prsize);
298 1.1.2.2 jym csc->sc_prsize = 0;
299 1.1.2.2 jym }
300 1.1.2.2 jym cardbus_free_tag(cc, cf, ctag);
301 1.1.2.2 jym return 0;
302 1.1.2.2 jym }
303 1.1.2.2 jym
304 1.1.2.2 jym static bool
305 1.1.2.2 jym siisata_cardbus_resume(device_t dv PMF_FN_ARGS)
306 1.1.2.2 jym {
307 1.1.2.2 jym struct siisata_cardbus_softc *csc = device_private(dv);
308 1.1.2.2 jym struct siisata_softc *sc = &csc->si_sc;
309 1.1.2.2 jym int s;
310 1.1.2.2 jym
311 1.1.2.2 jym s = splbio();
312 1.1.2.2 jym siisata_resume(sc);
313 1.1.2.2 jym splx(s);
314 1.1.2.2 jym
315 1.1.2.2 jym return true;
316 1.1.2.2 jym }
317