siisata_cardbus.c revision 1.10
1 /* $NetBSD: siisata_cardbus.c,v 1.10 2010/02/26 00:57:02 dyoung Exp $ */ 2 /* Id: siisata_pci.c,v 1.11 2008/05/21 16:20:11 jakllsch Exp */ 3 4 /* 5 * Copyright (c) 2006 Manuel Bouyer. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 21 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 25 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 * 27 */ 28 29 /* 30 * Copyright (c) 2007, 2008 Jonathan A. Kollasch. 31 * All rights reserved. 32 * 33 * Redistribution and use in source and binary forms, with or without 34 * modification, are permitted provided that the following conditions 35 * are met: 36 * 1. Redistributions of source code must retain the above copyright 37 * notice, this list of conditions and the following disclaimer. 38 * 2. Redistributions in binary form must reproduce the above copyright 39 * notice, this list of conditions and the following disclaimer in the 40 * documentation and/or other materials provided with the distribution. 41 * 42 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 43 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 44 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 45 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 46 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 47 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 48 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 49 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 50 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 51 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 52 */ 53 54 #include <sys/cdefs.h> 55 __KERNEL_RCSID(0, "$NetBSD: siisata_cardbus.c,v 1.10 2010/02/26 00:57:02 dyoung Exp $"); 56 57 #include <sys/types.h> 58 #include <sys/malloc.h> 59 #include <sys/param.h> 60 #include <sys/kernel.h> 61 #include <sys/systm.h> 62 63 #include <uvm/uvm_extern.h> 64 65 #include <dev/cardbus/cardbusvar.h> 66 #include <dev/pci/pcidevs.h> 67 #include <dev/ic/siisatavar.h> 68 69 struct siisata_cardbus_softc { 70 struct siisata_softc si_sc; 71 cardbus_chipset_tag_t sc_cc; 72 cardbus_function_tag_t sc_cf; 73 cardbus_devfunc_t sc_ct; 74 pcitag_t sc_tag; 75 bus_space_tag_t sc_iot; /* CardBus I/O space tag */ 76 bus_space_tag_t sc_memt; /* CardBus MEM space tag */ 77 #if rbus 78 rbus_tag_t sc_rbus_iot; /* CardBus i/o rbus tag */ 79 rbus_tag_t sc_rbus_memt; /* CardBus mem rbus tag */ 80 #endif 81 82 bus_size_t sc_grsize; 83 bus_size_t sc_prsize; 84 void *sc_ih; 85 }; 86 87 static int siisata_cardbus_match(device_t, cfdata_t, void *); 88 static void siisata_cardbus_attach(device_t, device_t, void *); 89 static int siisata_cardbus_detach(device_t, int); 90 static bool siisata_cardbus_resume(device_t, const pmf_qual_t *); 91 92 static const struct siisata_cardbus_product { 93 pci_vendor_id_t scp_vendor; 94 pci_product_id_t scp_product; 95 int scp_ports; 96 int scp_chip; 97 98 } siisata_cardbus_products[] = { 99 { 100 PCI_VENDOR_CMDTECH, PCI_PRODUCT_CMDTECH_3124, 101 4, 3124 102 }, 103 { 104 0, 0, 105 0, 0 106 }, 107 }; 108 109 CFATTACH_DECL_NEW(siisata_cardbus, sizeof(struct siisata_cardbus_softc), 110 siisata_cardbus_match, siisata_cardbus_attach, siisata_cardbus_detach, 111 NULL); 112 113 static const struct siisata_cardbus_product * 114 siisata_cardbus_lookup(const struct cardbus_attach_args *ca) 115 { 116 const struct siisata_cardbus_product *scp; 117 118 for (scp = siisata_cardbus_products; scp->scp_ports > 0; scp++) { 119 if (PCI_VENDOR(ca->ca_id) == scp->scp_vendor && 120 PCI_PRODUCT(ca->ca_id) == scp->scp_product) 121 return scp; 122 } 123 return NULL; 124 } 125 126 static int 127 siisata_cardbus_match(device_t parent, cfdata_t match, void *aux) 128 { 129 struct cardbus_attach_args *ca = aux; 130 131 if (siisata_cardbus_lookup(ca) != NULL) 132 return 3; 133 134 return 0; 135 } 136 137 static void 138 siisata_cardbus_attach(device_t parent, device_t self, void *aux) 139 { 140 struct cardbus_attach_args *ca = aux; 141 struct siisata_cardbus_softc *csc = device_private(self); 142 struct siisata_softc *sc = &csc->si_sc; 143 cardbus_devfunc_t ct = ca->ca_ct; 144 cardbus_chipset_tag_t cc = ct->ct_cc; 145 cardbus_function_tag_t cf = ct->ct_cf; 146 pcireg_t csr; 147 const struct siisata_cardbus_product *scp; 148 bus_space_tag_t memt; 149 bus_space_handle_t memh; 150 bus_addr_t base; 151 bus_size_t grsize, prsize; 152 uint32_t gcreg; 153 char devinfo[256]; 154 155 sc->sc_atac.atac_dev = self; 156 157 csc->sc_cc = cc; 158 csc->sc_cf = cf; 159 csc->sc_ct = ct; 160 csc->sc_tag = ca->ca_tag; 161 162 csc->sc_iot = ca->ca_iot; 163 csc->sc_memt = ca->ca_memt; 164 #if rbus 165 csc->sc_rbus_iot = ca->ca_rbus_iot; 166 csc->sc_rbus_memt = ca->ca_rbus_memt; 167 #endif 168 169 pci_devinfo(ca->ca_id, ca->ca_class, 0, devinfo, sizeof(devinfo)); 170 aprint_naive(": SATA-II HBA\n"); 171 aprint_normal(": %s\n", devinfo); 172 173 /* 174 * XXXX 175 * Our BAR0/BAR1 type is 64bit Memory. Cardbus_mapreg_map() don't 176 * support 64bit Memory. We map ourself... 177 */ 178 /* map bar0 */ 179 { 180 #define SIISATA_BAR0_SIZE 128 181 grsize = SIISATA_BAR0_SIZE; 182 csr = 183 Cardbus_conf_read(ct, ca->ca_tag, SIISATA_CARDBUS_BAR0); 184 base = PCI_MAPREG_MEM_ADDR(csr); 185 memt = csc->sc_memt; 186 if ((*cf->cardbus_space_alloc)(cc, csc->sc_rbus_memt, base, 187 grsize, grsize - 1, grsize, 0, &base, &memh)) { 188 aprint_error( 189 "%s: unable to map device global registers\n", 190 SIISATANAME(sc)); 191 return; 192 } 193 Cardbus_conf_write(ct, ca->ca_tag, SIISATA_CARDBUS_BAR0, 194 base); 195 } 196 sc->sc_grt = memt; 197 sc->sc_grh = memh; 198 csc->sc_grsize = grsize; 199 200 /* map bar1 */ 201 { 202 #define SIISATA_BAR1_SIZE (32 * 1024) 203 prsize = SIISATA_BAR1_SIZE; 204 base = PCI_MAPREG_MEM_ADDR(Cardbus_conf_read(ct, ca->ca_tag, 205 SIISATA_CARDBUS_BAR1)); 206 memt = csc->sc_memt; 207 if ((*cf->cardbus_space_alloc)(cc, csc->sc_rbus_memt, base, 208 prsize, prsize - 1, prsize, 0, &base, &memh)) { 209 Cardbus_conf_write(ct, ca->ca_tag, 210 SIISATA_CARDBUS_BAR0, 0); 211 (*cf->cardbus_space_free)(cc, csc->sc_rbus_memt, 212 sc->sc_grh, grsize); 213 aprint_error( 214 "%s: unable to map device port registers\n", 215 SIISATANAME(sc)); 216 return; 217 } 218 Cardbus_conf_write(ct, ca->ca_tag, SIISATA_CARDBUS_BAR1, 219 base); 220 } 221 sc->sc_prt = memt; 222 sc->sc_prh = memh; 223 csc->sc_prsize = prsize; 224 225 sc->sc_dmat = ca->ca_dmat; 226 227 /* map interrupt */ 228 csc->sc_ih = cardbus_intr_establish(cc, cf, ca->ca_intrline, IPL_BIO, 229 siisata_intr, sc); 230 if (csc->sc_ih == NULL) { 231 Cardbus_conf_write(ct, ca->ca_tag, SIISATA_CARDBUS_BAR0, 0); 232 (*cf->cardbus_space_free)(cc, csc->sc_rbus_memt, sc->sc_grh, 233 grsize); 234 Cardbus_conf_write(ct, ca->ca_tag, SIISATA_CARDBUS_BAR1, 0); 235 (*cf->cardbus_space_free)(cc, csc->sc_rbus_memt, sc->sc_prh, 236 prsize); 237 aprint_error("%s: couldn't establish interrupt\n", 238 SIISATANAME(sc)); 239 return; 240 } 241 242 /* fill in number of ports on this device */ 243 scp = siisata_cardbus_lookup(ca); 244 if (scp != NULL) 245 sc->sc_atac.atac_nchannels = scp->scp_ports; 246 else 247 /* _match() should prevent us from getting here */ 248 panic("siisata: the universe might be falling apart!\n"); 249 250 /* enable bus mastering in case the firmware didn't */ 251 csr = Cardbus_conf_read(ct, ca->ca_tag, PCI_COMMAND_STATUS_REG); 252 csr |= PCI_COMMAND_MASTER_ENABLE; 253 csr |= PCI_COMMAND_MEM_ENABLE; 254 Cardbus_conf_write(ct, ca->ca_tag, PCI_COMMAND_STATUS_REG, csr); 255 256 gcreg = GRREAD(sc, GR_GC); 257 258 /* CardBus supports only 32-bit 33MHz */ 259 KASSERT(!(gcreg & 260 (GR_GC_REQ64|GR_GC_DEVSEL|GR_GC_STOP|GR_GC_TRDY|GR_GC_M66EN))); 261 262 aprint_normal("%s: SiI%d on 32-bit, 33MHz PCI (CardBus).", 263 SIISATANAME(sc), scp->scp_chip); 264 if (gcreg & GR_GC_3GBPS) 265 aprint_normal(" 3.0Gb/s capable.\n"); 266 else 267 aprint_normal("\n"); 268 269 siisata_attach(sc); 270 271 if (!pmf_device_register(self, NULL, siisata_cardbus_resume)) 272 aprint_error_dev(self, "couldn't establish power handler\n"); 273 } 274 275 static int 276 siisata_cardbus_detach(device_t self, int flags) 277 { 278 struct siisata_cardbus_softc *csc = device_private(self); 279 struct siisata_softc *sc = &csc->si_sc; 280 struct cardbus_devfunc *ct = csc->sc_ct; 281 cardbus_chipset_tag_t cc = ct->ct_cc; 282 cardbus_function_tag_t cf = ct->ct_cf; 283 pcitag_t ctag = csc->sc_tag; 284 int rv; 285 286 rv = siisata_detach(sc, flags); 287 if (rv) 288 return (rv); 289 if (csc->sc_ih != NULL) { 290 cardbus_intr_disestablish(csc->sc_cc, csc->sc_cf, csc->sc_ih); 291 csc->sc_ih = NULL; 292 } 293 if (csc->sc_grsize) { 294 Cardbus_conf_write(ct, ctag, SIISATA_CARDBUS_BAR0, 0); 295 (*cf->cardbus_space_free)(cc, csc->sc_rbus_memt, sc->sc_grh, 296 csc->sc_grsize); 297 csc->sc_grsize = 0; 298 } 299 if (csc->sc_prsize) { 300 Cardbus_conf_write(ct, ctag, SIISATA_CARDBUS_BAR1, 0); 301 (*cf->cardbus_space_free)(cc, csc->sc_rbus_memt, sc->sc_prh, 302 csc->sc_prsize); 303 csc->sc_prsize = 0; 304 } 305 return 0; 306 } 307 308 static bool 309 siisata_cardbus_resume(device_t dv, const pmf_qual_t *qual) 310 { 311 struct siisata_cardbus_softc *csc = device_private(dv); 312 struct siisata_softc *sc = &csc->si_sc; 313 int s; 314 315 s = splbio(); 316 siisata_resume(sc); 317 splx(s); 318 319 return true; 320 } 321
Indexes created Thu Oct 02 01:09:59 GMT 2025