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dz.c revision 1.12
      1  1.12        ad /*	$NetBSD: dz.c,v 1.12 2003/12/09 14:30:55 ad Exp $	*/
      2   1.1        ad /*
      3   1.1        ad  * Copyright (c) 1992, 1993
      4   1.1        ad  *	The Regents of the University of California.  All rights reserved.
      5   1.1        ad  *
      6   1.1        ad  * This code is derived from software contributed to Berkeley by
      7   1.1        ad  * Ralph Campbell and Rick Macklem.
      8   1.1        ad  *
      9   1.1        ad  * Redistribution and use in source and binary forms, with or without
     10   1.1        ad  * modification, are permitted provided that the following conditions
     11   1.1        ad  * are met:
     12   1.1        ad  * 1. Redistributions of source code must retain the above copyright
     13   1.1        ad  *    notice, this list of conditions and the following disclaimer.
     14   1.1        ad  * 2. Redistributions in binary form must reproduce the above copyright
     15   1.1        ad  *    notice, this list of conditions and the following disclaimer in the
     16   1.1        ad  *    documentation and/or other materials provided with the distribution.
     17  1.10       agc  * 3. Neither the name of the University nor the names of its contributors
     18  1.10       agc  *    may be used to endorse or promote products derived from this software
     19  1.10       agc  *    without specific prior written permission.
     20  1.10       agc  *
     21  1.10       agc  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     22  1.10       agc  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     23  1.10       agc  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     24  1.10       agc  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     25  1.10       agc  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     26  1.10       agc  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     27  1.10       agc  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     28  1.10       agc  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     29  1.10       agc  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     30  1.10       agc  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     31  1.10       agc  * SUCH DAMAGE.
     32  1.10       agc  */
     33  1.10       agc 
     34  1.10       agc /*
     35  1.10       agc  * Copyright (c) 1996  Ken C. Wellsch.  All rights reserved.
     36  1.10       agc  *
     37  1.10       agc  * This code is derived from software contributed to Berkeley by
     38  1.10       agc  * Ralph Campbell and Rick Macklem.
     39  1.10       agc  *
     40  1.10       agc  * Redistribution and use in source and binary forms, with or without
     41  1.10       agc  * modification, are permitted provided that the following conditions
     42  1.10       agc  * are met:
     43  1.10       agc  * 1. Redistributions of source code must retain the above copyright
     44  1.10       agc  *    notice, this list of conditions and the following disclaimer.
     45  1.10       agc  * 2. Redistributions in binary form must reproduce the above copyright
     46  1.10       agc  *    notice, this list of conditions and the following disclaimer in the
     47  1.10       agc  *    documentation and/or other materials provided with the distribution.
     48   1.1        ad  * 3. All advertising materials mentioning features or use of this software
     49   1.1        ad  *    must display the following acknowledgement:
     50   1.1        ad  *	This product includes software developed by the University of
     51   1.1        ad  *	California, Berkeley and its contributors.
     52   1.1        ad  * 4. Neither the name of the University nor the names of its contributors
     53   1.1        ad  *    may be used to endorse or promote products derived from this software
     54   1.1        ad  *    without specific prior written permission.
     55   1.1        ad  *
     56   1.1        ad  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     57   1.1        ad  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     58   1.1        ad  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     59   1.1        ad  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     60   1.1        ad  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     61   1.1        ad  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     62   1.1        ad  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     63   1.1        ad  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     64   1.1        ad  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     65   1.1        ad  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     66   1.1        ad  * SUCH DAMAGE.
     67   1.1        ad  */
     68   1.1        ad 
     69   1.1        ad #include <sys/cdefs.h>
     70  1.12        ad __KERNEL_RCSID(0, "$NetBSD: dz.c,v 1.12 2003/12/09 14:30:55 ad Exp $");
     71   1.1        ad 
     72   1.1        ad #include <sys/param.h>
     73   1.1        ad #include <sys/systm.h>
     74   1.1        ad #include <sys/callout.h>
     75   1.1        ad #include <sys/ioctl.h>
     76   1.1        ad #include <sys/tty.h>
     77   1.1        ad #include <sys/proc.h>
     78   1.1        ad #include <sys/buf.h>
     79   1.1        ad #include <sys/conf.h>
     80   1.1        ad #include <sys/file.h>
     81   1.1        ad #include <sys/uio.h>
     82   1.1        ad #include <sys/kernel.h>
     83   1.1        ad #include <sys/syslog.h>
     84   1.1        ad #include <sys/device.h>
     85   1.1        ad 
     86   1.1        ad #include <machine/bus.h>
     87   1.1        ad 
     88   1.1        ad #include <dev/dec/dzreg.h>
     89   1.1        ad #include <dev/dec/dzvar.h>
     90   1.1        ad 
     91  1.11     ragge #include <dev/cons.h>
     92  1.11     ragge 
     93   1.1        ad #define	DZ_READ_BYTE(adr) \
     94   1.1        ad 	bus_space_read_1(sc->sc_iot, sc->sc_ioh, sc->sc_dr.adr)
     95   1.1        ad #define	DZ_READ_WORD(adr) \
     96   1.1        ad 	bus_space_read_2(sc->sc_iot, sc->sc_ioh, sc->sc_dr.adr)
     97   1.1        ad #define	DZ_WRITE_BYTE(adr, val) \
     98   1.1        ad 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, sc->sc_dr.adr, val)
     99   1.1        ad #define	DZ_WRITE_WORD(adr, val) \
    100   1.1        ad 	bus_space_write_2(sc->sc_iot, sc->sc_ioh, sc->sc_dr.adr, val)
    101   1.1        ad 
    102   1.1        ad #include "ioconf.h"
    103   1.1        ad 
    104   1.1        ad /* Flags used to monitor modem bits, make them understood outside driver */
    105   1.1        ad 
    106   1.1        ad #define DML_DTR		TIOCM_DTR
    107   1.1        ad #define DML_DCD		TIOCM_CD
    108   1.1        ad #define DML_RI		TIOCM_RI
    109   1.1        ad #define DML_BRK		0100000		/* no equivalent, we will mask */
    110   1.1        ad 
    111   1.1        ad static struct speedtab dzspeedtab[] =
    112   1.1        ad {
    113   1.1        ad   {       0,	0		},
    114   1.1        ad   {      50,	DZ_LPR_B50	},
    115   1.1        ad   {      75,	DZ_LPR_B75	},
    116   1.1        ad   {     110,	DZ_LPR_B110	},
    117   1.1        ad   {     134,	DZ_LPR_B134	},
    118   1.1        ad   {     150,	DZ_LPR_B150	},
    119   1.1        ad   {     300,	DZ_LPR_B300	},
    120   1.1        ad   {     600,	DZ_LPR_B600	},
    121   1.1        ad   {    1200,	DZ_LPR_B1200	},
    122   1.1        ad   {    1800,	DZ_LPR_B1800	},
    123   1.1        ad   {    2000,	DZ_LPR_B2000	},
    124   1.1        ad   {    2400,	DZ_LPR_B2400	},
    125   1.1        ad   {    3600,	DZ_LPR_B3600	},
    126   1.1        ad   {    4800,	DZ_LPR_B4800	},
    127   1.1        ad   {    7200,	DZ_LPR_B7200	},
    128   1.1        ad   {    9600,	DZ_LPR_B9600	},
    129   1.1        ad   {   19200,	DZ_LPR_B19200	},
    130   1.1        ad   {      -1,	-1		}
    131   1.1        ad };
    132   1.1        ad 
    133   1.1        ad static void	dzstart(struct tty *);
    134   1.1        ad static int	dzparam(struct tty *, struct termios *);
    135   1.1        ad static unsigned	dzmctl(struct dz_softc *, int, int, int);
    136   1.1        ad static void	dzscan(void *);
    137   1.3   gehenna 
    138   1.3   gehenna dev_type_open(dzopen);
    139   1.3   gehenna dev_type_close(dzclose);
    140   1.3   gehenna dev_type_read(dzread);
    141   1.3   gehenna dev_type_write(dzwrite);
    142   1.3   gehenna dev_type_ioctl(dzioctl);
    143   1.3   gehenna dev_type_stop(dzstop);
    144   1.3   gehenna dev_type_tty(dztty);
    145   1.3   gehenna dev_type_poll(dzpoll);
    146   1.3   gehenna 
    147   1.3   gehenna const struct cdevsw dz_cdevsw = {
    148   1.3   gehenna 	dzopen, dzclose, dzread, dzwrite, dzioctl,
    149   1.9  jdolecek 	dzstop, dztty, dzpoll, nommap, ttykqfilter, D_TTY
    150   1.3   gehenna };
    151   1.1        ad 
    152   1.1        ad /*
    153   1.1        ad  * The DZ series doesn't interrupt on carrier transitions,
    154   1.1        ad  * so we have to use a timer to watch it.
    155   1.1        ad  */
    156   1.1        ad int	dz_timer;	/* true if timer started */
    157   1.1        ad struct callout dzscan_ch;
    158  1.11     ragge static struct cnm_state dz_cnm_state;
    159   1.1        ad 
    160   1.1        ad void
    161   1.7        ad dzattach(struct dz_softc *sc, struct evcnt *parent_evcnt, int consline)
    162   1.1        ad {
    163   1.1        ad 	int n;
    164   1.1        ad 
    165   1.1        ad 	sc->sc_rxint = sc->sc_brk = 0;
    166   1.7        ad 	sc->sc_consline = consline;
    167   1.1        ad 
    168   1.1        ad 	sc->sc_dr.dr_tcrw = sc->sc_dr.dr_tcr;
    169   1.1        ad 	DZ_WRITE_WORD(dr_csr, DZ_CSR_MSE | DZ_CSR_RXIE | DZ_CSR_TXIE);
    170   1.1        ad 	DZ_WRITE_BYTE(dr_dtr, 0);
    171   1.1        ad 	DZ_WRITE_BYTE(dr_break, 0);
    172   1.1        ad 
    173   1.1        ad 	/* Initialize our softc structure. Should be done in open? */
    174   1.1        ad 
    175   1.4        ad 	for (n = 0; n < sc->sc_type; n++) {
    176   1.6        ad 		sc->sc_dz[n].dz_sc = sc;
    177   1.4        ad 		sc->sc_dz[n].dz_line = n;
    178   1.1        ad 		sc->sc_dz[n].dz_tty = ttymalloc();
    179   1.4        ad 	}
    180   1.1        ad 
    181   1.1        ad 	evcnt_attach_dynamic(&sc->sc_rintrcnt, EVCNT_TYPE_INTR, parent_evcnt,
    182   1.1        ad 		sc->sc_dev.dv_xname, "rintr");
    183   1.1        ad 	evcnt_attach_dynamic(&sc->sc_tintrcnt, EVCNT_TYPE_INTR, parent_evcnt,
    184   1.1        ad 		sc->sc_dev.dv_xname, "tintr");
    185   1.1        ad 
    186  1.11     ragge 	/* Console magic keys */
    187  1.11     ragge 	cn_init_magic(&dz_cnm_state);
    188  1.11     ragge 	cn_set_magic("\047\001"); /* default magic is BREAK */
    189  1.11     ragge 				  /* VAX will change it in MD code */
    190  1.11     ragge 
    191   1.1        ad 	/* Alas no interrupt on modem bit changes, so we manually scan */
    192   1.1        ad 
    193   1.1        ad 	if (dz_timer == 0) {
    194   1.1        ad 		dz_timer = 1;
    195   1.1        ad 		callout_init(&dzscan_ch);
    196   1.1        ad 		callout_reset(&dzscan_ch, hz, dzscan, NULL);
    197   1.1        ad 	}
    198   1.1        ad 	printf("\n");
    199   1.1        ad }
    200   1.1        ad 
    201   1.1        ad /* Receiver Interrupt */
    202   1.1        ad 
    203   1.1        ad void
    204   1.1        ad dzrint(void *arg)
    205   1.1        ad {
    206   1.1        ad 	struct dz_softc *sc = arg;
    207   1.1        ad 	struct tty *tp;
    208  1.12        ad 	int cc, mcc, line;
    209   1.1        ad 	unsigned c;
    210   1.1        ad 	int overrun = 0;
    211   1.1        ad 
    212   1.1        ad 	sc->sc_rxint++;
    213   1.1        ad 
    214   1.1        ad 	while ((c = DZ_READ_WORD(dr_rbuf)) & DZ_RBUF_DATA_VALID) {
    215   1.1        ad 		cc = c & 0xFF;
    216   1.1        ad 		line = DZ_PORT(c>>8);
    217   1.1        ad 		tp = sc->sc_dz[line].dz_tty;
    218   1.1        ad 
    219   1.1        ad 		/* Must be caught early */
    220   1.1        ad 		if (sc->sc_dz[line].dz_catch &&
    221   1.1        ad 		    (*sc->sc_dz[line].dz_catch)(sc->sc_dz[line].dz_private, cc))
    222   1.1        ad 			continue;
    223  1.11     ragge 
    224  1.12        ad 		if ((c & (DZ_RBUF_FRAMING_ERR | 0xff)) == DZ_RBUF_FRAMING_ERR)
    225  1.12        ad 			mcc = CNC_BREAK;
    226  1.12        ad 		else
    227  1.12        ad 			mcc = cc;
    228  1.12        ad 
    229  1.12        ad 		cn_check_magic(tp->t_dev, mcc, dz_cnm_state);
    230   1.1        ad 
    231   1.1        ad 		if (!(tp->t_state & TS_ISOPEN)) {
    232   1.1        ad 			wakeup((caddr_t)&tp->t_rawq);
    233   1.1        ad 			continue;
    234   1.1        ad 		}
    235   1.1        ad 
    236   1.1        ad 		if ((c & DZ_RBUF_OVERRUN_ERR) && overrun == 0) {
    237   1.1        ad 			log(LOG_WARNING, "%s: silo overflow, line %d\n",
    238   1.1        ad 			    sc->sc_dev.dv_xname, line);
    239   1.1        ad 			overrun = 1;
    240   1.1        ad 		}
    241  1.12        ad 
    242   1.1        ad 		if (c & DZ_RBUF_FRAMING_ERR)
    243   1.1        ad 			cc |= TTY_FE;
    244   1.1        ad 		if (c & DZ_RBUF_PARITY_ERR)
    245   1.1        ad 			cc |= TTY_PE;
    246   1.1        ad 
    247   1.1        ad 		(*tp->t_linesw->l_rint)(cc, tp);
    248   1.1        ad 	}
    249   1.1        ad }
    250   1.1        ad 
    251   1.1        ad /* Transmitter Interrupt */
    252   1.1        ad 
    253   1.1        ad void
    254   1.1        ad dzxint(void *arg)
    255   1.1        ad {
    256   1.1        ad 	struct dz_softc *sc = arg;
    257   1.1        ad 	struct tty *tp;
    258   1.1        ad 	struct clist *cl;
    259   1.1        ad 	int line, ch, csr;
    260   1.1        ad 	u_char tcr;
    261   1.1        ad 
    262   1.1        ad 	/*
    263   1.1        ad 	 * Switch to POLLED mode.
    264   1.1        ad 	 *   Some simple measurements indicated that even on
    265   1.1        ad 	 *  one port, by freeing the scanner in the controller
    266   1.1        ad 	 *  by either providing a character or turning off
    267   1.1        ad 	 *  the port when output is complete, the transmitter
    268   1.1        ad 	 *  was ready to accept more output when polled again.
    269   1.1        ad 	 *   With just two ports running the game "worms,"
    270   1.1        ad 	 *  almost every interrupt serviced both transmitters!
    271   1.1        ad 	 *   Each UART is double buffered, so if the scanner
    272   1.1        ad 	 *  is quick enough and timing works out, we can even
    273   1.1        ad 	 *  feed the same port twice.
    274   1.1        ad 	 *
    275   1.1        ad 	 * Ragge 980517:
    276   1.1        ad 	 * Do not need to turn off interrupts, already at interrupt level.
    277   1.1        ad 	 * Remove the pdma stuff; no great need of it right now.
    278   1.1        ad 	 */
    279   1.1        ad 
    280   1.1        ad 	while (((csr = DZ_READ_WORD(dr_csr)) & DZ_CSR_TX_READY) != 0) {
    281   1.1        ad 
    282   1.1        ad 		line = DZ_PORT(csr>>8);
    283   1.1        ad 
    284   1.1        ad 		tp = sc->sc_dz[line].dz_tty;
    285   1.1        ad 		cl = &tp->t_outq;
    286   1.1        ad 		tp->t_state &= ~TS_BUSY;
    287   1.1        ad 
    288   1.1        ad 		/* Just send out a char if we have one */
    289   1.1        ad 		/* As long as we can fill the chip buffer, we just loop here */
    290   1.1        ad 		if (cl->c_cc) {
    291   1.1        ad 			tp->t_state |= TS_BUSY;
    292   1.1        ad 			ch = getc(cl);
    293   1.1        ad 			DZ_WRITE_BYTE(dr_tbuf, ch);
    294   1.1        ad 			continue;
    295   1.1        ad 		}
    296   1.1        ad 		/* Nothing to send; clear the scan bit */
    297   1.1        ad 		/* Clear xmit scanner bit; dzstart may set it again */
    298   1.1        ad 		tcr = DZ_READ_WORD(dr_tcrw);
    299   1.1        ad 		tcr &= 255;
    300   1.1        ad 		tcr &= ~(1 << line);
    301   1.1        ad 		DZ_WRITE_BYTE(dr_tcr, tcr);
    302   1.1        ad 		if (sc->sc_dz[line].dz_catch)
    303   1.1        ad 			continue;
    304   1.1        ad 
    305   1.1        ad 		if (tp->t_state & TS_FLUSH)
    306   1.1        ad 			tp->t_state &= ~TS_FLUSH;
    307   1.1        ad 		else
    308   1.1        ad 			ndflush (&tp->t_outq, cl->c_cc);
    309   1.1        ad 
    310   1.1        ad 		(*tp->t_linesw->l_start)(tp);
    311   1.1        ad 	}
    312   1.1        ad }
    313   1.1        ad 
    314   1.1        ad int
    315   1.1        ad dzopen(dev_t dev, int flag, int mode, struct proc *p)
    316   1.1        ad {
    317   1.1        ad 	struct tty *tp;
    318   1.1        ad 	int unit, line;
    319   1.1        ad 	struct	dz_softc *sc;
    320   1.1        ad 	int s, error = 0;
    321   1.1        ad 
    322   1.1        ad 	unit = DZ_I2C(minor(dev));
    323   1.1        ad 	line = DZ_PORT(minor(dev));
    324   1.1        ad 	if (unit >= dz_cd.cd_ndevs ||  dz_cd.cd_devs[unit] == NULL)
    325   1.1        ad 		return (ENXIO);
    326   1.1        ad 
    327   1.1        ad 	sc = dz_cd.cd_devs[unit];
    328   1.1        ad 
    329   1.1        ad 	if (line >= sc->sc_type)
    330   1.1        ad 		return ENXIO;
    331   1.1        ad 
    332   1.1        ad 	/* if some other device is using the line, it's busy */
    333   1.1        ad 	if (sc->sc_dz[line].dz_catch)
    334   1.1        ad 		return EBUSY;
    335   1.1        ad 
    336   1.1        ad 	tp = sc->sc_dz[line].dz_tty;
    337   1.1        ad 	if (tp == NULL)
    338   1.1        ad 		return (ENODEV);
    339   1.1        ad 	tp->t_oproc   = dzstart;
    340   1.1        ad 	tp->t_param   = dzparam;
    341   1.1        ad 	tp->t_dev = dev;
    342   1.1        ad 	if ((tp->t_state & TS_ISOPEN) == 0) {
    343   1.1        ad 		ttychars(tp);
    344   1.1        ad 		if (tp->t_ispeed == 0) {
    345   1.1        ad 			tp->t_iflag = TTYDEF_IFLAG;
    346   1.1        ad 			tp->t_oflag = TTYDEF_OFLAG;
    347   1.1        ad 			tp->t_cflag = TTYDEF_CFLAG;
    348   1.1        ad 			tp->t_lflag = TTYDEF_LFLAG;
    349   1.1        ad 			tp->t_ispeed = tp->t_ospeed = TTYDEF_SPEED;
    350   1.1        ad 		}
    351   1.1        ad 		(void) dzparam(tp, &tp->t_termios);
    352   1.1        ad 		ttsetwater(tp);
    353   1.1        ad 	} else if ((tp->t_state & TS_XCLUDE) && p->p_ucred->cr_uid != 0)
    354   1.1        ad 		return (EBUSY);
    355   1.1        ad 	/* Use DMBIS and *not* DMSET or else we clobber incoming bits */
    356   1.1        ad 	if (dzmctl(sc, line, DML_DTR, DMBIS) & DML_DCD)
    357   1.1        ad 		tp->t_state |= TS_CARR_ON;
    358   1.1        ad 	s = spltty();
    359   1.1        ad 	while (!(flag & O_NONBLOCK) && !(tp->t_cflag & CLOCAL) &&
    360   1.1        ad 	       !(tp->t_state & TS_CARR_ON)) {
    361   1.1        ad 		tp->t_wopen++;
    362   1.1        ad 		error = ttysleep(tp, (caddr_t)&tp->t_rawq,
    363   1.1        ad 				TTIPRI | PCATCH, ttopen, 0);
    364   1.1        ad 		tp->t_wopen--;
    365   1.1        ad 		if (error)
    366   1.1        ad 			break;
    367   1.1        ad 	}
    368   1.1        ad 	(void) splx(s);
    369   1.1        ad 	if (error)
    370   1.1        ad 		return (error);
    371   1.1        ad 	return ((*tp->t_linesw->l_open)(dev, tp));
    372   1.1        ad }
    373   1.1        ad 
    374   1.1        ad /*ARGSUSED*/
    375   1.1        ad int
    376   1.1        ad dzclose(dev_t dev, int flag, int mode, struct proc *p)
    377   1.1        ad {
    378   1.1        ad 	struct	dz_softc *sc;
    379   1.1        ad 	struct tty *tp;
    380   1.1        ad 	int unit, line;
    381   1.1        ad 
    382   1.1        ad 
    383   1.1        ad 	unit = DZ_I2C(minor(dev));
    384   1.1        ad 	line = DZ_PORT(minor(dev));
    385   1.1        ad 	sc = dz_cd.cd_devs[unit];
    386   1.1        ad 
    387   1.1        ad 	tp = sc->sc_dz[line].dz_tty;
    388   1.1        ad 
    389   1.1        ad 	(*tp->t_linesw->l_close)(tp, flag);
    390   1.1        ad 
    391   1.1        ad 	/* Make sure a BREAK state is not left enabled. */
    392   1.1        ad 	(void) dzmctl(sc, line, DML_BRK, DMBIC);
    393   1.1        ad 
    394   1.1        ad 	/* Do a hangup if so required. */
    395   1.1        ad 	if ((tp->t_cflag & HUPCL) || tp->t_wopen || !(tp->t_state & TS_ISOPEN))
    396   1.1        ad 		(void) dzmctl(sc, line, 0, DMSET);
    397   1.1        ad 
    398   1.1        ad 	return (ttyclose(tp));
    399   1.1        ad }
    400   1.1        ad 
    401   1.1        ad int
    402   1.1        ad dzread(dev_t dev, struct uio *uio, int flag)
    403   1.1        ad {
    404   1.1        ad 	struct tty *tp;
    405   1.1        ad 	struct	dz_softc *sc;
    406   1.1        ad 
    407   1.1        ad 	sc = dz_cd.cd_devs[DZ_I2C(minor(dev))];
    408   1.1        ad 
    409   1.1        ad 	tp = sc->sc_dz[DZ_PORT(minor(dev))].dz_tty;
    410   1.1        ad 	return ((*tp->t_linesw->l_read)(tp, uio, flag));
    411   1.1        ad }
    412   1.1        ad 
    413   1.1        ad int
    414   1.1        ad dzwrite(dev_t dev, struct uio *uio, int flag)
    415   1.1        ad {
    416   1.1        ad 	struct tty *tp;
    417   1.1        ad 	struct	dz_softc *sc;
    418   1.1        ad 
    419   1.1        ad 	sc = dz_cd.cd_devs[DZ_I2C(minor(dev))];
    420   1.1        ad 
    421   1.1        ad 	tp = sc->sc_dz[DZ_PORT(minor(dev))].dz_tty;
    422   1.1        ad 	return ((*tp->t_linesw->l_write)(tp, uio, flag));
    423   1.1        ad }
    424   1.1        ad 
    425   1.1        ad int
    426   1.1        ad dzpoll(dev, events, p)
    427   1.1        ad 	dev_t dev;
    428   1.1        ad 	int events;
    429   1.1        ad 	struct proc *p;
    430   1.1        ad {
    431   1.1        ad 	struct tty *tp;
    432   1.1        ad 	struct	dz_softc *sc;
    433   1.1        ad 
    434   1.1        ad 	sc = dz_cd.cd_devs[DZ_I2C(minor(dev))];
    435   1.1        ad 
    436   1.1        ad 	tp = sc->sc_dz[DZ_PORT(minor(dev))].dz_tty;
    437   1.1        ad 	return ((*tp->t_linesw->l_poll)(tp, events, p));
    438   1.1        ad }
    439   1.1        ad 
    440   1.1        ad /*ARGSUSED*/
    441   1.1        ad int
    442   1.1        ad dzioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct proc *p)
    443   1.1        ad {
    444   1.1        ad 	struct	dz_softc *sc;
    445   1.1        ad 	struct tty *tp;
    446   1.1        ad 	int unit, line;
    447   1.1        ad 	int error;
    448   1.1        ad 
    449   1.1        ad 	unit = DZ_I2C(minor(dev));
    450   1.1        ad 	line = DZ_PORT(minor(dev));
    451   1.1        ad 	sc = dz_cd.cd_devs[unit];
    452   1.1        ad 	tp = sc->sc_dz[line].dz_tty;
    453   1.1        ad 
    454   1.1        ad 	error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, p);
    455   1.1        ad 	if (error >= 0)
    456   1.1        ad 		return (error);
    457   1.2    atatat 
    458   1.1        ad 	error = ttioctl(tp, cmd, data, flag, p);
    459   1.1        ad 	if (error >= 0)
    460   1.1        ad 		return (error);
    461   1.1        ad 
    462   1.1        ad 	switch (cmd) {
    463   1.1        ad 
    464   1.1        ad 	case TIOCSBRK:
    465   1.1        ad 		(void) dzmctl(sc, line, DML_BRK, DMBIS);
    466   1.1        ad 		break;
    467   1.1        ad 
    468   1.1        ad 	case TIOCCBRK:
    469   1.1        ad 		(void) dzmctl(sc, line, DML_BRK, DMBIC);
    470   1.1        ad 		break;
    471   1.1        ad 
    472   1.1        ad 	case TIOCSDTR:
    473   1.1        ad 		(void) dzmctl(sc, line, DML_DTR, DMBIS);
    474   1.1        ad 		break;
    475   1.1        ad 
    476   1.1        ad 	case TIOCCDTR:
    477   1.1        ad 		(void) dzmctl(sc, line, DML_DTR, DMBIC);
    478   1.1        ad 		break;
    479   1.1        ad 
    480   1.1        ad 	case TIOCMSET:
    481   1.1        ad 		(void) dzmctl(sc, line, *(int *)data, DMSET);
    482   1.1        ad 		break;
    483   1.1        ad 
    484   1.1        ad 	case TIOCMBIS:
    485   1.1        ad 		(void) dzmctl(sc, line, *(int *)data, DMBIS);
    486   1.1        ad 		break;
    487   1.1        ad 
    488   1.1        ad 	case TIOCMBIC:
    489   1.1        ad 		(void) dzmctl(sc, line, *(int *)data, DMBIC);
    490   1.1        ad 		break;
    491   1.1        ad 
    492   1.1        ad 	case TIOCMGET:
    493   1.1        ad 		*(int *)data = (dzmctl(sc, line, 0, DMGET) & ~DML_BRK);
    494   1.1        ad 		break;
    495   1.1        ad 
    496   1.1        ad 	default:
    497   1.2    atatat 		return (EPASSTHROUGH);
    498   1.1        ad 	}
    499   1.1        ad 	return (0);
    500   1.1        ad }
    501   1.1        ad 
    502   1.1        ad struct tty *
    503   1.1        ad dztty(dev_t dev)
    504   1.1        ad {
    505   1.1        ad 	struct	dz_softc *sc = dz_cd.cd_devs[DZ_I2C(minor(dev))];
    506   1.1        ad         struct tty *tp = sc->sc_dz[DZ_PORT(minor(dev))].dz_tty;
    507   1.1        ad 
    508   1.1        ad         return (tp);
    509   1.1        ad }
    510   1.1        ad 
    511   1.1        ad /*ARGSUSED*/
    512   1.1        ad void
    513   1.1        ad dzstop(struct tty *tp, int flag)
    514   1.1        ad {
    515   1.1        ad 	if (tp->t_state & TS_BUSY)
    516   1.1        ad 		if (!(tp->t_state & TS_TTSTOP))
    517   1.1        ad 			tp->t_state |= TS_FLUSH;
    518   1.1        ad }
    519   1.1        ad 
    520   1.1        ad void
    521   1.1        ad dzstart(struct tty *tp)
    522   1.1        ad {
    523   1.1        ad 	struct dz_softc *sc;
    524   1.1        ad 	struct clist *cl;
    525   1.1        ad 	int unit, line, s;
    526   1.1        ad 	char state;
    527   1.1        ad 
    528   1.1        ad 	unit = DZ_I2C(minor(tp->t_dev));
    529   1.1        ad 	line = DZ_PORT(minor(tp->t_dev));
    530   1.1        ad 	sc = dz_cd.cd_devs[unit];
    531   1.1        ad 
    532   1.1        ad 	s = spltty();
    533   1.1        ad 	if (tp->t_state & (TS_TIMEOUT|TS_BUSY|TS_TTSTOP))
    534   1.1        ad 		return;
    535   1.1        ad 	cl = &tp->t_outq;
    536   1.1        ad 	if (cl->c_cc <= tp->t_lowat) {
    537   1.1        ad 		if (tp->t_state & TS_ASLEEP) {
    538   1.1        ad 			tp->t_state &= ~TS_ASLEEP;
    539   1.1        ad 			wakeup((caddr_t)cl);
    540   1.1        ad 		}
    541   1.1        ad 		selwakeup(&tp->t_wsel);
    542   1.1        ad 	}
    543   1.1        ad 	if (cl->c_cc == 0)
    544   1.1        ad 		return;
    545   1.1        ad 
    546   1.1        ad 	tp->t_state |= TS_BUSY;
    547   1.1        ad 
    548   1.1        ad 	state = DZ_READ_WORD(dr_tcrw) & 255;
    549   1.1        ad 	if ((state & (1 << line)) == 0) {
    550   1.1        ad 		DZ_WRITE_BYTE(dr_tcr, state | (1 << line));
    551   1.1        ad 	}
    552   1.1        ad 	dzxint(sc);
    553   1.1        ad 	splx(s);
    554   1.1        ad }
    555   1.1        ad 
    556   1.1        ad static int
    557   1.1        ad dzparam(struct tty *tp, struct termios *t)
    558   1.1        ad {
    559   1.1        ad 	struct	dz_softc *sc;
    560   1.1        ad 	int cflag = t->c_cflag;
    561   1.1        ad 	int unit, line;
    562   1.1        ad 	int ispeed = ttspeedtab(t->c_ispeed, dzspeedtab);
    563   1.1        ad 	int ospeed = ttspeedtab(t->c_ospeed, dzspeedtab);
    564   1.1        ad 	unsigned lpr;
    565   1.1        ad 	int s;
    566   1.1        ad 
    567   1.1        ad 	unit = DZ_I2C(minor(tp->t_dev));
    568   1.1        ad 	line = DZ_PORT(minor(tp->t_dev));
    569   1.1        ad 	sc = dz_cd.cd_devs[unit];
    570   1.1        ad 
    571   1.1        ad 	/* check requested parameters */
    572   1.1        ad         if (ospeed < 0 || ispeed < 0 || ispeed != ospeed)
    573   1.1        ad                 return (EINVAL);
    574   1.1        ad 
    575   1.1        ad         tp->t_ispeed = t->c_ispeed;
    576   1.1        ad         tp->t_ospeed = t->c_ospeed;
    577   1.1        ad         tp->t_cflag = cflag;
    578   1.1        ad 
    579   1.1        ad 	if (ospeed == 0) {
    580   1.1        ad 		(void) dzmctl(sc, line, 0, DMSET);	/* hang up line */
    581   1.1        ad 		return (0);
    582   1.1        ad 	}
    583   1.1        ad 
    584   1.1        ad 	s = spltty();
    585   1.1        ad 
    586   1.1        ad 	lpr = DZ_LPR_RX_ENABLE | ((ispeed&0xF)<<8) | line;
    587   1.1        ad 
    588   1.1        ad 	switch (cflag & CSIZE)
    589   1.1        ad 	{
    590   1.1        ad 	  case CS5:
    591   1.1        ad 		lpr |= DZ_LPR_5_BIT_CHAR;
    592   1.1        ad 		break;
    593   1.1        ad 	  case CS6:
    594   1.1        ad 		lpr |= DZ_LPR_6_BIT_CHAR;
    595   1.1        ad 		break;
    596   1.1        ad 	  case CS7:
    597   1.1        ad 		lpr |= DZ_LPR_7_BIT_CHAR;
    598   1.1        ad 		break;
    599   1.1        ad 	  default:
    600   1.1        ad 		lpr |= DZ_LPR_8_BIT_CHAR;
    601   1.1        ad 		break;
    602   1.1        ad 	}
    603   1.1        ad 	if (cflag & PARENB)
    604   1.1        ad 		lpr |= DZ_LPR_PARENB;
    605   1.1        ad 	if (cflag & PARODD)
    606   1.1        ad 		lpr |= DZ_LPR_OPAR;
    607   1.1        ad 	if (cflag & CSTOPB)
    608   1.1        ad 		lpr |= DZ_LPR_2_STOP;
    609   1.1        ad 
    610   1.1        ad 	DZ_WRITE_WORD(dr_lpr, lpr);
    611   1.1        ad 
    612   1.1        ad 	(void) splx(s);
    613   1.1        ad 	return (0);
    614   1.1        ad }
    615   1.1        ad 
    616   1.1        ad static unsigned
    617   1.1        ad dzmctl(struct dz_softc *sc, int line, int bits, int how)
    618   1.1        ad {
    619   1.1        ad 	unsigned status;
    620   1.1        ad 	unsigned mbits;
    621   1.1        ad 	unsigned bit;
    622   1.1        ad 	int s;
    623   1.1        ad 
    624   1.1        ad 	s = spltty();
    625   1.1        ad 
    626   1.1        ad 	mbits = 0;
    627   1.1        ad 
    628   1.1        ad 	bit = (1 << line);
    629   1.1        ad 
    630   1.1        ad 	/* external signals as seen from the port */
    631   1.1        ad 
    632   1.1        ad 	status = DZ_READ_BYTE(dr_dcd) | sc->sc_dsr;
    633   1.1        ad 
    634   1.1        ad 	if (status & bit)
    635   1.1        ad 		mbits |= DML_DCD;
    636   1.1        ad 
    637   1.1        ad 	status = DZ_READ_BYTE(dr_ring);
    638   1.1        ad 
    639   1.1        ad 	if (status & bit)
    640   1.1        ad 		mbits |= DML_RI;
    641   1.1        ad 
    642   1.1        ad 	/* internal signals/state delivered to port */
    643   1.1        ad 
    644   1.1        ad 	status = DZ_READ_BYTE(dr_dtr);
    645   1.1        ad 
    646   1.1        ad 	if (status & bit)
    647   1.1        ad 		mbits |= DML_DTR;
    648   1.1        ad 
    649   1.1        ad 	if (sc->sc_brk & bit)
    650   1.1        ad 		mbits |= DML_BRK;
    651   1.1        ad 
    652   1.1        ad 	switch (how)
    653   1.1        ad 	{
    654   1.1        ad 	  case DMSET:
    655   1.1        ad 		mbits = bits;
    656   1.1        ad 		break;
    657   1.1        ad 
    658   1.1        ad 	  case DMBIS:
    659   1.1        ad 		mbits |= bits;
    660   1.1        ad 		break;
    661   1.1        ad 
    662   1.1        ad 	  case DMBIC:
    663   1.1        ad 		mbits &= ~bits;
    664   1.1        ad 		break;
    665   1.1        ad 
    666   1.1        ad 	  case DMGET:
    667   1.1        ad 		(void) splx(s);
    668   1.1        ad 		return (mbits);
    669   1.1        ad 	}
    670   1.1        ad 
    671   1.1        ad 	if (mbits & DML_DTR) {
    672   1.1        ad 		DZ_WRITE_BYTE(dr_dtr, DZ_READ_BYTE(dr_dtr) | bit);
    673   1.1        ad 	} else {
    674   1.1        ad 		DZ_WRITE_BYTE(dr_dtr, DZ_READ_BYTE(dr_dtr) & ~bit);
    675   1.1        ad 	}
    676   1.1        ad 
    677   1.1        ad 	if (mbits & DML_BRK) {
    678   1.1        ad 		sc->sc_brk |= bit;
    679   1.1        ad 		DZ_WRITE_BYTE(dr_break, sc->sc_brk);
    680   1.1        ad 	} else {
    681   1.1        ad 		sc->sc_brk &= ~bit;
    682   1.1        ad 		DZ_WRITE_BYTE(dr_break, sc->sc_brk);
    683   1.1        ad 	}
    684   1.1        ad 
    685   1.1        ad 	(void) splx(s);
    686   1.1        ad 	return (mbits);
    687   1.1        ad }
    688   1.1        ad 
    689   1.1        ad /*
    690   1.1        ad  * This is called by timeout() periodically.
    691   1.1        ad  * Check to see if modem status bits have changed.
    692   1.1        ad  */
    693   1.1        ad static void
    694   1.1        ad dzscan(void *arg)
    695   1.1        ad {
    696   1.1        ad 	struct dz_softc *sc;
    697   1.1        ad 	struct tty *tp;
    698   1.1        ad 	int n, bit, port;
    699   1.1        ad 	unsigned csr;
    700   1.1        ad 	int s;
    701   1.1        ad 
    702   1.1        ad 	s = spltty();
    703   1.1        ad 
    704   1.1        ad 	for (n = 0; n < dz_cd.cd_ndevs; n++) {
    705   1.1        ad 
    706   1.1        ad 		if (dz_cd.cd_devs[n] == NULL)
    707   1.1        ad 			continue;
    708   1.1        ad 
    709   1.1        ad 		sc = dz_cd.cd_devs[n];
    710   1.1        ad 
    711   1.1        ad 		for (port = 0; port < sc->sc_type; port++) {
    712   1.1        ad 
    713   1.1        ad 			tp = sc->sc_dz[port].dz_tty;
    714   1.1        ad 			bit = (1 << port);
    715   1.1        ad 
    716   1.1        ad 			if ((DZ_READ_BYTE(dr_dcd) | sc->sc_dsr) & bit) {
    717   1.1        ad 				if (!(tp->t_state & TS_CARR_ON))
    718   1.1        ad 					(*tp->t_linesw->l_modem) (tp, 1);
    719   1.1        ad 			} else if ((tp->t_state & TS_CARR_ON) &&
    720   1.1        ad 			    (*tp->t_linesw->l_modem)(tp, 0) == 0) {
    721   1.1        ad 				DZ_WRITE_BYTE(dr_tcr,
    722   1.1        ad 				    (DZ_READ_WORD(dr_tcrw) & 255) & ~bit);
    723   1.1        ad 			}
    724   1.1        ad 	    	}
    725   1.1        ad 
    726   1.1        ad 		/*
    727   1.1        ad 		 *  If the RX interrupt rate is this high, switch
    728   1.1        ad 		 *  the controller to Silo Alarm - which means don't
    729   1.1        ad 	 	 *  interrupt until the RX silo has 16 characters in
    730   1.1        ad 	 	 *  it (the silo is 64 characters in all).
    731   1.1        ad 		 *  Avoid oscillating SA on and off by not turning
    732   1.1        ad 		 *  if off unless the rate is appropriately low.
    733   1.1        ad 		 */
    734   1.1        ad 
    735   1.1        ad 		csr = DZ_READ_WORD(dr_csr);
    736   1.1        ad 
    737   1.1        ad 		if (sc->sc_rxint > (16*10)) {
    738   1.1        ad 			if ((csr & DZ_CSR_SAE) == 0)
    739   1.1        ad 				DZ_WRITE_WORD(dr_csr, csr | DZ_CSR_SAE);
    740   1.1        ad 	    	} else if ((csr & DZ_CSR_SAE) != 0)
    741   1.1        ad 			if (sc->sc_rxint < 10)
    742   1.1        ad 				DZ_WRITE_WORD(dr_csr, csr & ~(DZ_CSR_SAE));
    743   1.1        ad 
    744   1.1        ad 		sc->sc_rxint = 0;
    745   1.1        ad 	}
    746   1.1        ad 	(void) splx(s);
    747   1.1        ad 	callout_reset(&dzscan_ch, hz, dzscan, NULL);
    748   1.1        ad }
    749   1.1        ad 
    750   1.1        ad /*
    751   1.1        ad  * Called after an ubareset. The DZ card is reset, but the only thing
    752   1.1        ad  * that must be done is to start the receiver and transmitter again.
    753   1.1        ad  * No DMA setup to care about.
    754   1.1        ad  */
    755   1.1        ad void
    756   1.1        ad dzreset(struct device *dev)
    757   1.1        ad {
    758   1.1        ad 	struct dz_softc *sc = (void *)dev;
    759   1.1        ad 	struct tty *tp;
    760   1.1        ad 	int i;
    761   1.1        ad 
    762   1.1        ad 	for (i = 0; i < sc->sc_type; i++) {
    763   1.1        ad 		tp = sc->sc_dz[i].dz_tty;
    764   1.1        ad 
    765   1.1        ad 		if (((tp->t_state & TS_ISOPEN) == 0) || (tp->t_wopen == 0))
    766   1.1        ad 			continue;
    767   1.1        ad 
    768   1.1        ad 		dzparam(tp, &tp->t_termios);
    769   1.1        ad 		dzmctl(sc, i, DML_DTR, DMSET);
    770   1.1        ad 		tp->t_state &= ~TS_BUSY;
    771   1.1        ad 		dzstart(tp);	/* Kick off transmitter again */
    772   1.1        ad 	}
    773   1.1        ad }
    774