dz.c revision 1.10 1 /* $NetBSD: dz.c,v 1.10 2003/08/07 16:30:54 agc Exp $ */
2 /*
3 * Copyright (c) 1992, 1993
4 * The Regents of the University of California. All rights reserved.
5 *
6 * This code is derived from software contributed to Berkeley by
7 * Ralph Campbell and Rick Macklem.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. Neither the name of the University nor the names of its contributors
18 * may be used to endorse or promote products derived from this software
19 * without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * SUCH DAMAGE.
32 */
33
34 /*
35 * Copyright (c) 1996 Ken C. Wellsch. All rights reserved.
36 *
37 * This code is derived from software contributed to Berkeley by
38 * Ralph Campbell and Rick Macklem.
39 *
40 * Redistribution and use in source and binary forms, with or without
41 * modification, are permitted provided that the following conditions
42 * are met:
43 * 1. Redistributions of source code must retain the above copyright
44 * notice, this list of conditions and the following disclaimer.
45 * 2. Redistributions in binary form must reproduce the above copyright
46 * notice, this list of conditions and the following disclaimer in the
47 * documentation and/or other materials provided with the distribution.
48 * 3. All advertising materials mentioning features or use of this software
49 * must display the following acknowledgement:
50 * This product includes software developed by the University of
51 * California, Berkeley and its contributors.
52 * 4. Neither the name of the University nor the names of its contributors
53 * may be used to endorse or promote products derived from this software
54 * without specific prior written permission.
55 *
56 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
57 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
58 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
59 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
60 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
61 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
62 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
63 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
64 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
65 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
66 * SUCH DAMAGE.
67 */
68
69 #include <sys/cdefs.h>
70 __KERNEL_RCSID(0, "$NetBSD: dz.c,v 1.10 2003/08/07 16:30:54 agc Exp $");
71
72 #include "opt_ddb.h"
73
74 #include <sys/param.h>
75 #include <sys/systm.h>
76 #include <sys/callout.h>
77 #include <sys/ioctl.h>
78 #include <sys/tty.h>
79 #include <sys/proc.h>
80 #include <sys/buf.h>
81 #include <sys/conf.h>
82 #include <sys/file.h>
83 #include <sys/uio.h>
84 #include <sys/kernel.h>
85 #include <sys/syslog.h>
86 #include <sys/device.h>
87
88 #include <machine/bus.h>
89
90 #include <dev/dec/dzreg.h>
91 #include <dev/dec/dzvar.h>
92
93 #define DZ_READ_BYTE(adr) \
94 bus_space_read_1(sc->sc_iot, sc->sc_ioh, sc->sc_dr.adr)
95 #define DZ_READ_WORD(adr) \
96 bus_space_read_2(sc->sc_iot, sc->sc_ioh, sc->sc_dr.adr)
97 #define DZ_WRITE_BYTE(adr, val) \
98 bus_space_write_1(sc->sc_iot, sc->sc_ioh, sc->sc_dr.adr, val)
99 #define DZ_WRITE_WORD(adr, val) \
100 bus_space_write_2(sc->sc_iot, sc->sc_ioh, sc->sc_dr.adr, val)
101
102 #include "ioconf.h"
103
104 /* Flags used to monitor modem bits, make them understood outside driver */
105
106 #define DML_DTR TIOCM_DTR
107 #define DML_DCD TIOCM_CD
108 #define DML_RI TIOCM_RI
109 #define DML_BRK 0100000 /* no equivalent, we will mask */
110
111 static struct speedtab dzspeedtab[] =
112 {
113 { 0, 0 },
114 { 50, DZ_LPR_B50 },
115 { 75, DZ_LPR_B75 },
116 { 110, DZ_LPR_B110 },
117 { 134, DZ_LPR_B134 },
118 { 150, DZ_LPR_B150 },
119 { 300, DZ_LPR_B300 },
120 { 600, DZ_LPR_B600 },
121 { 1200, DZ_LPR_B1200 },
122 { 1800, DZ_LPR_B1800 },
123 { 2000, DZ_LPR_B2000 },
124 { 2400, DZ_LPR_B2400 },
125 { 3600, DZ_LPR_B3600 },
126 { 4800, DZ_LPR_B4800 },
127 { 7200, DZ_LPR_B7200 },
128 { 9600, DZ_LPR_B9600 },
129 { 19200, DZ_LPR_B19200 },
130 { -1, -1 }
131 };
132
133 static void dzstart(struct tty *);
134 static int dzparam(struct tty *, struct termios *);
135 static unsigned dzmctl(struct dz_softc *, int, int, int);
136 static void dzscan(void *);
137
138 dev_type_open(dzopen);
139 dev_type_close(dzclose);
140 dev_type_read(dzread);
141 dev_type_write(dzwrite);
142 dev_type_ioctl(dzioctl);
143 dev_type_stop(dzstop);
144 dev_type_tty(dztty);
145 dev_type_poll(dzpoll);
146
147 const struct cdevsw dz_cdevsw = {
148 dzopen, dzclose, dzread, dzwrite, dzioctl,
149 dzstop, dztty, dzpoll, nommap, ttykqfilter, D_TTY
150 };
151
152 /*
153 * The DZ series doesn't interrupt on carrier transitions,
154 * so we have to use a timer to watch it.
155 */
156 int dz_timer; /* true if timer started */
157 struct callout dzscan_ch;
158
159 void
160 dzattach(struct dz_softc *sc, struct evcnt *parent_evcnt, int consline)
161 {
162 int n;
163
164 sc->sc_rxint = sc->sc_brk = 0;
165 sc->sc_consline = consline;
166
167 sc->sc_dr.dr_tcrw = sc->sc_dr.dr_tcr;
168 DZ_WRITE_WORD(dr_csr, DZ_CSR_MSE | DZ_CSR_RXIE | DZ_CSR_TXIE);
169 DZ_WRITE_BYTE(dr_dtr, 0);
170 DZ_WRITE_BYTE(dr_break, 0);
171
172 /* Initialize our softc structure. Should be done in open? */
173
174 for (n = 0; n < sc->sc_type; n++) {
175 sc->sc_dz[n].dz_sc = sc;
176 sc->sc_dz[n].dz_line = n;
177 sc->sc_dz[n].dz_tty = ttymalloc();
178 }
179
180 evcnt_attach_dynamic(&sc->sc_rintrcnt, EVCNT_TYPE_INTR, parent_evcnt,
181 sc->sc_dev.dv_xname, "rintr");
182 evcnt_attach_dynamic(&sc->sc_tintrcnt, EVCNT_TYPE_INTR, parent_evcnt,
183 sc->sc_dev.dv_xname, "tintr");
184
185 /* Alas no interrupt on modem bit changes, so we manually scan */
186
187 if (dz_timer == 0) {
188 dz_timer = 1;
189 callout_init(&dzscan_ch);
190 callout_reset(&dzscan_ch, hz, dzscan, NULL);
191 }
192 printf("\n");
193 }
194
195 /* Receiver Interrupt */
196
197 void
198 dzrint(void *arg)
199 {
200 struct dz_softc *sc = arg;
201 struct tty *tp;
202 int cc, line;
203 unsigned c;
204 int overrun = 0;
205
206 sc->sc_rxint++;
207
208 while ((c = DZ_READ_WORD(dr_rbuf)) & DZ_RBUF_DATA_VALID) {
209 cc = c & 0xFF;
210 line = DZ_PORT(c>>8);
211 tp = sc->sc_dz[line].dz_tty;
212
213 /* Must be caught early */
214 if (sc->sc_dz[line].dz_catch &&
215 (*sc->sc_dz[line].dz_catch)(sc->sc_dz[line].dz_private, cc))
216 continue;
217
218 if (!(tp->t_state & TS_ISOPEN)) {
219 wakeup((caddr_t)&tp->t_rawq);
220 continue;
221 }
222
223 if ((c & DZ_RBUF_OVERRUN_ERR) && overrun == 0) {
224 log(LOG_WARNING, "%s: silo overflow, line %d\n",
225 sc->sc_dev.dv_xname, line);
226 overrun = 1;
227 }
228 #if defined(pmax) && defined(DDB)
229 else if (line == sc->sc_consline) {
230 /*
231 * A BREAK key will appear as a NUL with a framing
232 * error.
233 */
234 if (cc == 0 && (c & DZ_RBUF_FRAMING_ERR) != 0)
235 Debugger();
236 }
237 #endif
238 if (c & DZ_RBUF_FRAMING_ERR)
239 cc |= TTY_FE;
240 if (c & DZ_RBUF_PARITY_ERR)
241 cc |= TTY_PE;
242
243 (*tp->t_linesw->l_rint)(cc, tp);
244 }
245 }
246
247 /* Transmitter Interrupt */
248
249 void
250 dzxint(void *arg)
251 {
252 struct dz_softc *sc = arg;
253 struct tty *tp;
254 struct clist *cl;
255 int line, ch, csr;
256 u_char tcr;
257
258 /*
259 * Switch to POLLED mode.
260 * Some simple measurements indicated that even on
261 * one port, by freeing the scanner in the controller
262 * by either providing a character or turning off
263 * the port when output is complete, the transmitter
264 * was ready to accept more output when polled again.
265 * With just two ports running the game "worms,"
266 * almost every interrupt serviced both transmitters!
267 * Each UART is double buffered, so if the scanner
268 * is quick enough and timing works out, we can even
269 * feed the same port twice.
270 *
271 * Ragge 980517:
272 * Do not need to turn off interrupts, already at interrupt level.
273 * Remove the pdma stuff; no great need of it right now.
274 */
275
276 while (((csr = DZ_READ_WORD(dr_csr)) & DZ_CSR_TX_READY) != 0) {
277
278 line = DZ_PORT(csr>>8);
279
280 tp = sc->sc_dz[line].dz_tty;
281 cl = &tp->t_outq;
282 tp->t_state &= ~TS_BUSY;
283
284 /* Just send out a char if we have one */
285 /* As long as we can fill the chip buffer, we just loop here */
286 if (cl->c_cc) {
287 tp->t_state |= TS_BUSY;
288 ch = getc(cl);
289 DZ_WRITE_BYTE(dr_tbuf, ch);
290 continue;
291 }
292 /* Nothing to send; clear the scan bit */
293 /* Clear xmit scanner bit; dzstart may set it again */
294 tcr = DZ_READ_WORD(dr_tcrw);
295 tcr &= 255;
296 tcr &= ~(1 << line);
297 DZ_WRITE_BYTE(dr_tcr, tcr);
298 if (sc->sc_dz[line].dz_catch)
299 continue;
300
301 if (tp->t_state & TS_FLUSH)
302 tp->t_state &= ~TS_FLUSH;
303 else
304 ndflush (&tp->t_outq, cl->c_cc);
305
306 (*tp->t_linesw->l_start)(tp);
307 }
308 }
309
310 int
311 dzopen(dev_t dev, int flag, int mode, struct proc *p)
312 {
313 struct tty *tp;
314 int unit, line;
315 struct dz_softc *sc;
316 int s, error = 0;
317
318 unit = DZ_I2C(minor(dev));
319 line = DZ_PORT(minor(dev));
320 if (unit >= dz_cd.cd_ndevs || dz_cd.cd_devs[unit] == NULL)
321 return (ENXIO);
322
323 sc = dz_cd.cd_devs[unit];
324
325 if (line >= sc->sc_type)
326 return ENXIO;
327
328 /* if some other device is using the line, it's busy */
329 if (sc->sc_dz[line].dz_catch)
330 return EBUSY;
331
332 tp = sc->sc_dz[line].dz_tty;
333 if (tp == NULL)
334 return (ENODEV);
335 tp->t_oproc = dzstart;
336 tp->t_param = dzparam;
337 tp->t_dev = dev;
338 if ((tp->t_state & TS_ISOPEN) == 0) {
339 ttychars(tp);
340 if (tp->t_ispeed == 0) {
341 tp->t_iflag = TTYDEF_IFLAG;
342 tp->t_oflag = TTYDEF_OFLAG;
343 tp->t_cflag = TTYDEF_CFLAG;
344 tp->t_lflag = TTYDEF_LFLAG;
345 tp->t_ispeed = tp->t_ospeed = TTYDEF_SPEED;
346 }
347 (void) dzparam(tp, &tp->t_termios);
348 ttsetwater(tp);
349 } else if ((tp->t_state & TS_XCLUDE) && p->p_ucred->cr_uid != 0)
350 return (EBUSY);
351 /* Use DMBIS and *not* DMSET or else we clobber incoming bits */
352 if (dzmctl(sc, line, DML_DTR, DMBIS) & DML_DCD)
353 tp->t_state |= TS_CARR_ON;
354 s = spltty();
355 while (!(flag & O_NONBLOCK) && !(tp->t_cflag & CLOCAL) &&
356 !(tp->t_state & TS_CARR_ON)) {
357 tp->t_wopen++;
358 error = ttysleep(tp, (caddr_t)&tp->t_rawq,
359 TTIPRI | PCATCH, ttopen, 0);
360 tp->t_wopen--;
361 if (error)
362 break;
363 }
364 (void) splx(s);
365 if (error)
366 return (error);
367 return ((*tp->t_linesw->l_open)(dev, tp));
368 }
369
370 /*ARGSUSED*/
371 int
372 dzclose(dev_t dev, int flag, int mode, struct proc *p)
373 {
374 struct dz_softc *sc;
375 struct tty *tp;
376 int unit, line;
377
378
379 unit = DZ_I2C(minor(dev));
380 line = DZ_PORT(minor(dev));
381 sc = dz_cd.cd_devs[unit];
382
383 tp = sc->sc_dz[line].dz_tty;
384
385 (*tp->t_linesw->l_close)(tp, flag);
386
387 /* Make sure a BREAK state is not left enabled. */
388 (void) dzmctl(sc, line, DML_BRK, DMBIC);
389
390 /* Do a hangup if so required. */
391 if ((tp->t_cflag & HUPCL) || tp->t_wopen || !(tp->t_state & TS_ISOPEN))
392 (void) dzmctl(sc, line, 0, DMSET);
393
394 return (ttyclose(tp));
395 }
396
397 int
398 dzread(dev_t dev, struct uio *uio, int flag)
399 {
400 struct tty *tp;
401 struct dz_softc *sc;
402
403 sc = dz_cd.cd_devs[DZ_I2C(minor(dev))];
404
405 tp = sc->sc_dz[DZ_PORT(minor(dev))].dz_tty;
406 return ((*tp->t_linesw->l_read)(tp, uio, flag));
407 }
408
409 int
410 dzwrite(dev_t dev, struct uio *uio, int flag)
411 {
412 struct tty *tp;
413 struct dz_softc *sc;
414
415 sc = dz_cd.cd_devs[DZ_I2C(minor(dev))];
416
417 tp = sc->sc_dz[DZ_PORT(minor(dev))].dz_tty;
418 return ((*tp->t_linesw->l_write)(tp, uio, flag));
419 }
420
421 int
422 dzpoll(dev, events, p)
423 dev_t dev;
424 int events;
425 struct proc *p;
426 {
427 struct tty *tp;
428 struct dz_softc *sc;
429
430 sc = dz_cd.cd_devs[DZ_I2C(minor(dev))];
431
432 tp = sc->sc_dz[DZ_PORT(minor(dev))].dz_tty;
433 return ((*tp->t_linesw->l_poll)(tp, events, p));
434 }
435
436 /*ARGSUSED*/
437 int
438 dzioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct proc *p)
439 {
440 struct dz_softc *sc;
441 struct tty *tp;
442 int unit, line;
443 int error;
444
445 unit = DZ_I2C(minor(dev));
446 line = DZ_PORT(minor(dev));
447 sc = dz_cd.cd_devs[unit];
448 tp = sc->sc_dz[line].dz_tty;
449
450 error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, p);
451 if (error >= 0)
452 return (error);
453
454 error = ttioctl(tp, cmd, data, flag, p);
455 if (error >= 0)
456 return (error);
457
458 switch (cmd) {
459
460 case TIOCSBRK:
461 (void) dzmctl(sc, line, DML_BRK, DMBIS);
462 break;
463
464 case TIOCCBRK:
465 (void) dzmctl(sc, line, DML_BRK, DMBIC);
466 break;
467
468 case TIOCSDTR:
469 (void) dzmctl(sc, line, DML_DTR, DMBIS);
470 break;
471
472 case TIOCCDTR:
473 (void) dzmctl(sc, line, DML_DTR, DMBIC);
474 break;
475
476 case TIOCMSET:
477 (void) dzmctl(sc, line, *(int *)data, DMSET);
478 break;
479
480 case TIOCMBIS:
481 (void) dzmctl(sc, line, *(int *)data, DMBIS);
482 break;
483
484 case TIOCMBIC:
485 (void) dzmctl(sc, line, *(int *)data, DMBIC);
486 break;
487
488 case TIOCMGET:
489 *(int *)data = (dzmctl(sc, line, 0, DMGET) & ~DML_BRK);
490 break;
491
492 default:
493 return (EPASSTHROUGH);
494 }
495 return (0);
496 }
497
498 struct tty *
499 dztty(dev_t dev)
500 {
501 struct dz_softc *sc = dz_cd.cd_devs[DZ_I2C(minor(dev))];
502 struct tty *tp = sc->sc_dz[DZ_PORT(minor(dev))].dz_tty;
503
504 return (tp);
505 }
506
507 /*ARGSUSED*/
508 void
509 dzstop(struct tty *tp, int flag)
510 {
511 if (tp->t_state & TS_BUSY)
512 if (!(tp->t_state & TS_TTSTOP))
513 tp->t_state |= TS_FLUSH;
514 }
515
516 void
517 dzstart(struct tty *tp)
518 {
519 struct dz_softc *sc;
520 struct clist *cl;
521 int unit, line, s;
522 char state;
523
524 unit = DZ_I2C(minor(tp->t_dev));
525 line = DZ_PORT(minor(tp->t_dev));
526 sc = dz_cd.cd_devs[unit];
527
528 s = spltty();
529 if (tp->t_state & (TS_TIMEOUT|TS_BUSY|TS_TTSTOP))
530 return;
531 cl = &tp->t_outq;
532 if (cl->c_cc <= tp->t_lowat) {
533 if (tp->t_state & TS_ASLEEP) {
534 tp->t_state &= ~TS_ASLEEP;
535 wakeup((caddr_t)cl);
536 }
537 selwakeup(&tp->t_wsel);
538 }
539 if (cl->c_cc == 0)
540 return;
541
542 tp->t_state |= TS_BUSY;
543
544 state = DZ_READ_WORD(dr_tcrw) & 255;
545 if ((state & (1 << line)) == 0) {
546 DZ_WRITE_BYTE(dr_tcr, state | (1 << line));
547 }
548 dzxint(sc);
549 splx(s);
550 }
551
552 static int
553 dzparam(struct tty *tp, struct termios *t)
554 {
555 struct dz_softc *sc;
556 int cflag = t->c_cflag;
557 int unit, line;
558 int ispeed = ttspeedtab(t->c_ispeed, dzspeedtab);
559 int ospeed = ttspeedtab(t->c_ospeed, dzspeedtab);
560 unsigned lpr;
561 int s;
562
563 unit = DZ_I2C(minor(tp->t_dev));
564 line = DZ_PORT(minor(tp->t_dev));
565 sc = dz_cd.cd_devs[unit];
566
567 /* check requested parameters */
568 if (ospeed < 0 || ispeed < 0 || ispeed != ospeed)
569 return (EINVAL);
570
571 tp->t_ispeed = t->c_ispeed;
572 tp->t_ospeed = t->c_ospeed;
573 tp->t_cflag = cflag;
574
575 if (ospeed == 0) {
576 (void) dzmctl(sc, line, 0, DMSET); /* hang up line */
577 return (0);
578 }
579
580 s = spltty();
581
582 lpr = DZ_LPR_RX_ENABLE | ((ispeed&0xF)<<8) | line;
583
584 switch (cflag & CSIZE)
585 {
586 case CS5:
587 lpr |= DZ_LPR_5_BIT_CHAR;
588 break;
589 case CS6:
590 lpr |= DZ_LPR_6_BIT_CHAR;
591 break;
592 case CS7:
593 lpr |= DZ_LPR_7_BIT_CHAR;
594 break;
595 default:
596 lpr |= DZ_LPR_8_BIT_CHAR;
597 break;
598 }
599 if (cflag & PARENB)
600 lpr |= DZ_LPR_PARENB;
601 if (cflag & PARODD)
602 lpr |= DZ_LPR_OPAR;
603 if (cflag & CSTOPB)
604 lpr |= DZ_LPR_2_STOP;
605
606 DZ_WRITE_WORD(dr_lpr, lpr);
607
608 (void) splx(s);
609 return (0);
610 }
611
612 static unsigned
613 dzmctl(struct dz_softc *sc, int line, int bits, int how)
614 {
615 unsigned status;
616 unsigned mbits;
617 unsigned bit;
618 int s;
619
620 s = spltty();
621
622 mbits = 0;
623
624 bit = (1 << line);
625
626 /* external signals as seen from the port */
627
628 status = DZ_READ_BYTE(dr_dcd) | sc->sc_dsr;
629
630 if (status & bit)
631 mbits |= DML_DCD;
632
633 status = DZ_READ_BYTE(dr_ring);
634
635 if (status & bit)
636 mbits |= DML_RI;
637
638 /* internal signals/state delivered to port */
639
640 status = DZ_READ_BYTE(dr_dtr);
641
642 if (status & bit)
643 mbits |= DML_DTR;
644
645 if (sc->sc_brk & bit)
646 mbits |= DML_BRK;
647
648 switch (how)
649 {
650 case DMSET:
651 mbits = bits;
652 break;
653
654 case DMBIS:
655 mbits |= bits;
656 break;
657
658 case DMBIC:
659 mbits &= ~bits;
660 break;
661
662 case DMGET:
663 (void) splx(s);
664 return (mbits);
665 }
666
667 if (mbits & DML_DTR) {
668 DZ_WRITE_BYTE(dr_dtr, DZ_READ_BYTE(dr_dtr) | bit);
669 } else {
670 DZ_WRITE_BYTE(dr_dtr, DZ_READ_BYTE(dr_dtr) & ~bit);
671 }
672
673 if (mbits & DML_BRK) {
674 sc->sc_brk |= bit;
675 DZ_WRITE_BYTE(dr_break, sc->sc_brk);
676 } else {
677 sc->sc_brk &= ~bit;
678 DZ_WRITE_BYTE(dr_break, sc->sc_brk);
679 }
680
681 (void) splx(s);
682 return (mbits);
683 }
684
685 /*
686 * This is called by timeout() periodically.
687 * Check to see if modem status bits have changed.
688 */
689 static void
690 dzscan(void *arg)
691 {
692 struct dz_softc *sc;
693 struct tty *tp;
694 int n, bit, port;
695 unsigned csr;
696 int s;
697
698 s = spltty();
699
700 for (n = 0; n < dz_cd.cd_ndevs; n++) {
701
702 if (dz_cd.cd_devs[n] == NULL)
703 continue;
704
705 sc = dz_cd.cd_devs[n];
706
707 for (port = 0; port < sc->sc_type; port++) {
708
709 tp = sc->sc_dz[port].dz_tty;
710 bit = (1 << port);
711
712 if ((DZ_READ_BYTE(dr_dcd) | sc->sc_dsr) & bit) {
713 if (!(tp->t_state & TS_CARR_ON))
714 (*tp->t_linesw->l_modem) (tp, 1);
715 } else if ((tp->t_state & TS_CARR_ON) &&
716 (*tp->t_linesw->l_modem)(tp, 0) == 0) {
717 DZ_WRITE_BYTE(dr_tcr,
718 (DZ_READ_WORD(dr_tcrw) & 255) & ~bit);
719 }
720 }
721
722 /*
723 * If the RX interrupt rate is this high, switch
724 * the controller to Silo Alarm - which means don't
725 * interrupt until the RX silo has 16 characters in
726 * it (the silo is 64 characters in all).
727 * Avoid oscillating SA on and off by not turning
728 * if off unless the rate is appropriately low.
729 */
730
731 csr = DZ_READ_WORD(dr_csr);
732
733 if (sc->sc_rxint > (16*10)) {
734 if ((csr & DZ_CSR_SAE) == 0)
735 DZ_WRITE_WORD(dr_csr, csr | DZ_CSR_SAE);
736 } else if ((csr & DZ_CSR_SAE) != 0)
737 if (sc->sc_rxint < 10)
738 DZ_WRITE_WORD(dr_csr, csr & ~(DZ_CSR_SAE));
739
740 sc->sc_rxint = 0;
741 }
742 (void) splx(s);
743 callout_reset(&dzscan_ch, hz, dzscan, NULL);
744 }
745
746 /*
747 * Called after an ubareset. The DZ card is reset, but the only thing
748 * that must be done is to start the receiver and transmitter again.
749 * No DMA setup to care about.
750 */
751 void
752 dzreset(struct device *dev)
753 {
754 struct dz_softc *sc = (void *)dev;
755 struct tty *tp;
756 int i;
757
758 for (i = 0; i < sc->sc_type; i++) {
759 tp = sc->sc_dz[i].dz_tty;
760
761 if (((tp->t_state & TS_ISOPEN) == 0) || (tp->t_wopen == 0))
762 continue;
763
764 dzparam(tp, &tp->t_termios);
765 dzmctl(sc, i, DML_DTR, DMSET);
766 tp->t_state &= ~TS_BUSY;
767 dzstart(tp); /* Kick off transmitter again */
768 }
769 }
770