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dz.c revision 1.12
      1 /*	$NetBSD: dz.c,v 1.12 2003/12/09 14:30:55 ad Exp $	*/
      2 /*
      3  * Copyright (c) 1992, 1993
      4  *	The Regents of the University of California.  All rights reserved.
      5  *
      6  * This code is derived from software contributed to Berkeley by
      7  * Ralph Campbell and Rick Macklem.
      8  *
      9  * Redistribution and use in source and binary forms, with or without
     10  * modification, are permitted provided that the following conditions
     11  * are met:
     12  * 1. Redistributions of source code must retain the above copyright
     13  *    notice, this list of conditions and the following disclaimer.
     14  * 2. Redistributions in binary form must reproduce the above copyright
     15  *    notice, this list of conditions and the following disclaimer in the
     16  *    documentation and/or other materials provided with the distribution.
     17  * 3. Neither the name of the University nor the names of its contributors
     18  *    may be used to endorse or promote products derived from this software
     19  *    without specific prior written permission.
     20  *
     21  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     22  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     23  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     24  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     25  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     26  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     27  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     28  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     29  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     30  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     31  * SUCH DAMAGE.
     32  */
     33 
     34 /*
     35  * Copyright (c) 1996  Ken C. Wellsch.  All rights reserved.
     36  *
     37  * This code is derived from software contributed to Berkeley by
     38  * Ralph Campbell and Rick Macklem.
     39  *
     40  * Redistribution and use in source and binary forms, with or without
     41  * modification, are permitted provided that the following conditions
     42  * are met:
     43  * 1. Redistributions of source code must retain the above copyright
     44  *    notice, this list of conditions and the following disclaimer.
     45  * 2. Redistributions in binary form must reproduce the above copyright
     46  *    notice, this list of conditions and the following disclaimer in the
     47  *    documentation and/or other materials provided with the distribution.
     48  * 3. All advertising materials mentioning features or use of this software
     49  *    must display the following acknowledgement:
     50  *	This product includes software developed by the University of
     51  *	California, Berkeley and its contributors.
     52  * 4. Neither the name of the University nor the names of its contributors
     53  *    may be used to endorse or promote products derived from this software
     54  *    without specific prior written permission.
     55  *
     56  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     57  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     58  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     59  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     60  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     61  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     62  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     63  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     64  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     65  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     66  * SUCH DAMAGE.
     67  */
     68 
     69 #include <sys/cdefs.h>
     70 __KERNEL_RCSID(0, "$NetBSD: dz.c,v 1.12 2003/12/09 14:30:55 ad Exp $");
     71 
     72 #include <sys/param.h>
     73 #include <sys/systm.h>
     74 #include <sys/callout.h>
     75 #include <sys/ioctl.h>
     76 #include <sys/tty.h>
     77 #include <sys/proc.h>
     78 #include <sys/buf.h>
     79 #include <sys/conf.h>
     80 #include <sys/file.h>
     81 #include <sys/uio.h>
     82 #include <sys/kernel.h>
     83 #include <sys/syslog.h>
     84 #include <sys/device.h>
     85 
     86 #include <machine/bus.h>
     87 
     88 #include <dev/dec/dzreg.h>
     89 #include <dev/dec/dzvar.h>
     90 
     91 #include <dev/cons.h>
     92 
     93 #define	DZ_READ_BYTE(adr) \
     94 	bus_space_read_1(sc->sc_iot, sc->sc_ioh, sc->sc_dr.adr)
     95 #define	DZ_READ_WORD(adr) \
     96 	bus_space_read_2(sc->sc_iot, sc->sc_ioh, sc->sc_dr.adr)
     97 #define	DZ_WRITE_BYTE(adr, val) \
     98 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, sc->sc_dr.adr, val)
     99 #define	DZ_WRITE_WORD(adr, val) \
    100 	bus_space_write_2(sc->sc_iot, sc->sc_ioh, sc->sc_dr.adr, val)
    101 
    102 #include "ioconf.h"
    103 
    104 /* Flags used to monitor modem bits, make them understood outside driver */
    105 
    106 #define DML_DTR		TIOCM_DTR
    107 #define DML_DCD		TIOCM_CD
    108 #define DML_RI		TIOCM_RI
    109 #define DML_BRK		0100000		/* no equivalent, we will mask */
    110 
    111 static struct speedtab dzspeedtab[] =
    112 {
    113   {       0,	0		},
    114   {      50,	DZ_LPR_B50	},
    115   {      75,	DZ_LPR_B75	},
    116   {     110,	DZ_LPR_B110	},
    117   {     134,	DZ_LPR_B134	},
    118   {     150,	DZ_LPR_B150	},
    119   {     300,	DZ_LPR_B300	},
    120   {     600,	DZ_LPR_B600	},
    121   {    1200,	DZ_LPR_B1200	},
    122   {    1800,	DZ_LPR_B1800	},
    123   {    2000,	DZ_LPR_B2000	},
    124   {    2400,	DZ_LPR_B2400	},
    125   {    3600,	DZ_LPR_B3600	},
    126   {    4800,	DZ_LPR_B4800	},
    127   {    7200,	DZ_LPR_B7200	},
    128   {    9600,	DZ_LPR_B9600	},
    129   {   19200,	DZ_LPR_B19200	},
    130   {      -1,	-1		}
    131 };
    132 
    133 static void	dzstart(struct tty *);
    134 static int	dzparam(struct tty *, struct termios *);
    135 static unsigned	dzmctl(struct dz_softc *, int, int, int);
    136 static void	dzscan(void *);
    137 
    138 dev_type_open(dzopen);
    139 dev_type_close(dzclose);
    140 dev_type_read(dzread);
    141 dev_type_write(dzwrite);
    142 dev_type_ioctl(dzioctl);
    143 dev_type_stop(dzstop);
    144 dev_type_tty(dztty);
    145 dev_type_poll(dzpoll);
    146 
    147 const struct cdevsw dz_cdevsw = {
    148 	dzopen, dzclose, dzread, dzwrite, dzioctl,
    149 	dzstop, dztty, dzpoll, nommap, ttykqfilter, D_TTY
    150 };
    151 
    152 /*
    153  * The DZ series doesn't interrupt on carrier transitions,
    154  * so we have to use a timer to watch it.
    155  */
    156 int	dz_timer;	/* true if timer started */
    157 struct callout dzscan_ch;
    158 static struct cnm_state dz_cnm_state;
    159 
    160 void
    161 dzattach(struct dz_softc *sc, struct evcnt *parent_evcnt, int consline)
    162 {
    163 	int n;
    164 
    165 	sc->sc_rxint = sc->sc_brk = 0;
    166 	sc->sc_consline = consline;
    167 
    168 	sc->sc_dr.dr_tcrw = sc->sc_dr.dr_tcr;
    169 	DZ_WRITE_WORD(dr_csr, DZ_CSR_MSE | DZ_CSR_RXIE | DZ_CSR_TXIE);
    170 	DZ_WRITE_BYTE(dr_dtr, 0);
    171 	DZ_WRITE_BYTE(dr_break, 0);
    172 
    173 	/* Initialize our softc structure. Should be done in open? */
    174 
    175 	for (n = 0; n < sc->sc_type; n++) {
    176 		sc->sc_dz[n].dz_sc = sc;
    177 		sc->sc_dz[n].dz_line = n;
    178 		sc->sc_dz[n].dz_tty = ttymalloc();
    179 	}
    180 
    181 	evcnt_attach_dynamic(&sc->sc_rintrcnt, EVCNT_TYPE_INTR, parent_evcnt,
    182 		sc->sc_dev.dv_xname, "rintr");
    183 	evcnt_attach_dynamic(&sc->sc_tintrcnt, EVCNT_TYPE_INTR, parent_evcnt,
    184 		sc->sc_dev.dv_xname, "tintr");
    185 
    186 	/* Console magic keys */
    187 	cn_init_magic(&dz_cnm_state);
    188 	cn_set_magic("\047\001"); /* default magic is BREAK */
    189 				  /* VAX will change it in MD code */
    190 
    191 	/* Alas no interrupt on modem bit changes, so we manually scan */
    192 
    193 	if (dz_timer == 0) {
    194 		dz_timer = 1;
    195 		callout_init(&dzscan_ch);
    196 		callout_reset(&dzscan_ch, hz, dzscan, NULL);
    197 	}
    198 	printf("\n");
    199 }
    200 
    201 /* Receiver Interrupt */
    202 
    203 void
    204 dzrint(void *arg)
    205 {
    206 	struct dz_softc *sc = arg;
    207 	struct tty *tp;
    208 	int cc, mcc, line;
    209 	unsigned c;
    210 	int overrun = 0;
    211 
    212 	sc->sc_rxint++;
    213 
    214 	while ((c = DZ_READ_WORD(dr_rbuf)) & DZ_RBUF_DATA_VALID) {
    215 		cc = c & 0xFF;
    216 		line = DZ_PORT(c>>8);
    217 		tp = sc->sc_dz[line].dz_tty;
    218 
    219 		/* Must be caught early */
    220 		if (sc->sc_dz[line].dz_catch &&
    221 		    (*sc->sc_dz[line].dz_catch)(sc->sc_dz[line].dz_private, cc))
    222 			continue;
    223 
    224 		if ((c & (DZ_RBUF_FRAMING_ERR | 0xff)) == DZ_RBUF_FRAMING_ERR)
    225 			mcc = CNC_BREAK;
    226 		else
    227 			mcc = cc;
    228 
    229 		cn_check_magic(tp->t_dev, mcc, dz_cnm_state);
    230 
    231 		if (!(tp->t_state & TS_ISOPEN)) {
    232 			wakeup((caddr_t)&tp->t_rawq);
    233 			continue;
    234 		}
    235 
    236 		if ((c & DZ_RBUF_OVERRUN_ERR) && overrun == 0) {
    237 			log(LOG_WARNING, "%s: silo overflow, line %d\n",
    238 			    sc->sc_dev.dv_xname, line);
    239 			overrun = 1;
    240 		}
    241 
    242 		if (c & DZ_RBUF_FRAMING_ERR)
    243 			cc |= TTY_FE;
    244 		if (c & DZ_RBUF_PARITY_ERR)
    245 			cc |= TTY_PE;
    246 
    247 		(*tp->t_linesw->l_rint)(cc, tp);
    248 	}
    249 }
    250 
    251 /* Transmitter Interrupt */
    252 
    253 void
    254 dzxint(void *arg)
    255 {
    256 	struct dz_softc *sc = arg;
    257 	struct tty *tp;
    258 	struct clist *cl;
    259 	int line, ch, csr;
    260 	u_char tcr;
    261 
    262 	/*
    263 	 * Switch to POLLED mode.
    264 	 *   Some simple measurements indicated that even on
    265 	 *  one port, by freeing the scanner in the controller
    266 	 *  by either providing a character or turning off
    267 	 *  the port when output is complete, the transmitter
    268 	 *  was ready to accept more output when polled again.
    269 	 *   With just two ports running the game "worms,"
    270 	 *  almost every interrupt serviced both transmitters!
    271 	 *   Each UART is double buffered, so if the scanner
    272 	 *  is quick enough and timing works out, we can even
    273 	 *  feed the same port twice.
    274 	 *
    275 	 * Ragge 980517:
    276 	 * Do not need to turn off interrupts, already at interrupt level.
    277 	 * Remove the pdma stuff; no great need of it right now.
    278 	 */
    279 
    280 	while (((csr = DZ_READ_WORD(dr_csr)) & DZ_CSR_TX_READY) != 0) {
    281 
    282 		line = DZ_PORT(csr>>8);
    283 
    284 		tp = sc->sc_dz[line].dz_tty;
    285 		cl = &tp->t_outq;
    286 		tp->t_state &= ~TS_BUSY;
    287 
    288 		/* Just send out a char if we have one */
    289 		/* As long as we can fill the chip buffer, we just loop here */
    290 		if (cl->c_cc) {
    291 			tp->t_state |= TS_BUSY;
    292 			ch = getc(cl);
    293 			DZ_WRITE_BYTE(dr_tbuf, ch);
    294 			continue;
    295 		}
    296 		/* Nothing to send; clear the scan bit */
    297 		/* Clear xmit scanner bit; dzstart may set it again */
    298 		tcr = DZ_READ_WORD(dr_tcrw);
    299 		tcr &= 255;
    300 		tcr &= ~(1 << line);
    301 		DZ_WRITE_BYTE(dr_tcr, tcr);
    302 		if (sc->sc_dz[line].dz_catch)
    303 			continue;
    304 
    305 		if (tp->t_state & TS_FLUSH)
    306 			tp->t_state &= ~TS_FLUSH;
    307 		else
    308 			ndflush (&tp->t_outq, cl->c_cc);
    309 
    310 		(*tp->t_linesw->l_start)(tp);
    311 	}
    312 }
    313 
    314 int
    315 dzopen(dev_t dev, int flag, int mode, struct proc *p)
    316 {
    317 	struct tty *tp;
    318 	int unit, line;
    319 	struct	dz_softc *sc;
    320 	int s, error = 0;
    321 
    322 	unit = DZ_I2C(minor(dev));
    323 	line = DZ_PORT(minor(dev));
    324 	if (unit >= dz_cd.cd_ndevs ||  dz_cd.cd_devs[unit] == NULL)
    325 		return (ENXIO);
    326 
    327 	sc = dz_cd.cd_devs[unit];
    328 
    329 	if (line >= sc->sc_type)
    330 		return ENXIO;
    331 
    332 	/* if some other device is using the line, it's busy */
    333 	if (sc->sc_dz[line].dz_catch)
    334 		return EBUSY;
    335 
    336 	tp = sc->sc_dz[line].dz_tty;
    337 	if (tp == NULL)
    338 		return (ENODEV);
    339 	tp->t_oproc   = dzstart;
    340 	tp->t_param   = dzparam;
    341 	tp->t_dev = dev;
    342 	if ((tp->t_state & TS_ISOPEN) == 0) {
    343 		ttychars(tp);
    344 		if (tp->t_ispeed == 0) {
    345 			tp->t_iflag = TTYDEF_IFLAG;
    346 			tp->t_oflag = TTYDEF_OFLAG;
    347 			tp->t_cflag = TTYDEF_CFLAG;
    348 			tp->t_lflag = TTYDEF_LFLAG;
    349 			tp->t_ispeed = tp->t_ospeed = TTYDEF_SPEED;
    350 		}
    351 		(void) dzparam(tp, &tp->t_termios);
    352 		ttsetwater(tp);
    353 	} else if ((tp->t_state & TS_XCLUDE) && p->p_ucred->cr_uid != 0)
    354 		return (EBUSY);
    355 	/* Use DMBIS and *not* DMSET or else we clobber incoming bits */
    356 	if (dzmctl(sc, line, DML_DTR, DMBIS) & DML_DCD)
    357 		tp->t_state |= TS_CARR_ON;
    358 	s = spltty();
    359 	while (!(flag & O_NONBLOCK) && !(tp->t_cflag & CLOCAL) &&
    360 	       !(tp->t_state & TS_CARR_ON)) {
    361 		tp->t_wopen++;
    362 		error = ttysleep(tp, (caddr_t)&tp->t_rawq,
    363 				TTIPRI | PCATCH, ttopen, 0);
    364 		tp->t_wopen--;
    365 		if (error)
    366 			break;
    367 	}
    368 	(void) splx(s);
    369 	if (error)
    370 		return (error);
    371 	return ((*tp->t_linesw->l_open)(dev, tp));
    372 }
    373 
    374 /*ARGSUSED*/
    375 int
    376 dzclose(dev_t dev, int flag, int mode, struct proc *p)
    377 {
    378 	struct	dz_softc *sc;
    379 	struct tty *tp;
    380 	int unit, line;
    381 
    382 
    383 	unit = DZ_I2C(minor(dev));
    384 	line = DZ_PORT(minor(dev));
    385 	sc = dz_cd.cd_devs[unit];
    386 
    387 	tp = sc->sc_dz[line].dz_tty;
    388 
    389 	(*tp->t_linesw->l_close)(tp, flag);
    390 
    391 	/* Make sure a BREAK state is not left enabled. */
    392 	(void) dzmctl(sc, line, DML_BRK, DMBIC);
    393 
    394 	/* Do a hangup if so required. */
    395 	if ((tp->t_cflag & HUPCL) || tp->t_wopen || !(tp->t_state & TS_ISOPEN))
    396 		(void) dzmctl(sc, line, 0, DMSET);
    397 
    398 	return (ttyclose(tp));
    399 }
    400 
    401 int
    402 dzread(dev_t dev, struct uio *uio, int flag)
    403 {
    404 	struct tty *tp;
    405 	struct	dz_softc *sc;
    406 
    407 	sc = dz_cd.cd_devs[DZ_I2C(minor(dev))];
    408 
    409 	tp = sc->sc_dz[DZ_PORT(minor(dev))].dz_tty;
    410 	return ((*tp->t_linesw->l_read)(tp, uio, flag));
    411 }
    412 
    413 int
    414 dzwrite(dev_t dev, struct uio *uio, int flag)
    415 {
    416 	struct tty *tp;
    417 	struct	dz_softc *sc;
    418 
    419 	sc = dz_cd.cd_devs[DZ_I2C(minor(dev))];
    420 
    421 	tp = sc->sc_dz[DZ_PORT(minor(dev))].dz_tty;
    422 	return ((*tp->t_linesw->l_write)(tp, uio, flag));
    423 }
    424 
    425 int
    426 dzpoll(dev, events, p)
    427 	dev_t dev;
    428 	int events;
    429 	struct proc *p;
    430 {
    431 	struct tty *tp;
    432 	struct	dz_softc *sc;
    433 
    434 	sc = dz_cd.cd_devs[DZ_I2C(minor(dev))];
    435 
    436 	tp = sc->sc_dz[DZ_PORT(minor(dev))].dz_tty;
    437 	return ((*tp->t_linesw->l_poll)(tp, events, p));
    438 }
    439 
    440 /*ARGSUSED*/
    441 int
    442 dzioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct proc *p)
    443 {
    444 	struct	dz_softc *sc;
    445 	struct tty *tp;
    446 	int unit, line;
    447 	int error;
    448 
    449 	unit = DZ_I2C(minor(dev));
    450 	line = DZ_PORT(minor(dev));
    451 	sc = dz_cd.cd_devs[unit];
    452 	tp = sc->sc_dz[line].dz_tty;
    453 
    454 	error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, p);
    455 	if (error >= 0)
    456 		return (error);
    457 
    458 	error = ttioctl(tp, cmd, data, flag, p);
    459 	if (error >= 0)
    460 		return (error);
    461 
    462 	switch (cmd) {
    463 
    464 	case TIOCSBRK:
    465 		(void) dzmctl(sc, line, DML_BRK, DMBIS);
    466 		break;
    467 
    468 	case TIOCCBRK:
    469 		(void) dzmctl(sc, line, DML_BRK, DMBIC);
    470 		break;
    471 
    472 	case TIOCSDTR:
    473 		(void) dzmctl(sc, line, DML_DTR, DMBIS);
    474 		break;
    475 
    476 	case TIOCCDTR:
    477 		(void) dzmctl(sc, line, DML_DTR, DMBIC);
    478 		break;
    479 
    480 	case TIOCMSET:
    481 		(void) dzmctl(sc, line, *(int *)data, DMSET);
    482 		break;
    483 
    484 	case TIOCMBIS:
    485 		(void) dzmctl(sc, line, *(int *)data, DMBIS);
    486 		break;
    487 
    488 	case TIOCMBIC:
    489 		(void) dzmctl(sc, line, *(int *)data, DMBIC);
    490 		break;
    491 
    492 	case TIOCMGET:
    493 		*(int *)data = (dzmctl(sc, line, 0, DMGET) & ~DML_BRK);
    494 		break;
    495 
    496 	default:
    497 		return (EPASSTHROUGH);
    498 	}
    499 	return (0);
    500 }
    501 
    502 struct tty *
    503 dztty(dev_t dev)
    504 {
    505 	struct	dz_softc *sc = dz_cd.cd_devs[DZ_I2C(minor(dev))];
    506         struct tty *tp = sc->sc_dz[DZ_PORT(minor(dev))].dz_tty;
    507 
    508         return (tp);
    509 }
    510 
    511 /*ARGSUSED*/
    512 void
    513 dzstop(struct tty *tp, int flag)
    514 {
    515 	if (tp->t_state & TS_BUSY)
    516 		if (!(tp->t_state & TS_TTSTOP))
    517 			tp->t_state |= TS_FLUSH;
    518 }
    519 
    520 void
    521 dzstart(struct tty *tp)
    522 {
    523 	struct dz_softc *sc;
    524 	struct clist *cl;
    525 	int unit, line, s;
    526 	char state;
    527 
    528 	unit = DZ_I2C(minor(tp->t_dev));
    529 	line = DZ_PORT(minor(tp->t_dev));
    530 	sc = dz_cd.cd_devs[unit];
    531 
    532 	s = spltty();
    533 	if (tp->t_state & (TS_TIMEOUT|TS_BUSY|TS_TTSTOP))
    534 		return;
    535 	cl = &tp->t_outq;
    536 	if (cl->c_cc <= tp->t_lowat) {
    537 		if (tp->t_state & TS_ASLEEP) {
    538 			tp->t_state &= ~TS_ASLEEP;
    539 			wakeup((caddr_t)cl);
    540 		}
    541 		selwakeup(&tp->t_wsel);
    542 	}
    543 	if (cl->c_cc == 0)
    544 		return;
    545 
    546 	tp->t_state |= TS_BUSY;
    547 
    548 	state = DZ_READ_WORD(dr_tcrw) & 255;
    549 	if ((state & (1 << line)) == 0) {
    550 		DZ_WRITE_BYTE(dr_tcr, state | (1 << line));
    551 	}
    552 	dzxint(sc);
    553 	splx(s);
    554 }
    555 
    556 static int
    557 dzparam(struct tty *tp, struct termios *t)
    558 {
    559 	struct	dz_softc *sc;
    560 	int cflag = t->c_cflag;
    561 	int unit, line;
    562 	int ispeed = ttspeedtab(t->c_ispeed, dzspeedtab);
    563 	int ospeed = ttspeedtab(t->c_ospeed, dzspeedtab);
    564 	unsigned lpr;
    565 	int s;
    566 
    567 	unit = DZ_I2C(minor(tp->t_dev));
    568 	line = DZ_PORT(minor(tp->t_dev));
    569 	sc = dz_cd.cd_devs[unit];
    570 
    571 	/* check requested parameters */
    572         if (ospeed < 0 || ispeed < 0 || ispeed != ospeed)
    573                 return (EINVAL);
    574 
    575         tp->t_ispeed = t->c_ispeed;
    576         tp->t_ospeed = t->c_ospeed;
    577         tp->t_cflag = cflag;
    578 
    579 	if (ospeed == 0) {
    580 		(void) dzmctl(sc, line, 0, DMSET);	/* hang up line */
    581 		return (0);
    582 	}
    583 
    584 	s = spltty();
    585 
    586 	lpr = DZ_LPR_RX_ENABLE | ((ispeed&0xF)<<8) | line;
    587 
    588 	switch (cflag & CSIZE)
    589 	{
    590 	  case CS5:
    591 		lpr |= DZ_LPR_5_BIT_CHAR;
    592 		break;
    593 	  case CS6:
    594 		lpr |= DZ_LPR_6_BIT_CHAR;
    595 		break;
    596 	  case CS7:
    597 		lpr |= DZ_LPR_7_BIT_CHAR;
    598 		break;
    599 	  default:
    600 		lpr |= DZ_LPR_8_BIT_CHAR;
    601 		break;
    602 	}
    603 	if (cflag & PARENB)
    604 		lpr |= DZ_LPR_PARENB;
    605 	if (cflag & PARODD)
    606 		lpr |= DZ_LPR_OPAR;
    607 	if (cflag & CSTOPB)
    608 		lpr |= DZ_LPR_2_STOP;
    609 
    610 	DZ_WRITE_WORD(dr_lpr, lpr);
    611 
    612 	(void) splx(s);
    613 	return (0);
    614 }
    615 
    616 static unsigned
    617 dzmctl(struct dz_softc *sc, int line, int bits, int how)
    618 {
    619 	unsigned status;
    620 	unsigned mbits;
    621 	unsigned bit;
    622 	int s;
    623 
    624 	s = spltty();
    625 
    626 	mbits = 0;
    627 
    628 	bit = (1 << line);
    629 
    630 	/* external signals as seen from the port */
    631 
    632 	status = DZ_READ_BYTE(dr_dcd) | sc->sc_dsr;
    633 
    634 	if (status & bit)
    635 		mbits |= DML_DCD;
    636 
    637 	status = DZ_READ_BYTE(dr_ring);
    638 
    639 	if (status & bit)
    640 		mbits |= DML_RI;
    641 
    642 	/* internal signals/state delivered to port */
    643 
    644 	status = DZ_READ_BYTE(dr_dtr);
    645 
    646 	if (status & bit)
    647 		mbits |= DML_DTR;
    648 
    649 	if (sc->sc_brk & bit)
    650 		mbits |= DML_BRK;
    651 
    652 	switch (how)
    653 	{
    654 	  case DMSET:
    655 		mbits = bits;
    656 		break;
    657 
    658 	  case DMBIS:
    659 		mbits |= bits;
    660 		break;
    661 
    662 	  case DMBIC:
    663 		mbits &= ~bits;
    664 		break;
    665 
    666 	  case DMGET:
    667 		(void) splx(s);
    668 		return (mbits);
    669 	}
    670 
    671 	if (mbits & DML_DTR) {
    672 		DZ_WRITE_BYTE(dr_dtr, DZ_READ_BYTE(dr_dtr) | bit);
    673 	} else {
    674 		DZ_WRITE_BYTE(dr_dtr, DZ_READ_BYTE(dr_dtr) & ~bit);
    675 	}
    676 
    677 	if (mbits & DML_BRK) {
    678 		sc->sc_brk |= bit;
    679 		DZ_WRITE_BYTE(dr_break, sc->sc_brk);
    680 	} else {
    681 		sc->sc_brk &= ~bit;
    682 		DZ_WRITE_BYTE(dr_break, sc->sc_brk);
    683 	}
    684 
    685 	(void) splx(s);
    686 	return (mbits);
    687 }
    688 
    689 /*
    690  * This is called by timeout() periodically.
    691  * Check to see if modem status bits have changed.
    692  */
    693 static void
    694 dzscan(void *arg)
    695 {
    696 	struct dz_softc *sc;
    697 	struct tty *tp;
    698 	int n, bit, port;
    699 	unsigned csr;
    700 	int s;
    701 
    702 	s = spltty();
    703 
    704 	for (n = 0; n < dz_cd.cd_ndevs; n++) {
    705 
    706 		if (dz_cd.cd_devs[n] == NULL)
    707 			continue;
    708 
    709 		sc = dz_cd.cd_devs[n];
    710 
    711 		for (port = 0; port < sc->sc_type; port++) {
    712 
    713 			tp = sc->sc_dz[port].dz_tty;
    714 			bit = (1 << port);
    715 
    716 			if ((DZ_READ_BYTE(dr_dcd) | sc->sc_dsr) & bit) {
    717 				if (!(tp->t_state & TS_CARR_ON))
    718 					(*tp->t_linesw->l_modem) (tp, 1);
    719 			} else if ((tp->t_state & TS_CARR_ON) &&
    720 			    (*tp->t_linesw->l_modem)(tp, 0) == 0) {
    721 				DZ_WRITE_BYTE(dr_tcr,
    722 				    (DZ_READ_WORD(dr_tcrw) & 255) & ~bit);
    723 			}
    724 	    	}
    725 
    726 		/*
    727 		 *  If the RX interrupt rate is this high, switch
    728 		 *  the controller to Silo Alarm - which means don't
    729 	 	 *  interrupt until the RX silo has 16 characters in
    730 	 	 *  it (the silo is 64 characters in all).
    731 		 *  Avoid oscillating SA on and off by not turning
    732 		 *  if off unless the rate is appropriately low.
    733 		 */
    734 
    735 		csr = DZ_READ_WORD(dr_csr);
    736 
    737 		if (sc->sc_rxint > (16*10)) {
    738 			if ((csr & DZ_CSR_SAE) == 0)
    739 				DZ_WRITE_WORD(dr_csr, csr | DZ_CSR_SAE);
    740 	    	} else if ((csr & DZ_CSR_SAE) != 0)
    741 			if (sc->sc_rxint < 10)
    742 				DZ_WRITE_WORD(dr_csr, csr & ~(DZ_CSR_SAE));
    743 
    744 		sc->sc_rxint = 0;
    745 	}
    746 	(void) splx(s);
    747 	callout_reset(&dzscan_ch, hz, dzscan, NULL);
    748 }
    749 
    750 /*
    751  * Called after an ubareset. The DZ card is reset, but the only thing
    752  * that must be done is to start the receiver and transmitter again.
    753  * No DMA setup to care about.
    754  */
    755 void
    756 dzreset(struct device *dev)
    757 {
    758 	struct dz_softc *sc = (void *)dev;
    759 	struct tty *tp;
    760 	int i;
    761 
    762 	for (i = 0; i < sc->sc_type; i++) {
    763 		tp = sc->sc_dz[i].dz_tty;
    764 
    765 		if (((tp->t_state & TS_ISOPEN) == 0) || (tp->t_wopen == 0))
    766 			continue;
    767 
    768 		dzparam(tp, &tp->t_termios);
    769 		dzmctl(sc, i, DML_DTR, DMSET);
    770 		tp->t_state &= ~TS_BUSY;
    771 		dzstart(tp);	/* Kick off transmitter again */
    772 	}
    773 }
    774