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dz.c revision 1.6 
      1 /*	$NetBSD: dz.c,v 1.6 2002/09/19 23:22:56 ad Exp $	*/
      2 /*
      3  * Copyright (c) 1996  Ken C. Wellsch.  All rights reserved.
      4  * Copyright (c) 1992, 1993
      5  *	The Regents of the University of California.  All rights reserved.
      6  *
      7  * This code is derived from software contributed to Berkeley by
      8  * Ralph Campbell and Rick Macklem.
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  * 3. All advertising materials mentioning features or use of this software
     19  *    must display the following acknowledgement:
     20  *	This product includes software developed by the University of
     21  *	California, Berkeley and its contributors.
     22  * 4. Neither the name of the University nor the names of its contributors
     23  *    may be used to endorse or promote products derived from this software
     24  *    without specific prior written permission.
     25  *
     26  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     27  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     28  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     29  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     30  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     31  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     32  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     33  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     34  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     35  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     36  * SUCH DAMAGE.
     37  */
     38 
     39 #include <sys/cdefs.h>
     40 __KERNEL_RCSID(0, "$NetBSD: dz.c,v 1.6 2002/09/19 23:22:56 ad Exp $");
     41 
     42 #include "opt_ddb.h"
     43 
     44 #include <sys/param.h>
     45 #include <sys/systm.h>
     46 #include <sys/callout.h>
     47 #include <sys/ioctl.h>
     48 #include <sys/tty.h>
     49 #include <sys/proc.h>
     50 #include <sys/map.h>
     51 #include <sys/buf.h>
     52 #include <sys/conf.h>
     53 #include <sys/file.h>
     54 #include <sys/uio.h>
     55 #include <sys/kernel.h>
     56 #include <sys/syslog.h>
     57 #include <sys/device.h>
     58 
     59 #include <machine/bus.h>
     60 
     61 #include <dev/dec/dzreg.h>
     62 #include <dev/dec/dzvar.h>
     63 
     64 #define	DZ_READ_BYTE(adr) \
     65 	bus_space_read_1(sc->sc_iot, sc->sc_ioh, sc->sc_dr.adr)
     66 #define	DZ_READ_WORD(adr) \
     67 	bus_space_read_2(sc->sc_iot, sc->sc_ioh, sc->sc_dr.adr)
     68 #define	DZ_WRITE_BYTE(adr, val) \
     69 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, sc->sc_dr.adr, val)
     70 #define	DZ_WRITE_WORD(adr, val) \
     71 	bus_space_write_2(sc->sc_iot, sc->sc_ioh, sc->sc_dr.adr, val)
     72 
     73 #include "ioconf.h"
     74 
     75 /* Flags used to monitor modem bits, make them understood outside driver */
     76 
     77 #define DML_DTR		TIOCM_DTR
     78 #define DML_DCD		TIOCM_CD
     79 #define DML_RI		TIOCM_RI
     80 #define DML_BRK		0100000		/* no equivalent, we will mask */
     81 
     82 static struct speedtab dzspeedtab[] =
     83 {
     84   {       0,	0		},
     85   {      50,	DZ_LPR_B50	},
     86   {      75,	DZ_LPR_B75	},
     87   {     110,	DZ_LPR_B110	},
     88   {     134,	DZ_LPR_B134	},
     89   {     150,	DZ_LPR_B150	},
     90   {     300,	DZ_LPR_B300	},
     91   {     600,	DZ_LPR_B600	},
     92   {    1200,	DZ_LPR_B1200	},
     93   {    1800,	DZ_LPR_B1800	},
     94   {    2000,	DZ_LPR_B2000	},
     95   {    2400,	DZ_LPR_B2400	},
     96   {    3600,	DZ_LPR_B3600	},
     97   {    4800,	DZ_LPR_B4800	},
     98   {    7200,	DZ_LPR_B7200	},
     99   {    9600,	DZ_LPR_B9600	},
    100   {   19200,	DZ_LPR_B19200	},
    101   {      -1,	-1		}
    102 };
    103 
    104 static void	dzstart(struct tty *);
    105 static int	dzparam(struct tty *, struct termios *);
    106 static unsigned	dzmctl(struct dz_softc *, int, int, int);
    107 static void	dzscan(void *);
    108 
    109 dev_type_open(dzopen);
    110 dev_type_close(dzclose);
    111 dev_type_read(dzread);
    112 dev_type_write(dzwrite);
    113 dev_type_ioctl(dzioctl);
    114 dev_type_stop(dzstop);
    115 dev_type_tty(dztty);
    116 dev_type_poll(dzpoll);
    117 
    118 const struct cdevsw dz_cdevsw = {
    119 	dzopen, dzclose, dzread, dzwrite, dzioctl,
    120 	dzstop, dztty, dzpoll, nommap, D_TTY
    121 };
    122 
    123 /*
    124  * The DZ series doesn't interrupt on carrier transitions,
    125  * so we have to use a timer to watch it.
    126  */
    127 int	dz_timer;	/* true if timer started */
    128 struct callout dzscan_ch;
    129 
    130 #define DZ_DZ	8		/* Unibus DZ-11 board linecount */
    131 #define DZ_DZV	4		/* Q-bus DZV-11 or DZQ-11 */
    132 
    133 void
    134 dzattach(struct dz_softc *sc, struct evcnt *parent_evcnt)
    135 {
    136 	int n;
    137 
    138 	sc->sc_rxint = sc->sc_brk = 0;
    139 
    140 	sc->sc_dr.dr_tcrw = sc->sc_dr.dr_tcr;
    141 	DZ_WRITE_WORD(dr_csr, DZ_CSR_MSE | DZ_CSR_RXIE | DZ_CSR_TXIE);
    142 	DZ_WRITE_BYTE(dr_dtr, 0);
    143 	DZ_WRITE_BYTE(dr_break, 0);
    144 
    145 	/* Initialize our softc structure. Should be done in open? */
    146 
    147 	for (n = 0; n < sc->sc_type; n++) {
    148 		sc->sc_dz[n].dz_sc = sc;
    149 		sc->sc_dz[n].dz_line = n;
    150 		sc->sc_dz[n].dz_tty = ttymalloc();
    151 	}
    152 
    153 	evcnt_attach_dynamic(&sc->sc_rintrcnt, EVCNT_TYPE_INTR, parent_evcnt,
    154 		sc->sc_dev.dv_xname, "rintr");
    155 	evcnt_attach_dynamic(&sc->sc_tintrcnt, EVCNT_TYPE_INTR, parent_evcnt,
    156 		sc->sc_dev.dv_xname, "tintr");
    157 
    158 	/* Alas no interrupt on modem bit changes, so we manually scan */
    159 
    160 	if (dz_timer == 0) {
    161 		dz_timer = 1;
    162 		callout_init(&dzscan_ch);
    163 		callout_reset(&dzscan_ch, hz, dzscan, NULL);
    164 	}
    165 	printf("\n");
    166 	return;
    167 }
    168 
    169 /* Receiver Interrupt */
    170 
    171 void
    172 dzrint(void *arg)
    173 {
    174 	struct dz_softc *sc = arg;
    175 	struct tty *tp;
    176 	int cc, line;
    177 	unsigned c;
    178 	int overrun = 0;
    179 
    180 	sc->sc_rxint++;
    181 
    182 	while ((c = DZ_READ_WORD(dr_rbuf)) & DZ_RBUF_DATA_VALID) {
    183 		cc = c & 0xFF;
    184 		line = DZ_PORT(c>>8);
    185 		tp = sc->sc_dz[line].dz_tty;
    186 
    187 		/* Must be caught early */
    188 		if (sc->sc_dz[line].dz_catch &&
    189 		    (*sc->sc_dz[line].dz_catch)(sc->sc_dz[line].dz_private, cc))
    190 			continue;
    191 
    192 		if (!(tp->t_state & TS_ISOPEN)) {
    193 			wakeup((caddr_t)&tp->t_rawq);
    194 			continue;
    195 		}
    196 
    197 		if ((c & DZ_RBUF_OVERRUN_ERR) && overrun == 0) {
    198 			log(LOG_WARNING, "%s: silo overflow, line %d\n",
    199 			    sc->sc_dev.dv_xname, line);
    200 			overrun = 1;
    201 		}
    202 
    203 		/* A BREAK key will appear as a NULL with a framing error */
    204 		if (c & DZ_RBUF_FRAMING_ERR)
    205 			cc |= TTY_FE;
    206 		if (c & DZ_RBUF_PARITY_ERR)
    207 			cc |= TTY_PE;
    208 
    209 		(*tp->t_linesw->l_rint)(cc, tp);
    210 	}
    211 }
    212 
    213 /* Transmitter Interrupt */
    214 
    215 void
    216 dzxint(void *arg)
    217 {
    218 	struct dz_softc *sc = arg;
    219 	struct tty *tp;
    220 	struct clist *cl;
    221 	int line, ch, csr;
    222 	u_char tcr;
    223 
    224 	/*
    225 	 * Switch to POLLED mode.
    226 	 *   Some simple measurements indicated that even on
    227 	 *  one port, by freeing the scanner in the controller
    228 	 *  by either providing a character or turning off
    229 	 *  the port when output is complete, the transmitter
    230 	 *  was ready to accept more output when polled again.
    231 	 *   With just two ports running the game "worms,"
    232 	 *  almost every interrupt serviced both transmitters!
    233 	 *   Each UART is double buffered, so if the scanner
    234 	 *  is quick enough and timing works out, we can even
    235 	 *  feed the same port twice.
    236 	 *
    237 	 * Ragge 980517:
    238 	 * Do not need to turn off interrupts, already at interrupt level.
    239 	 * Remove the pdma stuff; no great need of it right now.
    240 	 */
    241 
    242 	while (((csr = DZ_READ_WORD(dr_csr)) & DZ_CSR_TX_READY) != 0) {
    243 
    244 		line = DZ_PORT(csr>>8);
    245 
    246 		tp = sc->sc_dz[line].dz_tty;
    247 		cl = &tp->t_outq;
    248 		tp->t_state &= ~TS_BUSY;
    249 
    250 		/* Just send out a char if we have one */
    251 		/* As long as we can fill the chip buffer, we just loop here */
    252 		if (cl->c_cc) {
    253 			tp->t_state |= TS_BUSY;
    254 			ch = getc(cl);
    255 			DZ_WRITE_BYTE(dr_tbuf, ch);
    256 			continue;
    257 		}
    258 		/* Nothing to send; clear the scan bit */
    259 		/* Clear xmit scanner bit; dzstart may set it again */
    260 		tcr = DZ_READ_WORD(dr_tcrw);
    261 		tcr &= 255;
    262 		tcr &= ~(1 << line);
    263 		DZ_WRITE_BYTE(dr_tcr, tcr);
    264 		if (sc->sc_dz[line].dz_catch)
    265 			continue;
    266 
    267 		if (tp->t_state & TS_FLUSH)
    268 			tp->t_state &= ~TS_FLUSH;
    269 		else
    270 			ndflush (&tp->t_outq, cl->c_cc);
    271 
    272 		(*tp->t_linesw->l_start)(tp);
    273 	}
    274 }
    275 
    276 int
    277 dzopen(dev_t dev, int flag, int mode, struct proc *p)
    278 {
    279 	struct tty *tp;
    280 	int unit, line;
    281 	struct	dz_softc *sc;
    282 	int s, error = 0;
    283 
    284 	unit = DZ_I2C(minor(dev));
    285 	line = DZ_PORT(minor(dev));
    286 	if (unit >= dz_cd.cd_ndevs ||  dz_cd.cd_devs[unit] == NULL)
    287 		return (ENXIO);
    288 
    289 	sc = dz_cd.cd_devs[unit];
    290 
    291 	if (line >= sc->sc_type)
    292 		return ENXIO;
    293 
    294 	/* if some other device is using the line, it's busy */
    295 	if (sc->sc_dz[line].dz_catch)
    296 		return EBUSY;
    297 
    298 	tp = sc->sc_dz[line].dz_tty;
    299 	if (tp == NULL)
    300 		return (ENODEV);
    301 	tp->t_oproc   = dzstart;
    302 	tp->t_param   = dzparam;
    303 	tp->t_dev = dev;
    304 	if ((tp->t_state & TS_ISOPEN) == 0) {
    305 		ttychars(tp);
    306 		if (tp->t_ispeed == 0) {
    307 			tp->t_iflag = TTYDEF_IFLAG;
    308 			tp->t_oflag = TTYDEF_OFLAG;
    309 			tp->t_cflag = TTYDEF_CFLAG;
    310 			tp->t_lflag = TTYDEF_LFLAG;
    311 			tp->t_ispeed = tp->t_ospeed = TTYDEF_SPEED;
    312 		}
    313 		(void) dzparam(tp, &tp->t_termios);
    314 		ttsetwater(tp);
    315 	} else if ((tp->t_state & TS_XCLUDE) && p->p_ucred->cr_uid != 0)
    316 		return (EBUSY);
    317 	/* Use DMBIS and *not* DMSET or else we clobber incoming bits */
    318 	if (dzmctl(sc, line, DML_DTR, DMBIS) & DML_DCD)
    319 		tp->t_state |= TS_CARR_ON;
    320 	s = spltty();
    321 	while (!(flag & O_NONBLOCK) && !(tp->t_cflag & CLOCAL) &&
    322 	       !(tp->t_state & TS_CARR_ON)) {
    323 		tp->t_wopen++;
    324 		error = ttysleep(tp, (caddr_t)&tp->t_rawq,
    325 				TTIPRI | PCATCH, ttopen, 0);
    326 		tp->t_wopen--;
    327 		if (error)
    328 			break;
    329 	}
    330 	(void) splx(s);
    331 	if (error)
    332 		return (error);
    333 	return ((*tp->t_linesw->l_open)(dev, tp));
    334 }
    335 
    336 /*ARGSUSED*/
    337 int
    338 dzclose(dev_t dev, int flag, int mode, struct proc *p)
    339 {
    340 	struct	dz_softc *sc;
    341 	struct tty *tp;
    342 	int unit, line;
    343 
    344 
    345 	unit = DZ_I2C(minor(dev));
    346 	line = DZ_PORT(minor(dev));
    347 	sc = dz_cd.cd_devs[unit];
    348 
    349 	tp = sc->sc_dz[line].dz_tty;
    350 
    351 	(*tp->t_linesw->l_close)(tp, flag);
    352 
    353 	/* Make sure a BREAK state is not left enabled. */
    354 	(void) dzmctl(sc, line, DML_BRK, DMBIC);
    355 
    356 	/* Do a hangup if so required. */
    357 	if ((tp->t_cflag & HUPCL) || tp->t_wopen || !(tp->t_state & TS_ISOPEN))
    358 		(void) dzmctl(sc, line, 0, DMSET);
    359 
    360 	return (ttyclose(tp));
    361 }
    362 
    363 int
    364 dzread(dev_t dev, struct uio *uio, int flag)
    365 {
    366 	struct tty *tp;
    367 	struct	dz_softc *sc;
    368 
    369 	sc = dz_cd.cd_devs[DZ_I2C(minor(dev))];
    370 
    371 	tp = sc->sc_dz[DZ_PORT(minor(dev))].dz_tty;
    372 	return ((*tp->t_linesw->l_read)(tp, uio, flag));
    373 }
    374 
    375 int
    376 dzwrite(dev_t dev, struct uio *uio, int flag)
    377 {
    378 	struct tty *tp;
    379 	struct	dz_softc *sc;
    380 
    381 	sc = dz_cd.cd_devs[DZ_I2C(minor(dev))];
    382 
    383 	tp = sc->sc_dz[DZ_PORT(minor(dev))].dz_tty;
    384 	return ((*tp->t_linesw->l_write)(tp, uio, flag));
    385 }
    386 
    387 int
    388 dzpoll(dev, events, p)
    389 	dev_t dev;
    390 	int events;
    391 	struct proc *p;
    392 {
    393 	struct tty *tp;
    394 	struct	dz_softc *sc;
    395 
    396 	sc = dz_cd.cd_devs[DZ_I2C(minor(dev))];
    397 
    398 	tp = sc->sc_dz[DZ_PORT(minor(dev))].dz_tty;
    399 	return ((*tp->t_linesw->l_poll)(tp, events, p));
    400 }
    401 
    402 /*ARGSUSED*/
    403 int
    404 dzioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct proc *p)
    405 {
    406 	struct	dz_softc *sc;
    407 	struct tty *tp;
    408 	int unit, line;
    409 	int error;
    410 
    411 	unit = DZ_I2C(minor(dev));
    412 	line = DZ_PORT(minor(dev));
    413 	sc = dz_cd.cd_devs[unit];
    414 	tp = sc->sc_dz[line].dz_tty;
    415 
    416 	error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, p);
    417 	if (error >= 0)
    418 		return (error);
    419 
    420 	error = ttioctl(tp, cmd, data, flag, p);
    421 	if (error >= 0)
    422 		return (error);
    423 
    424 	switch (cmd) {
    425 
    426 	case TIOCSBRK:
    427 		(void) dzmctl(sc, line, DML_BRK, DMBIS);
    428 		break;
    429 
    430 	case TIOCCBRK:
    431 		(void) dzmctl(sc, line, DML_BRK, DMBIC);
    432 		break;
    433 
    434 	case TIOCSDTR:
    435 		(void) dzmctl(sc, line, DML_DTR, DMBIS);
    436 		break;
    437 
    438 	case TIOCCDTR:
    439 		(void) dzmctl(sc, line, DML_DTR, DMBIC);
    440 		break;
    441 
    442 	case TIOCMSET:
    443 		(void) dzmctl(sc, line, *(int *)data, DMSET);
    444 		break;
    445 
    446 	case TIOCMBIS:
    447 		(void) dzmctl(sc, line, *(int *)data, DMBIS);
    448 		break;
    449 
    450 	case TIOCMBIC:
    451 		(void) dzmctl(sc, line, *(int *)data, DMBIC);
    452 		break;
    453 
    454 	case TIOCMGET:
    455 		*(int *)data = (dzmctl(sc, line, 0, DMGET) & ~DML_BRK);
    456 		break;
    457 
    458 	default:
    459 		return (EPASSTHROUGH);
    460 	}
    461 	return (0);
    462 }
    463 
    464 struct tty *
    465 dztty(dev_t dev)
    466 {
    467 	struct	dz_softc *sc = dz_cd.cd_devs[DZ_I2C(minor(dev))];
    468         struct tty *tp = sc->sc_dz[DZ_PORT(minor(dev))].dz_tty;
    469 
    470         return (tp);
    471 }
    472 
    473 /*ARGSUSED*/
    474 void
    475 dzstop(struct tty *tp, int flag)
    476 {
    477 	if (tp->t_state & TS_BUSY)
    478 		if (!(tp->t_state & TS_TTSTOP))
    479 			tp->t_state |= TS_FLUSH;
    480 }
    481 
    482 void
    483 dzstart(struct tty *tp)
    484 {
    485 	struct dz_softc *sc;
    486 	struct clist *cl;
    487 	int unit, line, s;
    488 	char state;
    489 
    490 	unit = DZ_I2C(minor(tp->t_dev));
    491 	line = DZ_PORT(minor(tp->t_dev));
    492 	sc = dz_cd.cd_devs[unit];
    493 
    494 	s = spltty();
    495 	if (tp->t_state & (TS_TIMEOUT|TS_BUSY|TS_TTSTOP))
    496 		return;
    497 	cl = &tp->t_outq;
    498 	if (cl->c_cc <= tp->t_lowat) {
    499 		if (tp->t_state & TS_ASLEEP) {
    500 			tp->t_state &= ~TS_ASLEEP;
    501 			wakeup((caddr_t)cl);
    502 		}
    503 		selwakeup(&tp->t_wsel);
    504 	}
    505 	if (cl->c_cc == 0)
    506 		return;
    507 
    508 	tp->t_state |= TS_BUSY;
    509 
    510 	state = DZ_READ_WORD(dr_tcrw) & 255;
    511 	if ((state & (1 << line)) == 0) {
    512 		DZ_WRITE_BYTE(dr_tcr, state | (1 << line));
    513 	}
    514 	dzxint(sc);
    515 	splx(s);
    516 }
    517 
    518 static int
    519 dzparam(struct tty *tp, struct termios *t)
    520 {
    521 	struct	dz_softc *sc;
    522 	int cflag = t->c_cflag;
    523 	int unit, line;
    524 	int ispeed = ttspeedtab(t->c_ispeed, dzspeedtab);
    525 	int ospeed = ttspeedtab(t->c_ospeed, dzspeedtab);
    526 	unsigned lpr;
    527 	int s;
    528 
    529 	unit = DZ_I2C(minor(tp->t_dev));
    530 	line = DZ_PORT(minor(tp->t_dev));
    531 	sc = dz_cd.cd_devs[unit];
    532 
    533 	/* check requested parameters */
    534         if (ospeed < 0 || ispeed < 0 || ispeed != ospeed)
    535                 return (EINVAL);
    536 
    537         tp->t_ispeed = t->c_ispeed;
    538         tp->t_ospeed = t->c_ospeed;
    539         tp->t_cflag = cflag;
    540 
    541 	if (ospeed == 0) {
    542 		(void) dzmctl(sc, line, 0, DMSET);	/* hang up line */
    543 		return (0);
    544 	}
    545 
    546 	s = spltty();
    547 
    548 	lpr = DZ_LPR_RX_ENABLE | ((ispeed&0xF)<<8) | line;
    549 
    550 	switch (cflag & CSIZE)
    551 	{
    552 	  case CS5:
    553 		lpr |= DZ_LPR_5_BIT_CHAR;
    554 		break;
    555 	  case CS6:
    556 		lpr |= DZ_LPR_6_BIT_CHAR;
    557 		break;
    558 	  case CS7:
    559 		lpr |= DZ_LPR_7_BIT_CHAR;
    560 		break;
    561 	  default:
    562 		lpr |= DZ_LPR_8_BIT_CHAR;
    563 		break;
    564 	}
    565 	if (cflag & PARENB)
    566 		lpr |= DZ_LPR_PARENB;
    567 	if (cflag & PARODD)
    568 		lpr |= DZ_LPR_OPAR;
    569 	if (cflag & CSTOPB)
    570 		lpr |= DZ_LPR_2_STOP;
    571 
    572 	DZ_WRITE_WORD(dr_lpr, lpr);
    573 
    574 	(void) splx(s);
    575 	return (0);
    576 }
    577 
    578 static unsigned
    579 dzmctl(struct dz_softc *sc, int line, int bits, int how)
    580 {
    581 	unsigned status;
    582 	unsigned mbits;
    583 	unsigned bit;
    584 	int s;
    585 
    586 	s = spltty();
    587 
    588 	mbits = 0;
    589 
    590 	bit = (1 << line);
    591 
    592 	/* external signals as seen from the port */
    593 
    594 	status = DZ_READ_BYTE(dr_dcd) | sc->sc_dsr;
    595 
    596 	if (status & bit)
    597 		mbits |= DML_DCD;
    598 
    599 	status = DZ_READ_BYTE(dr_ring);
    600 
    601 	if (status & bit)
    602 		mbits |= DML_RI;
    603 
    604 	/* internal signals/state delivered to port */
    605 
    606 	status = DZ_READ_BYTE(dr_dtr);
    607 
    608 	if (status & bit)
    609 		mbits |= DML_DTR;
    610 
    611 	if (sc->sc_brk & bit)
    612 		mbits |= DML_BRK;
    613 
    614 	switch (how)
    615 	{
    616 	  case DMSET:
    617 		mbits = bits;
    618 		break;
    619 
    620 	  case DMBIS:
    621 		mbits |= bits;
    622 		break;
    623 
    624 	  case DMBIC:
    625 		mbits &= ~bits;
    626 		break;
    627 
    628 	  case DMGET:
    629 		(void) splx(s);
    630 		return (mbits);
    631 	}
    632 
    633 	if (mbits & DML_DTR) {
    634 		DZ_WRITE_BYTE(dr_dtr, DZ_READ_BYTE(dr_dtr) | bit);
    635 	} else {
    636 		DZ_WRITE_BYTE(dr_dtr, DZ_READ_BYTE(dr_dtr) & ~bit);
    637 	}
    638 
    639 	if (mbits & DML_BRK) {
    640 		sc->sc_brk |= bit;
    641 		DZ_WRITE_BYTE(dr_break, sc->sc_brk);
    642 	} else {
    643 		sc->sc_brk &= ~bit;
    644 		DZ_WRITE_BYTE(dr_break, sc->sc_brk);
    645 	}
    646 
    647 	(void) splx(s);
    648 	return (mbits);
    649 }
    650 
    651 /*
    652  * This is called by timeout() periodically.
    653  * Check to see if modem status bits have changed.
    654  */
    655 static void
    656 dzscan(void *arg)
    657 {
    658 	struct dz_softc *sc;
    659 	struct tty *tp;
    660 	int n, bit, port;
    661 	unsigned csr;
    662 	int s;
    663 
    664 	s = spltty();
    665 
    666 	for (n = 0; n < dz_cd.cd_ndevs; n++) {
    667 
    668 		if (dz_cd.cd_devs[n] == NULL)
    669 			continue;
    670 
    671 		sc = dz_cd.cd_devs[n];
    672 
    673 		for (port = 0; port < sc->sc_type; port++) {
    674 
    675 			tp = sc->sc_dz[port].dz_tty;
    676 			bit = (1 << port);
    677 
    678 			if ((DZ_READ_BYTE(dr_dcd) | sc->sc_dsr) & bit) {
    679 				if (!(tp->t_state & TS_CARR_ON))
    680 					(*tp->t_linesw->l_modem) (tp, 1);
    681 			} else if ((tp->t_state & TS_CARR_ON) &&
    682 			    (*tp->t_linesw->l_modem)(tp, 0) == 0) {
    683 				DZ_WRITE_BYTE(dr_tcr,
    684 				    (DZ_READ_WORD(dr_tcrw) & 255) & ~bit);
    685 			}
    686 	    	}
    687 
    688 		/*
    689 		 *  If the RX interrupt rate is this high, switch
    690 		 *  the controller to Silo Alarm - which means don't
    691 	 	 *  interrupt until the RX silo has 16 characters in
    692 	 	 *  it (the silo is 64 characters in all).
    693 		 *  Avoid oscillating SA on and off by not turning
    694 		 *  if off unless the rate is appropriately low.
    695 		 */
    696 
    697 		csr = DZ_READ_WORD(dr_csr);
    698 
    699 		if (sc->sc_rxint > (16*10)) {
    700 			if ((csr & DZ_CSR_SAE) == 0)
    701 				DZ_WRITE_WORD(dr_csr, csr | DZ_CSR_SAE);
    702 	    	} else if ((csr & DZ_CSR_SAE) != 0)
    703 			if (sc->sc_rxint < 10)
    704 				DZ_WRITE_WORD(dr_csr, csr & ~(DZ_CSR_SAE));
    705 
    706 		sc->sc_rxint = 0;
    707 	}
    708 	(void) splx(s);
    709 	callout_reset(&dzscan_ch, hz, dzscan, NULL);
    710 	return;
    711 }
    712 
    713 /*
    714  * Called after an ubareset. The DZ card is reset, but the only thing
    715  * that must be done is to start the receiver and transmitter again.
    716  * No DMA setup to care about.
    717  */
    718 void
    719 dzreset(struct device *dev)
    720 {
    721 	struct dz_softc *sc = (void *)dev;
    722 	struct tty *tp;
    723 	int i;
    724 
    725 	for (i = 0; i < sc->sc_type; i++) {
    726 		tp = sc->sc_dz[i].dz_tty;
    727 
    728 		if (((tp->t_state & TS_ISOPEN) == 0) || (tp->t_wopen == 0))
    729 			continue;
    730 
    731 		dzparam(tp, &tp->t_termios);
    732 		dzmctl(sc, i, DML_DTR, DMSET);
    733 		tp->t_state &= ~TS_BUSY;
    734 		dzstart(tp);	/* Kick off transmitter again */
    735 	}
    736 }
    737