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cs4231_ebus.c revision 1.11
      1  1.11      wiz /*	$NetBSD: cs4231_ebus.c,v 1.11 2003/05/03 18:11:09 wiz Exp $ */
      2   1.1      uwe 
      3   1.1      uwe /*
      4   1.1      uwe  * Copyright (c) 2002 Valeriy E. Ushakov
      5   1.1      uwe  * All rights reserved.
      6   1.1      uwe  *
      7   1.1      uwe  * Redistribution and use in source and binary forms, with or without
      8   1.1      uwe  * modification, are permitted provided that the following conditions
      9   1.1      uwe  * are met:
     10   1.1      uwe  * 1. Redistributions of source code must retain the above copyright
     11   1.1      uwe  *    notice, this list of conditions and the following disclaimer.
     12   1.1      uwe  * 2. Redistributions in binary form must reproduce the above copyright
     13   1.1      uwe  *    notice, this list of conditions and the following disclaimer in the
     14   1.1      uwe  *    documentation and/or other materials provided with the distribution.
     15   1.1      uwe  * 3. The name of the author may not be used to endorse or promote products
     16   1.1      uwe  *    derived from this software without specific prior written permission
     17   1.1      uwe  *
     18   1.1      uwe  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     19   1.1      uwe  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     20   1.1      uwe  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     21   1.1      uwe  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     22   1.1      uwe  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     23   1.1      uwe  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     24   1.1      uwe  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     25   1.1      uwe  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     26   1.1      uwe  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     27   1.1      uwe  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     28   1.1      uwe  */
     29   1.1      uwe 
     30   1.1      uwe #include <sys/param.h>
     31   1.1      uwe #include <sys/systm.h>
     32   1.1      uwe #include <sys/errno.h>
     33   1.1      uwe #include <sys/device.h>
     34   1.1      uwe #include <sys/malloc.h>
     35   1.1      uwe 
     36   1.1      uwe #include <machine/autoconf.h>
     37   1.1      uwe #include <machine/cpu.h>
     38   1.1      uwe #include <dev/ebus/ebusreg.h>
     39   1.1      uwe #include <dev/ebus/ebusvar.h>
     40   1.1      uwe 
     41   1.1      uwe #include <sys/audioio.h>
     42   1.1      uwe #include <dev/audio_if.h>
     43   1.1      uwe 
     44   1.1      uwe #include <dev/ic/ad1848reg.h>
     45   1.1      uwe #include <dev/ic/cs4231reg.h>
     46   1.1      uwe #include <dev/ic/ad1848var.h>
     47   1.1      uwe #include <dev/ic/cs4231var.h>
     48   1.1      uwe 
     49   1.1      uwe #ifdef AUDIO_DEBUG
     50   1.1      uwe int cs4231_ebus_debug = 0;
     51   1.2      uwe #define DPRINTF(x)	if (cs4231_ebus_debug) printf x
     52   1.1      uwe #else
     53   1.1      uwe #define DPRINTF(x)
     54   1.1      uwe #endif
     55   1.1      uwe 
     56   1.1      uwe 
     57   1.1      uwe struct cs4231_ebus_softc {
     58   1.1      uwe 	struct cs4231_softc sc_cs4231;
     59   1.1      uwe 
     60   1.3      uwe 	bus_space_tag_t sc_bt;
     61   1.3      uwe 	bus_space_handle_t sc_pdmareg; /* playback DMA */
     62   1.3      uwe 	bus_space_handle_t sc_cdmareg; /* record DMA */
     63   1.1      uwe };
     64   1.1      uwe 
     65   1.1      uwe 
     66   1.1      uwe void	cs4231_ebus_attach(struct device *, struct device *, void *);
     67   1.1      uwe int	cs4231_ebus_match(struct device *, struct cfdata *, void *);
     68   1.1      uwe 
     69   1.8  thorpej CFATTACH_DECL(audiocs_ebus, sizeof(struct cs4231_ebus_softc),
     70   1.9  thorpej     cs4231_ebus_match, cs4231_ebus_attach, NULL, NULL);
     71   1.1      uwe 
     72  1.11      wiz /* audio_hw_if methods specific to ebus DMA */
     73   1.1      uwe static int	cs4231_ebus_trigger_output(void *, void *, void *, int,
     74   1.1      uwe 					   void (*)(void *), void *,
     75   1.1      uwe 					   struct audio_params *);
     76   1.1      uwe static int	cs4231_ebus_trigger_input(void *, void *, void *, int,
     77   1.1      uwe 					  void (*)(void *), void *,
     78   1.1      uwe 					  struct audio_params *);
     79   1.1      uwe static int	cs4231_ebus_halt_output(void *);
     80   1.1      uwe static int	cs4231_ebus_halt_input(void *);
     81   1.1      uwe 
     82   1.1      uwe struct audio_hw_if audiocs_ebus_hw_if = {
     83   1.1      uwe 	cs4231_open,
     84   1.1      uwe 	cs4231_close,
     85   1.1      uwe 	NULL,			/* drain */
     86   1.1      uwe 	ad1848_query_encoding,
     87   1.1      uwe 	ad1848_set_params,
     88   1.1      uwe 	cs4231_round_blocksize,
     89   1.1      uwe 	ad1848_commit_settings,
     90   1.1      uwe 	NULL,			/* init_output */
     91   1.1      uwe 	NULL,			/* init_input */
     92   1.1      uwe 	NULL,			/* start_output */
     93   1.1      uwe 	NULL,			/* start_input */
     94   1.1      uwe 	cs4231_ebus_halt_output,
     95   1.1      uwe 	cs4231_ebus_halt_input,
     96   1.1      uwe 	NULL,			/* speaker_ctl */
     97   1.1      uwe 	cs4231_getdev,
     98   1.1      uwe 	NULL,			/* setfd */
     99   1.1      uwe 	cs4231_set_port,
    100   1.1      uwe 	cs4231_get_port,
    101   1.1      uwe 	cs4231_query_devinfo,
    102   1.1      uwe 	cs4231_malloc,
    103   1.1      uwe 	cs4231_free,
    104   1.1      uwe 	cs4231_round_buffersize,
    105   1.2      uwe 	NULL,			/* mappage */
    106   1.1      uwe 	cs4231_get_props,
    107   1.1      uwe 	cs4231_ebus_trigger_output,
    108   1.1      uwe 	cs4231_ebus_trigger_input,
    109   1.1      uwe 	NULL,			/* dev_ioctl */
    110   1.1      uwe };
    111   1.1      uwe 
    112   1.1      uwe #ifdef AUDIO_DEBUG
    113   1.1      uwe static void	cs4231_ebus_regdump(char *, struct cs4231_ebus_softc *);
    114   1.1      uwe #endif
    115   1.1      uwe 
    116   1.3      uwe static int	cs4231_ebus_dma_reset(bus_space_tag_t, bus_space_handle_t);
    117   1.1      uwe static int	cs4231_ebus_trigger_transfer(struct cs4231_softc *,
    118   1.3      uwe 			struct cs_transfer *,
    119   1.3      uwe 			bus_space_tag_t, bus_space_handle_t,
    120   1.1      uwe 			int, void *, void *, int, void (*)(void *), void *,
    121   1.1      uwe 			struct audio_params *);
    122   1.1      uwe static void	cs4231_ebus_dma_advance(struct cs_transfer *,
    123   1.3      uwe 					bus_space_tag_t, bus_space_handle_t);
    124   1.1      uwe static int	cs4231_ebus_dma_intr(struct cs_transfer *,
    125   1.3      uwe 				     bus_space_tag_t, bus_space_handle_t);
    126   1.1      uwe static int	cs4231_ebus_intr(void *);
    127   1.1      uwe 
    128   1.1      uwe 
    129   1.1      uwe int
    130   1.1      uwe cs4231_ebus_match(parent, cf, aux)
    131   1.1      uwe 	struct device *parent;
    132   1.1      uwe 	struct cfdata *cf;
    133   1.1      uwe 	void *aux;
    134   1.1      uwe {
    135   1.1      uwe 	struct ebus_attach_args *ea = aux;
    136   1.1      uwe 
    137   1.1      uwe 	if (strcmp(ea->ea_name, AUDIOCS_PROM_NAME) == 0)
    138   1.1      uwe 		return (1);
    139   1.1      uwe #ifdef __sparc__		/* XXX: Krups */
    140   1.1      uwe 	if (strcmp(ea->ea_name, "sound") == 0)
    141   1.1      uwe 		return (1);
    142   1.1      uwe #endif
    143   1.1      uwe 
    144   1.1      uwe 	return (0);
    145   1.1      uwe }
    146   1.1      uwe 
    147   1.1      uwe 
    148   1.1      uwe void
    149   1.1      uwe cs4231_ebus_attach(parent, self, aux)
    150   1.1      uwe 	struct device *parent, *self;
    151   1.1      uwe 	void *aux;
    152   1.1      uwe {
    153   1.1      uwe 	struct cs4231_ebus_softc *ebsc = (struct cs4231_ebus_softc *)self;
    154   1.1      uwe 	struct cs4231_softc *sc = &ebsc->sc_cs4231;
    155   1.1      uwe 	struct ebus_attach_args *ea = aux;
    156   1.1      uwe 	bus_space_handle_t bh;
    157   1.1      uwe 	int i;
    158   1.1      uwe 
    159   1.3      uwe 	sc->sc_bustag = ebsc->sc_bt = ea->ea_bustag;
    160   1.1      uwe 	sc->sc_dmatag = ea->ea_dmatag;
    161   1.1      uwe 
    162   1.1      uwe 	/*
    163   1.1      uwe 	 * These are the register we get from the prom:
    164   1.1      uwe 	 *	- CS4231 registers
    165   1.1      uwe 	 *	- Playback EBus DMA controller
    166   1.1      uwe 	 *	- Capture EBus DMA controller
    167   1.1      uwe 	 *	- AUXIO audio register (codec powerdown)
    168   1.1      uwe 	 *
    169   1.1      uwe 	 * Map my registers in, if they aren't already in virtual
    170   1.1      uwe 	 * address space.
    171   1.1      uwe 	 */
    172   1.4      eeh 	if (bus_space_map(ea->ea_bustag, EBUS_ADDR_FROM_REG(&ea->ea_reg[0]),
    173   1.4      eeh 		ea->ea_reg[0].size, 0, &bh) != 0) {
    174   1.6      uwe 		printf(": unable to map registers\n");
    175   1.4      eeh 		return;
    176   1.1      uwe 	}
    177   1.4      eeh 
    178   1.1      uwe 	/* XXX: map playback DMA registers (we just know where they are) */
    179   1.1      uwe 	if (bus_space_map(ea->ea_bustag,
    180   1.1      uwe 			  BUS_ADDR(0x14, 0x702000), /* XXX: magic num */
    181   1.3      uwe 			  EBUS_DMAC_SIZE,
    182   1.3      uwe 			  0, &ebsc->sc_pdmareg) != 0)
    183   1.1      uwe 	{
    184   1.6      uwe 		printf(": unable to map playback DMA registers\n");
    185   1.2      uwe 		return;
    186   1.1      uwe 	}
    187   1.1      uwe 
    188   1.1      uwe 	/* XXX: map capture DMA registers (we just know where they are) */
    189   1.1      uwe 	if (bus_space_map(ea->ea_bustag,
    190   1.1      uwe 			  BUS_ADDR(0x14, 0x704000), /* XXX: magic num */
    191   1.3      uwe 			  EBUS_DMAC_SIZE,
    192   1.3      uwe 			  0, &ebsc->sc_cdmareg) != 0)
    193   1.1      uwe 	{
    194   1.6      uwe 		printf(": unable to map capture DMA registers\n");
    195   1.2      uwe 		return;
    196   1.1      uwe 	}
    197   1.1      uwe 
    198   1.1      uwe 	/* establish interrupt channels */
    199   1.1      uwe 	for (i = 0; i < ea->ea_nintr; ++i)
    200   1.1      uwe 		bus_intr_establish(ea->ea_bustag,
    201  1.10       pk 				   ea->ea_intr[i], IPL_AUDIO,
    202   1.1      uwe 				   cs4231_ebus_intr, ebsc);
    203   1.1      uwe 
    204   1.1      uwe 	cs4231_common_attach(sc, bh);
    205   1.1      uwe 	printf("\n");
    206   1.1      uwe 
    207   1.1      uwe 	/* XXX: todo: move to cs4231_common_attach, pass hw_if as arg? */
    208   1.1      uwe 	audio_attach_mi(&audiocs_ebus_hw_if, sc, &sc->sc_ad1848.sc_dev);
    209   1.1      uwe }
    210   1.1      uwe 
    211   1.1      uwe 
    212   1.1      uwe #ifdef AUDIO_DEBUG
    213   1.1      uwe static void
    214   1.1      uwe cs4231_ebus_regdump(label, ebsc)
    215   1.1      uwe 	char *label;
    216   1.1      uwe 	struct cs4231_ebus_softc *ebsc;
    217   1.1      uwe {
    218   1.1      uwe 	/* char bits[128]; */
    219   1.1      uwe 
    220   1.1      uwe 	printf("cs4231regdump(%s): regs:", label);
    221  1.11      wiz 	/* XXX: dump ebus DMA and aux registers */
    222   1.1      uwe 	ad1848_dump_regs(&ebsc->sc_cs4231.sc_ad1848);
    223   1.1      uwe }
    224   1.1      uwe #endif /* AUDIO_DEBUG */
    225   1.1      uwe 
    226   1.1      uwe 
    227   1.1      uwe /* XXX: nothing CS4231-specific in this code... */
    228   1.1      uwe static int
    229   1.3      uwe cs4231_ebus_dma_reset(dt, dh)
    230   1.3      uwe 	bus_space_tag_t dt;
    231   1.3      uwe 	bus_space_handle_t dh;
    232   1.1      uwe {
    233   1.3      uwe 	u_int32_t csr;
    234   1.1      uwe 	int timo;
    235   1.1      uwe 
    236   1.3      uwe 	/* reset, also clear TC, just in case */
    237   1.3      uwe 	bus_space_write_4(dt, dh, EBUS_DMAC_DCSR, EBDMA_RESET | EBDMA_TC);
    238   1.1      uwe 
    239   1.3      uwe 	for (timo = 50000; timo != 0; --timo) {
    240   1.3      uwe 		csr = bus_space_read_4(dt, dh, EBUS_DMAC_DCSR);
    241   1.3      uwe 		if ((csr & (EBDMA_CYC_PEND | EBDMA_DRAIN)) == 0)
    242   1.1      uwe 			break;
    243   1.3      uwe 	}
    244   1.1      uwe 
    245   1.1      uwe 	if (timo == 0) {
    246   1.3      uwe 		char bits[128];
    247   1.3      uwe 
    248   1.3      uwe 		printf("cs4231_ebus_dma_reset: timed out: csr=%s\n",
    249   1.3      uwe 		       bitmask_snprintf(csr, EBUS_DCSR_BITS,
    250   1.3      uwe 					bits, sizeof(bits)));
    251   1.1      uwe 		return (ETIMEDOUT);
    252   1.1      uwe 	}
    253   1.1      uwe 
    254   1.3      uwe 	bus_space_write_4(dt, dh, EBUS_DMAC_DCSR, csr & ~EBDMA_RESET);
    255   1.1      uwe 	return (0);
    256   1.1      uwe }
    257   1.1      uwe 
    258   1.1      uwe 
    259   1.1      uwe static void
    260   1.3      uwe cs4231_ebus_dma_advance(t, dt, dh)
    261   1.1      uwe 	struct cs_transfer *t;
    262   1.3      uwe 	bus_space_tag_t dt;
    263   1.3      uwe 	bus_space_handle_t dh;
    264   1.1      uwe {
    265   1.1      uwe 	bus_addr_t dmaaddr;
    266   1.1      uwe 	bus_size_t dmasize;
    267   1.1      uwe 
    268   1.1      uwe 	cs4231_transfer_advance(t, &dmaaddr, &dmasize);
    269   1.3      uwe 
    270   1.3      uwe 	bus_space_write_4(dt, dh, EBUS_DMAC_DNBR, (u_int32_t)dmasize);
    271   1.3      uwe 	bus_space_write_4(dt, dh, EBUS_DMAC_DNAR, (u_int32_t)dmaaddr);
    272   1.1      uwe }
    273   1.1      uwe 
    274   1.1      uwe 
    275   1.1      uwe /*
    276   1.1      uwe  * Trigger transfer "t" using DMA controller "dmac".
    277   1.1      uwe  * "iswrite" defines direction of the transfer.
    278   1.1      uwe  */
    279   1.1      uwe static int
    280   1.3      uwe cs4231_ebus_trigger_transfer(sc, t, dt, dh, iswrite,
    281   1.1      uwe 			     start, end, blksize,
    282   1.1      uwe 			     intr, arg, param)
    283   1.1      uwe 	struct cs4231_softc *sc;
    284   1.1      uwe 	struct cs_transfer *t;
    285   1.3      uwe 	bus_space_tag_t dt;
    286   1.3      uwe 	bus_space_handle_t dh;
    287   1.1      uwe 	int iswrite;
    288   1.1      uwe 	void *start, *end;
    289   1.1      uwe 	int blksize;
    290   1.1      uwe 	void (*intr)(void *);
    291   1.1      uwe 	void *arg;
    292   1.1      uwe 	struct audio_params *param;
    293   1.1      uwe {
    294   1.3      uwe 	u_int32_t csr;
    295   1.1      uwe 	bus_addr_t dmaaddr;
    296   1.1      uwe 	bus_size_t dmasize;
    297   1.1      uwe 	int ret;
    298   1.1      uwe 
    299   1.1      uwe 	ret = cs4231_transfer_init(sc, t, &dmaaddr, &dmasize,
    300   1.1      uwe 				   start, end, blksize, intr, arg);
    301   1.1      uwe 	if (ret != 0)
    302   1.1      uwe 		return (ret);
    303   1.1      uwe 
    304   1.3      uwe 	ret = cs4231_ebus_dma_reset(dt, dh);
    305   1.1      uwe 	if (ret != 0)
    306   1.1      uwe 		return (ret);
    307   1.1      uwe 
    308   1.5   martin 	csr = bus_space_read_4(dt, dh, EBUS_DMAC_DCSR);
    309   1.5   martin 	bus_space_write_4(dt, dh, EBUS_DMAC_DCSR,
    310   1.3      uwe 			  csr | EBDMA_EN_NEXT | (iswrite ? EBDMA_WRITE : 0)
    311   1.3      uwe 			  | EBDMA_EN_DMA | EBDMA_EN_CNT | EBDMA_INT_EN);
    312   1.3      uwe 
    313   1.3      uwe 	/* first load: propagated to DACR/DBCR */
    314   1.3      uwe 	bus_space_write_4(dt, dh, EBUS_DMAC_DNBR, (u_int32_t)dmasize);
    315   1.3      uwe 	bus_space_write_4(dt, dh, EBUS_DMAC_DNAR, (u_int32_t)dmaaddr);
    316   1.1      uwe 
    317   1.1      uwe 	/* next load: goes to DNAR/DNBR */
    318   1.3      uwe 	cs4231_ebus_dma_advance(t, dt, dh);
    319   1.1      uwe 
    320   1.1      uwe 	return (0);
    321   1.1      uwe }
    322   1.1      uwe 
    323   1.1      uwe 
    324   1.1      uwe static int
    325   1.1      uwe cs4231_ebus_trigger_output(addr, start, end, blksize, intr, arg, param)
    326   1.1      uwe 	void *addr;
    327   1.1      uwe 	void *start, *end;
    328   1.1      uwe 	int blksize;
    329   1.1      uwe 	void (*intr)(void *);
    330   1.1      uwe 	void *arg;
    331   1.1      uwe 	struct audio_params *param;
    332   1.1      uwe {
    333   1.1      uwe 	struct cs4231_ebus_softc *ebsc = addr;
    334   1.1      uwe 	struct cs4231_softc *sc = &ebsc->sc_cs4231;
    335   1.3      uwe 	int cfg, ret;
    336   1.1      uwe 
    337   1.3      uwe 	ret = cs4231_ebus_trigger_transfer(sc, &sc->sc_playback,
    338   1.3      uwe 					   ebsc->sc_bt, ebsc->sc_pdmareg,
    339   1.3      uwe 					   0, /* iswrite */
    340   1.1      uwe 					   start, end, blksize,
    341   1.3      uwe 					   intr, arg, param);
    342   1.1      uwe 	if (ret != 0)
    343   1.1      uwe 		return (ret);
    344   1.1      uwe 
    345   1.1      uwe 	ad_write(&sc->sc_ad1848, SP_LOWER_BASE_COUNT, 0xff);
    346   1.1      uwe 	ad_write(&sc->sc_ad1848, SP_UPPER_BASE_COUNT, 0xff);
    347   1.1      uwe 
    348   1.1      uwe 	cfg = ad_read(&sc->sc_ad1848, SP_INTERFACE_CONFIG);
    349   1.3      uwe 	ad_write(&sc->sc_ad1848, SP_INTERFACE_CONFIG, cfg | PLAYBACK_ENABLE);
    350   1.1      uwe 
    351   1.1      uwe 	return (0);
    352   1.1      uwe }
    353   1.1      uwe 
    354   1.1      uwe 
    355   1.1      uwe static int
    356   1.1      uwe cs4231_ebus_trigger_input(addr, start, end, blksize, intr, arg, param)
    357   1.1      uwe 	void *addr;
    358   1.1      uwe 	void *start, *end;
    359   1.1      uwe 	int blksize;
    360   1.1      uwe 	void (*intr)(void *);
    361   1.1      uwe 	void *arg;
    362   1.1      uwe 	struct audio_params *param;
    363   1.1      uwe {
    364   1.1      uwe 	struct cs4231_ebus_softc *ebsc = addr;
    365   1.1      uwe 	struct cs4231_softc *sc = &ebsc->sc_cs4231;
    366   1.3      uwe 	int cfg, ret;
    367   1.1      uwe 
    368   1.3      uwe 	ret = cs4231_ebus_trigger_transfer(sc, &sc->sc_capture,
    369   1.3      uwe 					   ebsc->sc_bt, ebsc->sc_cdmareg,
    370   1.3      uwe 					   1, /* iswrite */
    371   1.1      uwe 					   start, end, blksize,
    372   1.3      uwe 					   intr, arg, param);
    373   1.1      uwe 	if (ret != 0)
    374   1.1      uwe 		return (ret);
    375   1.1      uwe 
    376   1.1      uwe 	ad_write(&sc->sc_ad1848, CS_LOWER_REC_CNT, 0xff);
    377   1.1      uwe 	ad_write(&sc->sc_ad1848, CS_UPPER_REC_CNT, 0xff);
    378   1.1      uwe 
    379   1.1      uwe 	cfg = ad_read(&sc->sc_ad1848, SP_INTERFACE_CONFIG);
    380   1.3      uwe 	ad_write(&sc->sc_ad1848, SP_INTERFACE_CONFIG, cfg | CAPTURE_ENABLE);
    381   1.1      uwe 
    382   1.1      uwe 	return (0);
    383   1.1      uwe }
    384   1.1      uwe 
    385   1.1      uwe 
    386   1.1      uwe static int
    387   1.1      uwe cs4231_ebus_halt_output(addr)
    388   1.1      uwe 	void *addr;
    389   1.1      uwe {
    390   1.3      uwe 	struct cs4231_ebus_softc *ebsc = addr;
    391   1.1      uwe 	struct cs4231_softc *sc = &ebsc->sc_cs4231;
    392   1.3      uwe 	u_int32_t csr;
    393   1.1      uwe 	int cfg;
    394   1.1      uwe 
    395   1.1      uwe 	sc->sc_playback.t_active = 0;
    396   1.3      uwe 
    397   1.3      uwe 	csr = bus_space_read_4(ebsc->sc_bt, ebsc->sc_pdmareg, EBUS_DMAC_DCSR);
    398   1.3      uwe 	bus_space_write_4(ebsc->sc_bt, ebsc->sc_pdmareg, EBUS_DMAC_DCSR,
    399   1.3      uwe 			  csr & ~EBDMA_EN_DMA);
    400   1.1      uwe 
    401   1.1      uwe 	cfg = ad_read(&sc->sc_ad1848, SP_INTERFACE_CONFIG);
    402   1.3      uwe 	ad_write(&sc->sc_ad1848, SP_INTERFACE_CONFIG,
    403   1.3      uwe 		 cfg & ~PLAYBACK_ENABLE);
    404   1.1      uwe 
    405   1.1      uwe 	return (0);
    406   1.1      uwe }
    407   1.1      uwe 
    408   1.1      uwe 
    409   1.1      uwe static int
    410   1.1      uwe cs4231_ebus_halt_input(addr)
    411   1.1      uwe 	void *addr;
    412   1.1      uwe {
    413   1.3      uwe 	struct cs4231_ebus_softc *ebsc = addr;
    414   1.1      uwe 	struct cs4231_softc *sc = &ebsc->sc_cs4231;
    415   1.3      uwe 	u_int32_t csr;
    416   1.1      uwe 	int cfg;
    417   1.1      uwe 
    418   1.1      uwe 	sc->sc_capture.t_active = 0;
    419   1.3      uwe 
    420   1.3      uwe 	csr = bus_space_read_4(ebsc->sc_bt, ebsc->sc_cdmareg, EBUS_DMAC_DCSR);
    421   1.3      uwe 	bus_space_write_4(ebsc->sc_bt, ebsc->sc_cdmareg, EBUS_DMAC_DCSR,
    422   1.3      uwe 			  csr & ~EBDMA_EN_DMA);
    423   1.1      uwe 
    424   1.1      uwe 	cfg = ad_read(&sc->sc_ad1848, SP_INTERFACE_CONFIG);
    425   1.3      uwe 	ad_write(&sc->sc_ad1848, SP_INTERFACE_CONFIG,
    426   1.3      uwe 		 cfg & ~CAPTURE_ENABLE);
    427   1.1      uwe 
    428   1.1      uwe 	return (0);
    429   1.1      uwe }
    430   1.1      uwe 
    431   1.1      uwe 
    432   1.1      uwe static int
    433   1.3      uwe cs4231_ebus_dma_intr(t, dt, dh)
    434   1.1      uwe 	struct cs_transfer *t;
    435   1.3      uwe 	bus_space_tag_t dt;
    436   1.3      uwe 	bus_space_handle_t dh;
    437   1.1      uwe {
    438   1.1      uwe 	u_int32_t csr;
    439   1.1      uwe #ifdef AUDIO_DEBUG
    440   1.1      uwe 	char bits[128];
    441   1.1      uwe #endif
    442   1.1      uwe 
    443   1.1      uwe 	/* read DMA status, clear TC bit by writing it back */
    444   1.3      uwe 	csr = bus_space_read_4(dt, dh, EBUS_DMAC_DCSR);
    445   1.3      uwe 	bus_space_write_4(dt, dh, EBUS_DMAC_DCSR, csr);
    446   1.1      uwe 	DPRINTF(("audiocs: %s dcsr=%s\n", t->t_name,
    447   1.1      uwe 		 bitmask_snprintf(csr, EBUS_DCSR_BITS, bits, sizeof(bits))));
    448   1.1      uwe 
    449   1.1      uwe 	if (csr & EBDMA_ERR_PEND) {
    450   1.1      uwe 		++t->t_ierrcnt.ev_count;
    451   1.1      uwe 		printf("audiocs: %s DMA error, resetting\n", t->t_name);
    452   1.3      uwe 		cs4231_ebus_dma_reset(dt, dh);
    453   1.1      uwe 		/* how to notify audio(9)??? */
    454   1.1      uwe 		return (1);
    455   1.1      uwe 	}
    456   1.1      uwe 
    457   1.1      uwe 	if ((csr & EBDMA_INT_PEND) == 0)
    458   1.1      uwe 		return (0);
    459   1.1      uwe 
    460   1.1      uwe 	++t->t_intrcnt.ev_count;
    461   1.1      uwe 
    462   1.1      uwe 	if ((csr & EBDMA_TC) == 0) { /* can this happen? */
    463   1.1      uwe 		printf("audiocs: %s INT_PEND but !TC\n", t->t_name);
    464   1.1      uwe 		return (1);
    465   1.1      uwe 	}
    466   1.1      uwe 
    467   1.1      uwe 	if (!t->t_active)
    468   1.1      uwe 		return (1);
    469   1.1      uwe 
    470   1.3      uwe 	cs4231_ebus_dma_advance(t, dt, dh);
    471   1.1      uwe 
    472  1.11      wiz 	/* call audio(9) framework while DMA is chugging along */
    473   1.1      uwe 	if (t->t_intr != NULL)
    474   1.1      uwe 		(*t->t_intr)(t->t_arg);
    475   1.1      uwe 	return (1);
    476   1.1      uwe }
    477   1.1      uwe 
    478   1.1      uwe 
    479   1.1      uwe static int
    480   1.1      uwe cs4231_ebus_intr(arg)
    481   1.1      uwe 	void *arg;
    482   1.1      uwe {
    483   1.3      uwe 	struct cs4231_ebus_softc *ebsc = arg;
    484   1.1      uwe 	struct cs4231_softc *sc = &ebsc->sc_cs4231;
    485   1.1      uwe 	int status;
    486   1.1      uwe 	int ret;
    487   1.1      uwe #ifdef AUDIO_DEBUG
    488   1.1      uwe 	char bits[128];
    489   1.1      uwe #endif
    490   1.1      uwe 
    491   1.1      uwe 	status = ADREAD(&sc->sc_ad1848, AD1848_STATUS);
    492   1.1      uwe 
    493   1.1      uwe #ifdef AUDIO_DEBUG
    494   1.1      uwe 	if (cs4231_ebus_debug > 1)
    495   1.1      uwe 		cs4231_ebus_regdump("audiointr", ebsc);
    496   1.1      uwe 
    497   1.1      uwe 	DPRINTF(("%s: status: %s\n", sc->sc_ad1848.sc_dev.dv_xname,
    498   1.1      uwe 		 bitmask_snprintf(status, AD_R2_BITS, bits, sizeof(bits))));
    499   1.1      uwe #endif
    500   1.1      uwe 
    501   1.1      uwe 	if (status & INTERRUPT_STATUS) {
    502   1.1      uwe #ifdef AUDIO_DEBUG
    503   1.2      uwe 		int reason;
    504   1.1      uwe 
    505   1.1      uwe 		reason = ad_read(&sc->sc_ad1848, CS_IRQ_STATUS);
    506   1.1      uwe 		DPRINTF(("%s: i24: %s\n", sc->sc_ad1848.sc_dev.dv_xname,
    507   1.1      uwe 		  bitmask_snprintf(reason, CS_I24_BITS, bits, sizeof(bits))));
    508   1.1      uwe #endif
    509   1.1      uwe 		/* clear interrupt from ad1848 */
    510   1.1      uwe 		ADWRITE(&sc->sc_ad1848, AD1848_STATUS, 0);
    511   1.1      uwe 	}
    512   1.1      uwe 
    513   1.1      uwe 	ret = 0;
    514   1.1      uwe 
    515   1.3      uwe 	if (cs4231_ebus_dma_intr(&sc->sc_capture,
    516   1.3      uwe 				 ebsc->sc_bt, ebsc->sc_cdmareg) != 0)
    517   1.3      uwe 	{
    518   1.2      uwe 		++sc->sc_intrcnt.ev_count;
    519   1.2      uwe 		ret = 1;
    520   1.1      uwe 	}
    521   1.1      uwe 
    522   1.3      uwe 	if (cs4231_ebus_dma_intr(&sc->sc_playback,
    523   1.3      uwe 				 ebsc->sc_bt, ebsc->sc_pdmareg) != 0)
    524   1.3      uwe 	{
    525   1.2      uwe 		++sc->sc_intrcnt.ev_count;
    526   1.2      uwe 		ret = 1;
    527   1.1      uwe 	}
    528   1.1      uwe 
    529   1.1      uwe 	return (ret);
    530   1.1      uwe }
    531