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cs4231_ebus.c revision 1.18
      1  1.18    perry /*	$NetBSD: cs4231_ebus.c,v 1.18 2005/02/27 00:26:59 perry Exp $ */
      2   1.1      uwe 
      3   1.1      uwe /*
      4   1.1      uwe  * Copyright (c) 2002 Valeriy E. Ushakov
      5   1.1      uwe  * All rights reserved.
      6   1.1      uwe  *
      7   1.1      uwe  * Redistribution and use in source and binary forms, with or without
      8   1.1      uwe  * modification, are permitted provided that the following conditions
      9   1.1      uwe  * are met:
     10   1.1      uwe  * 1. Redistributions of source code must retain the above copyright
     11   1.1      uwe  *    notice, this list of conditions and the following disclaimer.
     12   1.1      uwe  * 2. Redistributions in binary form must reproduce the above copyright
     13   1.1      uwe  *    notice, this list of conditions and the following disclaimer in the
     14   1.1      uwe  *    documentation and/or other materials provided with the distribution.
     15   1.1      uwe  * 3. The name of the author may not be used to endorse or promote products
     16   1.1      uwe  *    derived from this software without specific prior written permission
     17   1.1      uwe  *
     18   1.1      uwe  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     19   1.1      uwe  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     20   1.1      uwe  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     21   1.1      uwe  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     22   1.1      uwe  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     23   1.1      uwe  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     24   1.1      uwe  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     25   1.1      uwe  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     26   1.1      uwe  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     27   1.1      uwe  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     28   1.1      uwe  */
     29  1.12    lukem 
     30  1.12    lukem #include <sys/cdefs.h>
     31  1.18    perry __KERNEL_RCSID(0, "$NetBSD: cs4231_ebus.c,v 1.18 2005/02/27 00:26:59 perry Exp $");
     32   1.1      uwe 
     33   1.1      uwe #include <sys/param.h>
     34   1.1      uwe #include <sys/systm.h>
     35   1.1      uwe #include <sys/errno.h>
     36   1.1      uwe #include <sys/device.h>
     37   1.1      uwe #include <sys/malloc.h>
     38   1.1      uwe 
     39   1.1      uwe #include <machine/autoconf.h>
     40   1.1      uwe #include <machine/cpu.h>
     41   1.1      uwe #include <dev/ebus/ebusreg.h>
     42   1.1      uwe #include <dev/ebus/ebusvar.h>
     43   1.1      uwe 
     44   1.1      uwe #include <sys/audioio.h>
     45   1.1      uwe #include <dev/audio_if.h>
     46   1.1      uwe 
     47   1.1      uwe #include <dev/ic/ad1848reg.h>
     48   1.1      uwe #include <dev/ic/cs4231reg.h>
     49   1.1      uwe #include <dev/ic/ad1848var.h>
     50   1.1      uwe #include <dev/ic/cs4231var.h>
     51   1.1      uwe 
     52   1.1      uwe #ifdef AUDIO_DEBUG
     53   1.1      uwe int cs4231_ebus_debug = 0;
     54   1.2      uwe #define DPRINTF(x)	if (cs4231_ebus_debug) printf x
     55   1.1      uwe #else
     56   1.1      uwe #define DPRINTF(x)
     57   1.1      uwe #endif
     58   1.1      uwe 
     59   1.1      uwe 
     60   1.1      uwe struct cs4231_ebus_softc {
     61   1.1      uwe 	struct cs4231_softc sc_cs4231;
     62   1.1      uwe 
     63   1.3      uwe 	bus_space_tag_t sc_bt;
     64   1.3      uwe 	bus_space_handle_t sc_pdmareg; /* playback DMA */
     65   1.3      uwe 	bus_space_handle_t sc_cdmareg; /* record DMA */
     66   1.1      uwe };
     67   1.1      uwe 
     68   1.1      uwe 
     69   1.1      uwe void	cs4231_ebus_attach(struct device *, struct device *, void *);
     70   1.1      uwe int	cs4231_ebus_match(struct device *, struct cfdata *, void *);
     71   1.1      uwe 
     72   1.8  thorpej CFATTACH_DECL(audiocs_ebus, sizeof(struct cs4231_ebus_softc),
     73   1.9  thorpej     cs4231_ebus_match, cs4231_ebus_attach, NULL, NULL);
     74   1.1      uwe 
     75  1.11      wiz /* audio_hw_if methods specific to ebus DMA */
     76  1.15     kent static int	cs4231_ebus_round_blocksize(void *, int, int,
     77  1.15     kent 					    const audio_params_t *);
     78   1.1      uwe static int	cs4231_ebus_trigger_output(void *, void *, void *, int,
     79   1.1      uwe 					   void (*)(void *), void *,
     80  1.16     kent 					   const audio_params_t *);
     81   1.1      uwe static int	cs4231_ebus_trigger_input(void *, void *, void *, int,
     82   1.1      uwe 					  void (*)(void *), void *,
     83  1.16     kent 					  const audio_params_t *);
     84   1.1      uwe static int	cs4231_ebus_halt_output(void *);
     85   1.1      uwe static int	cs4231_ebus_halt_input(void *);
     86   1.1      uwe 
     87  1.14     yamt const struct audio_hw_if audiocs_ebus_hw_if = {
     88   1.1      uwe 	cs4231_open,
     89   1.1      uwe 	cs4231_close,
     90   1.1      uwe 	NULL,			/* drain */
     91   1.1      uwe 	ad1848_query_encoding,
     92   1.1      uwe 	ad1848_set_params,
     93  1.13      uwe 	cs4231_ebus_round_blocksize,
     94   1.1      uwe 	ad1848_commit_settings,
     95   1.1      uwe 	NULL,			/* init_output */
     96   1.1      uwe 	NULL,			/* init_input */
     97   1.1      uwe 	NULL,			/* start_output */
     98   1.1      uwe 	NULL,			/* start_input */
     99   1.1      uwe 	cs4231_ebus_halt_output,
    100   1.1      uwe 	cs4231_ebus_halt_input,
    101   1.1      uwe 	NULL,			/* speaker_ctl */
    102   1.1      uwe 	cs4231_getdev,
    103   1.1      uwe 	NULL,			/* setfd */
    104   1.1      uwe 	cs4231_set_port,
    105   1.1      uwe 	cs4231_get_port,
    106   1.1      uwe 	cs4231_query_devinfo,
    107   1.1      uwe 	cs4231_malloc,
    108   1.1      uwe 	cs4231_free,
    109  1.13      uwe 	NULL,			/* round_buffersize */
    110   1.2      uwe 	NULL,			/* mappage */
    111   1.1      uwe 	cs4231_get_props,
    112   1.1      uwe 	cs4231_ebus_trigger_output,
    113   1.1      uwe 	cs4231_ebus_trigger_input,
    114   1.1      uwe 	NULL,			/* dev_ioctl */
    115   1.1      uwe };
    116   1.1      uwe 
    117   1.1      uwe #ifdef AUDIO_DEBUG
    118   1.1      uwe static void	cs4231_ebus_regdump(char *, struct cs4231_ebus_softc *);
    119   1.1      uwe #endif
    120   1.1      uwe 
    121   1.3      uwe static int	cs4231_ebus_dma_reset(bus_space_tag_t, bus_space_handle_t);
    122   1.1      uwe static int	cs4231_ebus_trigger_transfer(struct cs4231_softc *,
    123   1.3      uwe 			struct cs_transfer *,
    124   1.3      uwe 			bus_space_tag_t, bus_space_handle_t,
    125   1.1      uwe 			int, void *, void *, int, void (*)(void *), void *,
    126  1.16     kent 			const audio_params_t *);
    127   1.1      uwe static void	cs4231_ebus_dma_advance(struct cs_transfer *,
    128   1.3      uwe 					bus_space_tag_t, bus_space_handle_t);
    129   1.1      uwe static int	cs4231_ebus_dma_intr(struct cs_transfer *,
    130   1.3      uwe 				     bus_space_tag_t, bus_space_handle_t);
    131   1.1      uwe static int	cs4231_ebus_intr(void *);
    132   1.1      uwe 
    133   1.1      uwe 
    134   1.1      uwe int
    135  1.17     kent cs4231_ebus_match(struct device *parent, struct cfdata *cf, void *aux)
    136   1.1      uwe {
    137  1.17     kent 	struct ebus_attach_args *ea;
    138   1.1      uwe 
    139  1.17     kent 	ea = aux;
    140   1.1      uwe 	if (strcmp(ea->ea_name, AUDIOCS_PROM_NAME) == 0)
    141  1.17     kent 		return 1;
    142   1.1      uwe #ifdef __sparc__		/* XXX: Krups */
    143   1.1      uwe 	if (strcmp(ea->ea_name, "sound") == 0)
    144  1.17     kent 		return 1;
    145   1.1      uwe #endif
    146   1.1      uwe 
    147  1.17     kent 	return 0;
    148   1.1      uwe }
    149   1.1      uwe 
    150   1.1      uwe 
    151   1.1      uwe void
    152  1.17     kent cs4231_ebus_attach(struct device *parent, struct device *self, void *aux)
    153  1.17     kent {
    154  1.17     kent 	struct cs4231_ebus_softc *ebsc;
    155  1.17     kent 	struct cs4231_softc *sc;
    156  1.17     kent 	struct ebus_attach_args *ea;
    157   1.1      uwe 	bus_space_handle_t bh;
    158   1.1      uwe 	int i;
    159   1.1      uwe 
    160  1.17     kent 	ebsc = (struct cs4231_ebus_softc *)self;
    161  1.17     kent 	sc = &ebsc->sc_cs4231;
    162  1.17     kent 	ea = aux;
    163   1.3      uwe 	sc->sc_bustag = ebsc->sc_bt = ea->ea_bustag;
    164   1.1      uwe 	sc->sc_dmatag = ea->ea_dmatag;
    165   1.1      uwe 
    166   1.1      uwe 	/*
    167   1.1      uwe 	 * These are the register we get from the prom:
    168   1.1      uwe 	 *	- CS4231 registers
    169   1.1      uwe 	 *	- Playback EBus DMA controller
    170   1.1      uwe 	 *	- Capture EBus DMA controller
    171   1.1      uwe 	 *	- AUXIO audio register (codec powerdown)
    172   1.1      uwe 	 *
    173   1.1      uwe 	 * Map my registers in, if they aren't already in virtual
    174   1.1      uwe 	 * address space.
    175   1.1      uwe 	 */
    176   1.4      eeh 	if (bus_space_map(ea->ea_bustag, EBUS_ADDR_FROM_REG(&ea->ea_reg[0]),
    177   1.4      eeh 		ea->ea_reg[0].size, 0, &bh) != 0) {
    178   1.6      uwe 		printf(": unable to map registers\n");
    179   1.4      eeh 		return;
    180   1.1      uwe 	}
    181  1.18    perry 
    182   1.1      uwe 	/* XXX: map playback DMA registers (we just know where they are) */
    183   1.1      uwe 	if (bus_space_map(ea->ea_bustag,
    184   1.1      uwe 			  BUS_ADDR(0x14, 0x702000), /* XXX: magic num */
    185   1.3      uwe 			  EBUS_DMAC_SIZE,
    186   1.3      uwe 			  0, &ebsc->sc_pdmareg) != 0)
    187   1.1      uwe 	{
    188   1.6      uwe 		printf(": unable to map playback DMA registers\n");
    189   1.2      uwe 		return;
    190   1.1      uwe 	}
    191   1.1      uwe 
    192   1.1      uwe 	/* XXX: map capture DMA registers (we just know where they are) */
    193   1.1      uwe 	if (bus_space_map(ea->ea_bustag,
    194   1.1      uwe 			  BUS_ADDR(0x14, 0x704000), /* XXX: magic num */
    195   1.3      uwe 			  EBUS_DMAC_SIZE,
    196   1.3      uwe 			  0, &ebsc->sc_cdmareg) != 0)
    197   1.1      uwe 	{
    198   1.6      uwe 		printf(": unable to map capture DMA registers\n");
    199   1.2      uwe 		return;
    200   1.1      uwe 	}
    201   1.1      uwe 
    202   1.1      uwe 	/* establish interrupt channels */
    203   1.1      uwe 	for (i = 0; i < ea->ea_nintr; ++i)
    204   1.1      uwe 		bus_intr_establish(ea->ea_bustag,
    205  1.10       pk 				   ea->ea_intr[i], IPL_AUDIO,
    206   1.1      uwe 				   cs4231_ebus_intr, ebsc);
    207   1.1      uwe 
    208   1.1      uwe 	cs4231_common_attach(sc, bh);
    209   1.1      uwe 	printf("\n");
    210   1.1      uwe 
    211   1.1      uwe 	/* XXX: todo: move to cs4231_common_attach, pass hw_if as arg? */
    212   1.1      uwe 	audio_attach_mi(&audiocs_ebus_hw_if, sc, &sc->sc_ad1848.sc_dev);
    213   1.1      uwe }
    214   1.1      uwe 
    215   1.1      uwe 
    216  1.13      uwe static int
    217  1.17     kent cs4231_ebus_round_blocksize(void *addr, int blk, int mode,
    218  1.17     kent 			    const audio_params_t *param)
    219  1.13      uwe {
    220  1.13      uwe 
    221  1.13      uwe 	/* we want to use DMA burst size of 16 words */
    222  1.17     kent 	return blk & -64;
    223  1.13      uwe }
    224  1.13      uwe 
    225  1.13      uwe 
    226   1.1      uwe #ifdef AUDIO_DEBUG
    227   1.1      uwe static void
    228  1.17     kent cs4231_ebus_regdump(char *label, struct cs4231_ebus_softc *ebsc)
    229   1.1      uwe {
    230   1.1      uwe 	/* char bits[128]; */
    231   1.1      uwe 
    232   1.1      uwe 	printf("cs4231regdump(%s): regs:", label);
    233  1.11      wiz 	/* XXX: dump ebus DMA and aux registers */
    234   1.1      uwe 	ad1848_dump_regs(&ebsc->sc_cs4231.sc_ad1848);
    235   1.1      uwe }
    236   1.1      uwe #endif /* AUDIO_DEBUG */
    237   1.1      uwe 
    238   1.1      uwe 
    239   1.1      uwe /* XXX: nothing CS4231-specific in this code... */
    240   1.1      uwe static int
    241  1.17     kent cs4231_ebus_dma_reset(bus_space_tag_t dt, bus_space_handle_t dh)
    242   1.1      uwe {
    243   1.3      uwe 	u_int32_t csr;
    244   1.1      uwe 	int timo;
    245   1.1      uwe 
    246   1.3      uwe 	/* reset, also clear TC, just in case */
    247   1.3      uwe 	bus_space_write_4(dt, dh, EBUS_DMAC_DCSR, EBDMA_RESET | EBDMA_TC);
    248   1.1      uwe 
    249   1.3      uwe 	for (timo = 50000; timo != 0; --timo) {
    250   1.3      uwe 		csr = bus_space_read_4(dt, dh, EBUS_DMAC_DCSR);
    251   1.3      uwe 		if ((csr & (EBDMA_CYC_PEND | EBDMA_DRAIN)) == 0)
    252   1.1      uwe 			break;
    253   1.3      uwe 	}
    254   1.1      uwe 
    255   1.1      uwe 	if (timo == 0) {
    256   1.3      uwe 		char bits[128];
    257   1.3      uwe 
    258   1.3      uwe 		printf("cs4231_ebus_dma_reset: timed out: csr=%s\n",
    259   1.3      uwe 		       bitmask_snprintf(csr, EBUS_DCSR_BITS,
    260   1.3      uwe 					bits, sizeof(bits)));
    261  1.17     kent 		return ETIMEDOUT;
    262   1.1      uwe 	}
    263   1.1      uwe 
    264   1.3      uwe 	bus_space_write_4(dt, dh, EBUS_DMAC_DCSR, csr & ~EBDMA_RESET);
    265  1.17     kent 	return 0;
    266   1.1      uwe }
    267   1.1      uwe 
    268   1.1      uwe 
    269   1.1      uwe static void
    270  1.17     kent cs4231_ebus_dma_advance(struct cs_transfer *t, bus_space_tag_t dt,
    271  1.17     kent 			bus_space_handle_t dh)
    272   1.1      uwe {
    273   1.1      uwe 	bus_addr_t dmaaddr;
    274   1.1      uwe 	bus_size_t dmasize;
    275   1.1      uwe 
    276   1.1      uwe 	cs4231_transfer_advance(t, &dmaaddr, &dmasize);
    277   1.3      uwe 
    278   1.3      uwe 	bus_space_write_4(dt, dh, EBUS_DMAC_DNBR, (u_int32_t)dmasize);
    279   1.3      uwe 	bus_space_write_4(dt, dh, EBUS_DMAC_DNAR, (u_int32_t)dmaaddr);
    280   1.1      uwe }
    281   1.1      uwe 
    282   1.1      uwe 
    283   1.1      uwe /*
    284  1.13      uwe  * Trigger transfer "t" using DMA controller at "dt"/"dh".
    285   1.1      uwe  * "iswrite" defines direction of the transfer.
    286   1.1      uwe  */
    287   1.1      uwe static int
    288  1.17     kent cs4231_ebus_trigger_transfer(
    289  1.17     kent 	struct cs4231_softc *sc,
    290  1.17     kent 	struct cs_transfer *t,
    291  1.17     kent 	bus_space_tag_t dt,
    292  1.17     kent 	bus_space_handle_t dh,
    293  1.17     kent 	int iswrite,
    294  1.17     kent 	void *start, void *end,
    295  1.17     kent 	int blksize,
    296  1.17     kent 	void (*intr)(void *),
    297  1.17     kent 	void *arg,
    298  1.17     kent 	const audio_params_t *param)
    299   1.1      uwe {
    300  1.17     kent 	uint32_t csr;
    301   1.1      uwe 	bus_addr_t dmaaddr;
    302   1.1      uwe 	bus_size_t dmasize;
    303   1.1      uwe 	int ret;
    304   1.1      uwe 
    305   1.1      uwe 	ret = cs4231_transfer_init(sc, t, &dmaaddr, &dmasize,
    306   1.1      uwe 				   start, end, blksize, intr, arg);
    307   1.1      uwe 	if (ret != 0)
    308  1.17     kent 		return ret;
    309   1.1      uwe 
    310   1.3      uwe 	ret = cs4231_ebus_dma_reset(dt, dh);
    311   1.1      uwe 	if (ret != 0)
    312  1.17     kent 		return ret;
    313   1.1      uwe 
    314   1.5   martin 	csr = bus_space_read_4(dt, dh, EBUS_DMAC_DCSR);
    315   1.5   martin 	bus_space_write_4(dt, dh, EBUS_DMAC_DCSR,
    316   1.3      uwe 			  csr | EBDMA_EN_NEXT | (iswrite ? EBDMA_WRITE : 0)
    317  1.13      uwe 			  | EBDMA_EN_DMA | EBDMA_EN_CNT | EBDMA_INT_EN
    318  1.13      uwe 			  | EBDMA_BURST_SIZE_16);
    319   1.3      uwe 
    320   1.3      uwe 	/* first load: propagated to DACR/DBCR */
    321  1.17     kent 	bus_space_write_4(dt, dh, EBUS_DMAC_DNBR, (uint32_t)dmasize);
    322  1.17     kent 	bus_space_write_4(dt, dh, EBUS_DMAC_DNAR, (uint32_t)dmaaddr);
    323   1.1      uwe 
    324   1.1      uwe 	/* next load: goes to DNAR/DNBR */
    325   1.3      uwe 	cs4231_ebus_dma_advance(t, dt, dh);
    326   1.1      uwe 
    327  1.17     kent 	return 0;
    328   1.1      uwe }
    329   1.1      uwe 
    330   1.1      uwe 
    331   1.1      uwe static int
    332  1.17     kent cs4231_ebus_trigger_output(void *addr, void *start, void *end, int blksize,
    333  1.17     kent 			   void (*intr)(void *), void *arg,
    334  1.17     kent 			   const audio_params_t *param)
    335   1.1      uwe {
    336  1.17     kent 	struct cs4231_ebus_softc *ebsc;
    337  1.17     kent 	struct cs4231_softc *sc;
    338   1.3      uwe 	int cfg, ret;
    339   1.1      uwe 
    340  1.17     kent 	ebsc = addr;
    341  1.17     kent 	sc = &ebsc->sc_cs4231;
    342   1.3      uwe 	ret = cs4231_ebus_trigger_transfer(sc, &sc->sc_playback,
    343   1.3      uwe 					   ebsc->sc_bt, ebsc->sc_pdmareg,
    344   1.3      uwe 					   0, /* iswrite */
    345   1.1      uwe 					   start, end, blksize,
    346   1.3      uwe 					   intr, arg, param);
    347   1.1      uwe 	if (ret != 0)
    348  1.17     kent 		return ret;
    349   1.1      uwe 
    350   1.1      uwe 	ad_write(&sc->sc_ad1848, SP_LOWER_BASE_COUNT, 0xff);
    351   1.1      uwe 	ad_write(&sc->sc_ad1848, SP_UPPER_BASE_COUNT, 0xff);
    352   1.1      uwe 
    353   1.1      uwe 	cfg = ad_read(&sc->sc_ad1848, SP_INTERFACE_CONFIG);
    354   1.3      uwe 	ad_write(&sc->sc_ad1848, SP_INTERFACE_CONFIG, cfg | PLAYBACK_ENABLE);
    355   1.1      uwe 
    356  1.17     kent 	return 0;
    357   1.1      uwe }
    358   1.1      uwe 
    359   1.1      uwe 
    360   1.1      uwe static int
    361  1.17     kent cs4231_ebus_trigger_input(void *addr, void *start, void *end, int blksize,
    362  1.17     kent 			  void (*intr)(void *), void *arg,
    363  1.17     kent 			  const audio_params_t *param)
    364   1.1      uwe {
    365  1.17     kent 	struct cs4231_ebus_softc *ebsc;
    366  1.17     kent 	struct cs4231_softc *sc;
    367   1.3      uwe 	int cfg, ret;
    368   1.1      uwe 
    369  1.17     kent 	ebsc = addr;
    370  1.17     kent 	sc = &ebsc->sc_cs4231;
    371   1.3      uwe 	ret = cs4231_ebus_trigger_transfer(sc, &sc->sc_capture,
    372   1.3      uwe 					   ebsc->sc_bt, ebsc->sc_cdmareg,
    373   1.3      uwe 					   1, /* iswrite */
    374   1.1      uwe 					   start, end, blksize,
    375   1.3      uwe 					   intr, arg, param);
    376   1.1      uwe 	if (ret != 0)
    377  1.17     kent 		return ret;
    378   1.1      uwe 
    379   1.1      uwe 	ad_write(&sc->sc_ad1848, CS_LOWER_REC_CNT, 0xff);
    380   1.1      uwe 	ad_write(&sc->sc_ad1848, CS_UPPER_REC_CNT, 0xff);
    381   1.1      uwe 
    382   1.1      uwe 	cfg = ad_read(&sc->sc_ad1848, SP_INTERFACE_CONFIG);
    383   1.3      uwe 	ad_write(&sc->sc_ad1848, SP_INTERFACE_CONFIG, cfg | CAPTURE_ENABLE);
    384   1.1      uwe 
    385  1.17     kent 	return 0;
    386   1.1      uwe }
    387   1.1      uwe 
    388   1.1      uwe 
    389   1.1      uwe static int
    390  1.17     kent cs4231_ebus_halt_output(void *addr)
    391   1.1      uwe {
    392  1.17     kent 	struct cs4231_ebus_softc *ebsc;
    393  1.17     kent 	struct cs4231_softc *sc;
    394   1.3      uwe 	u_int32_t csr;
    395   1.1      uwe 	int cfg;
    396   1.1      uwe 
    397  1.17     kent 	ebsc = addr;
    398  1.17     kent 	sc = &ebsc->sc_cs4231;
    399   1.1      uwe 	sc->sc_playback.t_active = 0;
    400   1.3      uwe 
    401   1.3      uwe 	csr = bus_space_read_4(ebsc->sc_bt, ebsc->sc_pdmareg, EBUS_DMAC_DCSR);
    402   1.3      uwe 	bus_space_write_4(ebsc->sc_bt, ebsc->sc_pdmareg, EBUS_DMAC_DCSR,
    403   1.3      uwe 			  csr & ~EBDMA_EN_DMA);
    404   1.1      uwe 
    405   1.1      uwe 	cfg = ad_read(&sc->sc_ad1848, SP_INTERFACE_CONFIG);
    406   1.3      uwe 	ad_write(&sc->sc_ad1848, SP_INTERFACE_CONFIG,
    407   1.3      uwe 		 cfg & ~PLAYBACK_ENABLE);
    408   1.1      uwe 
    409  1.17     kent 	return 0;
    410   1.1      uwe }
    411   1.1      uwe 
    412   1.1      uwe 
    413   1.1      uwe static int
    414  1.17     kent cs4231_ebus_halt_input(void *addr)
    415   1.1      uwe {
    416  1.17     kent 	struct cs4231_ebus_softc *ebsc;
    417  1.17     kent 	struct cs4231_softc *sc;
    418  1.17     kent 	uint32_t csr;
    419   1.1      uwe 	int cfg;
    420   1.1      uwe 
    421  1.17     kent 	ebsc = addr;
    422  1.17     kent 	sc = &ebsc->sc_cs4231;
    423   1.1      uwe 	sc->sc_capture.t_active = 0;
    424   1.3      uwe 
    425   1.3      uwe 	csr = bus_space_read_4(ebsc->sc_bt, ebsc->sc_cdmareg, EBUS_DMAC_DCSR);
    426   1.3      uwe 	bus_space_write_4(ebsc->sc_bt, ebsc->sc_cdmareg, EBUS_DMAC_DCSR,
    427   1.3      uwe 			  csr & ~EBDMA_EN_DMA);
    428   1.1      uwe 
    429   1.1      uwe 	cfg = ad_read(&sc->sc_ad1848, SP_INTERFACE_CONFIG);
    430   1.3      uwe 	ad_write(&sc->sc_ad1848, SP_INTERFACE_CONFIG,
    431   1.3      uwe 		 cfg & ~CAPTURE_ENABLE);
    432   1.1      uwe 
    433  1.17     kent 	return 0;
    434   1.1      uwe }
    435   1.1      uwe 
    436   1.1      uwe 
    437   1.1      uwe static int
    438  1.17     kent cs4231_ebus_dma_intr(struct cs_transfer *t, bus_space_tag_t dt,
    439  1.17     kent 		     bus_space_handle_t dh)
    440   1.1      uwe {
    441  1.17     kent 	uint32_t csr;
    442   1.1      uwe #ifdef AUDIO_DEBUG
    443   1.1      uwe 	char bits[128];
    444   1.1      uwe #endif
    445   1.1      uwe 
    446   1.1      uwe 	/* read DMA status, clear TC bit by writing it back */
    447   1.3      uwe 	csr = bus_space_read_4(dt, dh, EBUS_DMAC_DCSR);
    448   1.3      uwe 	bus_space_write_4(dt, dh, EBUS_DMAC_DCSR, csr);
    449   1.1      uwe 	DPRINTF(("audiocs: %s dcsr=%s\n", t->t_name,
    450   1.1      uwe 		 bitmask_snprintf(csr, EBUS_DCSR_BITS, bits, sizeof(bits))));
    451   1.1      uwe 
    452   1.1      uwe 	if (csr & EBDMA_ERR_PEND) {
    453   1.1      uwe 		++t->t_ierrcnt.ev_count;
    454   1.1      uwe 		printf("audiocs: %s DMA error, resetting\n", t->t_name);
    455   1.3      uwe 		cs4231_ebus_dma_reset(dt, dh);
    456   1.1      uwe 		/* how to notify audio(9)??? */
    457  1.17     kent 		return 1;
    458   1.1      uwe 	}
    459   1.1      uwe 
    460   1.1      uwe 	if ((csr & EBDMA_INT_PEND) == 0)
    461  1.17     kent 		return 0;
    462   1.1      uwe 
    463   1.1      uwe 	++t->t_intrcnt.ev_count;
    464   1.1      uwe 
    465   1.1      uwe 	if ((csr & EBDMA_TC) == 0) { /* can this happen? */
    466   1.1      uwe 		printf("audiocs: %s INT_PEND but !TC\n", t->t_name);
    467  1.17     kent 		return 1;
    468   1.1      uwe 	}
    469   1.1      uwe 
    470   1.1      uwe 	if (!t->t_active)
    471  1.17     kent 		return 1;
    472   1.1      uwe 
    473   1.3      uwe 	cs4231_ebus_dma_advance(t, dt, dh);
    474   1.1      uwe 
    475  1.11      wiz 	/* call audio(9) framework while DMA is chugging along */
    476   1.1      uwe 	if (t->t_intr != NULL)
    477   1.1      uwe 		(*t->t_intr)(t->t_arg);
    478  1.17     kent 	return 1;
    479   1.1      uwe }
    480   1.1      uwe 
    481   1.1      uwe 
    482   1.1      uwe static int
    483  1.17     kent cs4231_ebus_intr(void *arg)
    484   1.1      uwe {
    485  1.17     kent 	struct cs4231_ebus_softc *ebsc;
    486  1.17     kent 	struct cs4231_softc *sc;
    487   1.1      uwe 	int status;
    488   1.1      uwe 	int ret;
    489   1.1      uwe #ifdef AUDIO_DEBUG
    490   1.1      uwe 	char bits[128];
    491   1.1      uwe #endif
    492   1.1      uwe 
    493  1.17     kent 	ebsc = arg;
    494  1.17     kent 	sc = &ebsc->sc_cs4231;
    495   1.1      uwe 	status = ADREAD(&sc->sc_ad1848, AD1848_STATUS);
    496   1.1      uwe 
    497   1.1      uwe #ifdef AUDIO_DEBUG
    498   1.1      uwe 	if (cs4231_ebus_debug > 1)
    499   1.1      uwe 		cs4231_ebus_regdump("audiointr", ebsc);
    500   1.1      uwe 
    501   1.1      uwe 	DPRINTF(("%s: status: %s\n", sc->sc_ad1848.sc_dev.dv_xname,
    502   1.1      uwe 		 bitmask_snprintf(status, AD_R2_BITS, bits, sizeof(bits))));
    503   1.1      uwe #endif
    504   1.1      uwe 
    505   1.1      uwe 	if (status & INTERRUPT_STATUS) {
    506   1.1      uwe #ifdef AUDIO_DEBUG
    507   1.2      uwe 		int reason;
    508   1.1      uwe 
    509   1.1      uwe 		reason = ad_read(&sc->sc_ad1848, CS_IRQ_STATUS);
    510   1.1      uwe 		DPRINTF(("%s: i24: %s\n", sc->sc_ad1848.sc_dev.dv_xname,
    511   1.1      uwe 		  bitmask_snprintf(reason, CS_I24_BITS, bits, sizeof(bits))));
    512   1.1      uwe #endif
    513   1.1      uwe 		/* clear interrupt from ad1848 */
    514   1.1      uwe 		ADWRITE(&sc->sc_ad1848, AD1848_STATUS, 0);
    515   1.1      uwe 	}
    516   1.1      uwe 
    517   1.1      uwe 	ret = 0;
    518   1.1      uwe 
    519   1.3      uwe 	if (cs4231_ebus_dma_intr(&sc->sc_capture,
    520   1.3      uwe 				 ebsc->sc_bt, ebsc->sc_cdmareg) != 0)
    521   1.3      uwe 	{
    522   1.2      uwe 		++sc->sc_intrcnt.ev_count;
    523   1.2      uwe 		ret = 1;
    524   1.1      uwe 	}
    525   1.1      uwe 
    526   1.3      uwe 	if (cs4231_ebus_dma_intr(&sc->sc_playback,
    527   1.3      uwe 				 ebsc->sc_bt, ebsc->sc_pdmareg) != 0)
    528   1.3      uwe 	{
    529   1.2      uwe 		++sc->sc_intrcnt.ev_count;
    530   1.2      uwe 		ret = 1;
    531   1.1      uwe 	}
    532   1.1      uwe 
    533  1.17     kent 	return ret;
    534   1.1      uwe }
    535