cs4231_ebus.c revision 1.22.6.1 1 1.22.6.1 ad /* $NetBSD: cs4231_ebus.c,v 1.22.6.1 2007/02/27 14:16:01 ad Exp $ */
2 1.1 uwe
3 1.1 uwe /*
4 1.1 uwe * Copyright (c) 2002 Valeriy E. Ushakov
5 1.1 uwe * All rights reserved.
6 1.1 uwe *
7 1.1 uwe * Redistribution and use in source and binary forms, with or without
8 1.1 uwe * modification, are permitted provided that the following conditions
9 1.1 uwe * are met:
10 1.1 uwe * 1. Redistributions of source code must retain the above copyright
11 1.1 uwe * notice, this list of conditions and the following disclaimer.
12 1.1 uwe * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 uwe * notice, this list of conditions and the following disclaimer in the
14 1.1 uwe * documentation and/or other materials provided with the distribution.
15 1.1 uwe * 3. The name of the author may not be used to endorse or promote products
16 1.1 uwe * derived from this software without specific prior written permission
17 1.1 uwe *
18 1.1 uwe * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19 1.1 uwe * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 1.1 uwe * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 1.1 uwe * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 1.1 uwe * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23 1.1 uwe * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 1.1 uwe * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 1.1 uwe * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 1.1 uwe * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27 1.1 uwe * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 1.1 uwe */
29 1.12 lukem
30 1.12 lukem #include <sys/cdefs.h>
31 1.22.6.1 ad __KERNEL_RCSID(0, "$NetBSD: cs4231_ebus.c,v 1.22.6.1 2007/02/27 14:16:01 ad Exp $");
32 1.1 uwe
33 1.1 uwe #include <sys/param.h>
34 1.1 uwe #include <sys/systm.h>
35 1.1 uwe #include <sys/errno.h>
36 1.1 uwe #include <sys/device.h>
37 1.1 uwe #include <sys/malloc.h>
38 1.1 uwe
39 1.1 uwe #include <machine/autoconf.h>
40 1.1 uwe #include <machine/cpu.h>
41 1.1 uwe #include <dev/ebus/ebusreg.h>
42 1.1 uwe #include <dev/ebus/ebusvar.h>
43 1.1 uwe
44 1.1 uwe #include <sys/audioio.h>
45 1.1 uwe #include <dev/audio_if.h>
46 1.1 uwe
47 1.1 uwe #include <dev/ic/ad1848reg.h>
48 1.1 uwe #include <dev/ic/cs4231reg.h>
49 1.1 uwe #include <dev/ic/ad1848var.h>
50 1.1 uwe #include <dev/ic/cs4231var.h>
51 1.1 uwe
52 1.1 uwe #ifdef AUDIO_DEBUG
53 1.1 uwe int cs4231_ebus_debug = 0;
54 1.2 uwe #define DPRINTF(x) if (cs4231_ebus_debug) printf x
55 1.1 uwe #else
56 1.1 uwe #define DPRINTF(x)
57 1.1 uwe #endif
58 1.1 uwe
59 1.1 uwe
60 1.1 uwe struct cs4231_ebus_softc {
61 1.1 uwe struct cs4231_softc sc_cs4231;
62 1.1 uwe
63 1.3 uwe bus_space_tag_t sc_bt;
64 1.3 uwe bus_space_handle_t sc_pdmareg; /* playback DMA */
65 1.3 uwe bus_space_handle_t sc_cdmareg; /* record DMA */
66 1.1 uwe };
67 1.1 uwe
68 1.1 uwe
69 1.1 uwe void cs4231_ebus_attach(struct device *, struct device *, void *);
70 1.1 uwe int cs4231_ebus_match(struct device *, struct cfdata *, void *);
71 1.1 uwe
72 1.8 thorpej CFATTACH_DECL(audiocs_ebus, sizeof(struct cs4231_ebus_softc),
73 1.9 thorpej cs4231_ebus_match, cs4231_ebus_attach, NULL, NULL);
74 1.1 uwe
75 1.11 wiz /* audio_hw_if methods specific to ebus DMA */
76 1.15 kent static int cs4231_ebus_round_blocksize(void *, int, int,
77 1.15 kent const audio_params_t *);
78 1.1 uwe static int cs4231_ebus_trigger_output(void *, void *, void *, int,
79 1.1 uwe void (*)(void *), void *,
80 1.16 kent const audio_params_t *);
81 1.1 uwe static int cs4231_ebus_trigger_input(void *, void *, void *, int,
82 1.1 uwe void (*)(void *), void *,
83 1.16 kent const audio_params_t *);
84 1.1 uwe static int cs4231_ebus_halt_output(void *);
85 1.1 uwe static int cs4231_ebus_halt_input(void *);
86 1.1 uwe
87 1.14 yamt const struct audio_hw_if audiocs_ebus_hw_if = {
88 1.1 uwe cs4231_open,
89 1.1 uwe cs4231_close,
90 1.1 uwe NULL, /* drain */
91 1.1 uwe ad1848_query_encoding,
92 1.1 uwe ad1848_set_params,
93 1.13 uwe cs4231_ebus_round_blocksize,
94 1.1 uwe ad1848_commit_settings,
95 1.1 uwe NULL, /* init_output */
96 1.1 uwe NULL, /* init_input */
97 1.1 uwe NULL, /* start_output */
98 1.1 uwe NULL, /* start_input */
99 1.1 uwe cs4231_ebus_halt_output,
100 1.1 uwe cs4231_ebus_halt_input,
101 1.1 uwe NULL, /* speaker_ctl */
102 1.1 uwe cs4231_getdev,
103 1.1 uwe NULL, /* setfd */
104 1.1 uwe cs4231_set_port,
105 1.1 uwe cs4231_get_port,
106 1.1 uwe cs4231_query_devinfo,
107 1.1 uwe cs4231_malloc,
108 1.1 uwe cs4231_free,
109 1.13 uwe NULL, /* round_buffersize */
110 1.2 uwe NULL, /* mappage */
111 1.1 uwe cs4231_get_props,
112 1.1 uwe cs4231_ebus_trigger_output,
113 1.1 uwe cs4231_ebus_trigger_input,
114 1.1 uwe NULL, /* dev_ioctl */
115 1.22 martin NULL, /* powerstate */
116 1.22.6.1 ad cs4231_get_lock,
117 1.1 uwe };
118 1.1 uwe
119 1.1 uwe #ifdef AUDIO_DEBUG
120 1.1 uwe static void cs4231_ebus_regdump(char *, struct cs4231_ebus_softc *);
121 1.1 uwe #endif
122 1.1 uwe
123 1.3 uwe static int cs4231_ebus_dma_reset(bus_space_tag_t, bus_space_handle_t);
124 1.1 uwe static int cs4231_ebus_trigger_transfer(struct cs4231_softc *,
125 1.3 uwe struct cs_transfer *,
126 1.3 uwe bus_space_tag_t, bus_space_handle_t,
127 1.1 uwe int, void *, void *, int, void (*)(void *), void *,
128 1.16 kent const audio_params_t *);
129 1.1 uwe static void cs4231_ebus_dma_advance(struct cs_transfer *,
130 1.3 uwe bus_space_tag_t, bus_space_handle_t);
131 1.1 uwe static int cs4231_ebus_dma_intr(struct cs_transfer *,
132 1.3 uwe bus_space_tag_t, bus_space_handle_t);
133 1.1 uwe static int cs4231_ebus_intr(void *);
134 1.1 uwe
135 1.1 uwe
136 1.1 uwe int
137 1.17 kent cs4231_ebus_match(struct device *parent, struct cfdata *cf, void *aux)
138 1.1 uwe {
139 1.17 kent struct ebus_attach_args *ea;
140 1.1 uwe
141 1.17 kent ea = aux;
142 1.1 uwe if (strcmp(ea->ea_name, AUDIOCS_PROM_NAME) == 0)
143 1.17 kent return 1;
144 1.1 uwe #ifdef __sparc__ /* XXX: Krups */
145 1.1 uwe if (strcmp(ea->ea_name, "sound") == 0)
146 1.17 kent return 1;
147 1.1 uwe #endif
148 1.1 uwe
149 1.17 kent return 0;
150 1.1 uwe }
151 1.1 uwe
152 1.1 uwe
153 1.1 uwe void
154 1.17 kent cs4231_ebus_attach(struct device *parent, struct device *self, void *aux)
155 1.17 kent {
156 1.17 kent struct cs4231_ebus_softc *ebsc;
157 1.17 kent struct cs4231_softc *sc;
158 1.17 kent struct ebus_attach_args *ea;
159 1.1 uwe bus_space_handle_t bh;
160 1.1 uwe int i;
161 1.1 uwe
162 1.20 thorpej ebsc = device_private(self);
163 1.17 kent sc = &ebsc->sc_cs4231;
164 1.17 kent ea = aux;
165 1.3 uwe sc->sc_bustag = ebsc->sc_bt = ea->ea_bustag;
166 1.1 uwe sc->sc_dmatag = ea->ea_dmatag;
167 1.1 uwe
168 1.1 uwe /*
169 1.1 uwe * These are the register we get from the prom:
170 1.1 uwe * - CS4231 registers
171 1.1 uwe * - Playback EBus DMA controller
172 1.1 uwe * - Capture EBus DMA controller
173 1.1 uwe * - AUXIO audio register (codec powerdown)
174 1.1 uwe *
175 1.1 uwe * Map my registers in, if they aren't already in virtual
176 1.1 uwe * address space.
177 1.1 uwe */
178 1.4 eeh if (bus_space_map(ea->ea_bustag, EBUS_ADDR_FROM_REG(&ea->ea_reg[0]),
179 1.4 eeh ea->ea_reg[0].size, 0, &bh) != 0) {
180 1.6 uwe printf(": unable to map registers\n");
181 1.4 eeh return;
182 1.1 uwe }
183 1.18 perry
184 1.1 uwe /* XXX: map playback DMA registers (we just know where they are) */
185 1.1 uwe if (bus_space_map(ea->ea_bustag,
186 1.1 uwe BUS_ADDR(0x14, 0x702000), /* XXX: magic num */
187 1.3 uwe EBUS_DMAC_SIZE,
188 1.3 uwe 0, &ebsc->sc_pdmareg) != 0)
189 1.1 uwe {
190 1.6 uwe printf(": unable to map playback DMA registers\n");
191 1.2 uwe return;
192 1.1 uwe }
193 1.1 uwe
194 1.1 uwe /* XXX: map capture DMA registers (we just know where they are) */
195 1.1 uwe if (bus_space_map(ea->ea_bustag,
196 1.1 uwe BUS_ADDR(0x14, 0x704000), /* XXX: magic num */
197 1.3 uwe EBUS_DMAC_SIZE,
198 1.3 uwe 0, &ebsc->sc_cdmareg) != 0)
199 1.1 uwe {
200 1.6 uwe printf(": unable to map capture DMA registers\n");
201 1.2 uwe return;
202 1.1 uwe }
203 1.1 uwe
204 1.22.6.1 ad mutex_init(&sc->sc_lock, MUTEX_DRIVER, IPL_AUDIO);
205 1.22.6.1 ad
206 1.1 uwe /* establish interrupt channels */
207 1.1 uwe for (i = 0; i < ea->ea_nintr; ++i)
208 1.1 uwe bus_intr_establish(ea->ea_bustag,
209 1.10 pk ea->ea_intr[i], IPL_AUDIO,
210 1.1 uwe cs4231_ebus_intr, ebsc);
211 1.1 uwe
212 1.1 uwe cs4231_common_attach(sc, bh);
213 1.1 uwe printf("\n");
214 1.1 uwe
215 1.1 uwe /* XXX: todo: move to cs4231_common_attach, pass hw_if as arg? */
216 1.1 uwe audio_attach_mi(&audiocs_ebus_hw_if, sc, &sc->sc_ad1848.sc_dev);
217 1.1 uwe }
218 1.1 uwe
219 1.1 uwe
220 1.13 uwe static int
221 1.17 kent cs4231_ebus_round_blocksize(void *addr, int blk, int mode,
222 1.17 kent const audio_params_t *param)
223 1.13 uwe {
224 1.13 uwe
225 1.13 uwe /* we want to use DMA burst size of 16 words */
226 1.17 kent return blk & -64;
227 1.13 uwe }
228 1.13 uwe
229 1.13 uwe
230 1.1 uwe #ifdef AUDIO_DEBUG
231 1.1 uwe static void
232 1.17 kent cs4231_ebus_regdump(char *label, struct cs4231_ebus_softc *ebsc)
233 1.1 uwe {
234 1.1 uwe /* char bits[128]; */
235 1.1 uwe
236 1.1 uwe printf("cs4231regdump(%s): regs:", label);
237 1.11 wiz /* XXX: dump ebus DMA and aux registers */
238 1.1 uwe ad1848_dump_regs(&ebsc->sc_cs4231.sc_ad1848);
239 1.1 uwe }
240 1.1 uwe #endif /* AUDIO_DEBUG */
241 1.1 uwe
242 1.1 uwe
243 1.1 uwe /* XXX: nothing CS4231-specific in this code... */
244 1.1 uwe static int
245 1.17 kent cs4231_ebus_dma_reset(bus_space_tag_t dt, bus_space_handle_t dh)
246 1.1 uwe {
247 1.3 uwe u_int32_t csr;
248 1.1 uwe int timo;
249 1.1 uwe
250 1.3 uwe /* reset, also clear TC, just in case */
251 1.3 uwe bus_space_write_4(dt, dh, EBUS_DMAC_DCSR, EBDMA_RESET | EBDMA_TC);
252 1.1 uwe
253 1.3 uwe for (timo = 50000; timo != 0; --timo) {
254 1.3 uwe csr = bus_space_read_4(dt, dh, EBUS_DMAC_DCSR);
255 1.3 uwe if ((csr & (EBDMA_CYC_PEND | EBDMA_DRAIN)) == 0)
256 1.1 uwe break;
257 1.3 uwe }
258 1.1 uwe
259 1.1 uwe if (timo == 0) {
260 1.3 uwe char bits[128];
261 1.3 uwe
262 1.3 uwe printf("cs4231_ebus_dma_reset: timed out: csr=%s\n",
263 1.3 uwe bitmask_snprintf(csr, EBUS_DCSR_BITS,
264 1.3 uwe bits, sizeof(bits)));
265 1.17 kent return ETIMEDOUT;
266 1.1 uwe }
267 1.1 uwe
268 1.3 uwe bus_space_write_4(dt, dh, EBUS_DMAC_DCSR, csr & ~EBDMA_RESET);
269 1.17 kent return 0;
270 1.1 uwe }
271 1.1 uwe
272 1.1 uwe
273 1.1 uwe static void
274 1.17 kent cs4231_ebus_dma_advance(struct cs_transfer *t, bus_space_tag_t dt,
275 1.17 kent bus_space_handle_t dh)
276 1.1 uwe {
277 1.1 uwe bus_addr_t dmaaddr;
278 1.1 uwe bus_size_t dmasize;
279 1.1 uwe
280 1.1 uwe cs4231_transfer_advance(t, &dmaaddr, &dmasize);
281 1.3 uwe
282 1.3 uwe bus_space_write_4(dt, dh, EBUS_DMAC_DNBR, (u_int32_t)dmasize);
283 1.3 uwe bus_space_write_4(dt, dh, EBUS_DMAC_DNAR, (u_int32_t)dmaaddr);
284 1.1 uwe }
285 1.1 uwe
286 1.1 uwe
287 1.1 uwe /*
288 1.13 uwe * Trigger transfer "t" using DMA controller at "dt"/"dh".
289 1.1 uwe * "iswrite" defines direction of the transfer.
290 1.1 uwe */
291 1.1 uwe static int
292 1.17 kent cs4231_ebus_trigger_transfer(
293 1.17 kent struct cs4231_softc *sc,
294 1.17 kent struct cs_transfer *t,
295 1.17 kent bus_space_tag_t dt,
296 1.17 kent bus_space_handle_t dh,
297 1.17 kent int iswrite,
298 1.17 kent void *start, void *end,
299 1.17 kent int blksize,
300 1.17 kent void (*intr)(void *),
301 1.17 kent void *arg,
302 1.17 kent const audio_params_t *param)
303 1.1 uwe {
304 1.17 kent uint32_t csr;
305 1.1 uwe bus_addr_t dmaaddr;
306 1.1 uwe bus_size_t dmasize;
307 1.1 uwe int ret;
308 1.1 uwe
309 1.1 uwe ret = cs4231_transfer_init(sc, t, &dmaaddr, &dmasize,
310 1.1 uwe start, end, blksize, intr, arg);
311 1.1 uwe if (ret != 0)
312 1.17 kent return ret;
313 1.1 uwe
314 1.3 uwe ret = cs4231_ebus_dma_reset(dt, dh);
315 1.1 uwe if (ret != 0)
316 1.17 kent return ret;
317 1.1 uwe
318 1.5 martin csr = bus_space_read_4(dt, dh, EBUS_DMAC_DCSR);
319 1.5 martin bus_space_write_4(dt, dh, EBUS_DMAC_DCSR,
320 1.3 uwe csr | EBDMA_EN_NEXT | (iswrite ? EBDMA_WRITE : 0)
321 1.13 uwe | EBDMA_EN_DMA | EBDMA_EN_CNT | EBDMA_INT_EN
322 1.13 uwe | EBDMA_BURST_SIZE_16);
323 1.3 uwe
324 1.3 uwe /* first load: propagated to DACR/DBCR */
325 1.17 kent bus_space_write_4(dt, dh, EBUS_DMAC_DNBR, (uint32_t)dmasize);
326 1.17 kent bus_space_write_4(dt, dh, EBUS_DMAC_DNAR, (uint32_t)dmaaddr);
327 1.1 uwe
328 1.1 uwe /* next load: goes to DNAR/DNBR */
329 1.3 uwe cs4231_ebus_dma_advance(t, dt, dh);
330 1.1 uwe
331 1.17 kent return 0;
332 1.1 uwe }
333 1.1 uwe
334 1.1 uwe
335 1.1 uwe static int
336 1.17 kent cs4231_ebus_trigger_output(void *addr, void *start, void *end, int blksize,
337 1.17 kent void (*intr)(void *), void *arg,
338 1.17 kent const audio_params_t *param)
339 1.1 uwe {
340 1.17 kent struct cs4231_ebus_softc *ebsc;
341 1.17 kent struct cs4231_softc *sc;
342 1.3 uwe int cfg, ret;
343 1.1 uwe
344 1.17 kent ebsc = addr;
345 1.17 kent sc = &ebsc->sc_cs4231;
346 1.3 uwe ret = cs4231_ebus_trigger_transfer(sc, &sc->sc_playback,
347 1.3 uwe ebsc->sc_bt, ebsc->sc_pdmareg,
348 1.3 uwe 0, /* iswrite */
349 1.1 uwe start, end, blksize,
350 1.3 uwe intr, arg, param);
351 1.1 uwe if (ret != 0)
352 1.17 kent return ret;
353 1.1 uwe
354 1.1 uwe ad_write(&sc->sc_ad1848, SP_LOWER_BASE_COUNT, 0xff);
355 1.1 uwe ad_write(&sc->sc_ad1848, SP_UPPER_BASE_COUNT, 0xff);
356 1.1 uwe
357 1.1 uwe cfg = ad_read(&sc->sc_ad1848, SP_INTERFACE_CONFIG);
358 1.3 uwe ad_write(&sc->sc_ad1848, SP_INTERFACE_CONFIG, cfg | PLAYBACK_ENABLE);
359 1.1 uwe
360 1.17 kent return 0;
361 1.1 uwe }
362 1.1 uwe
363 1.1 uwe
364 1.1 uwe static int
365 1.17 kent cs4231_ebus_trigger_input(void *addr, void *start, void *end, int blksize,
366 1.17 kent void (*intr)(void *), void *arg,
367 1.17 kent const audio_params_t *param)
368 1.1 uwe {
369 1.17 kent struct cs4231_ebus_softc *ebsc;
370 1.17 kent struct cs4231_softc *sc;
371 1.3 uwe int cfg, ret;
372 1.1 uwe
373 1.17 kent ebsc = addr;
374 1.17 kent sc = &ebsc->sc_cs4231;
375 1.3 uwe ret = cs4231_ebus_trigger_transfer(sc, &sc->sc_capture,
376 1.3 uwe ebsc->sc_bt, ebsc->sc_cdmareg,
377 1.3 uwe 1, /* iswrite */
378 1.1 uwe start, end, blksize,
379 1.3 uwe intr, arg, param);
380 1.1 uwe if (ret != 0)
381 1.17 kent return ret;
382 1.1 uwe
383 1.1 uwe ad_write(&sc->sc_ad1848, CS_LOWER_REC_CNT, 0xff);
384 1.1 uwe ad_write(&sc->sc_ad1848, CS_UPPER_REC_CNT, 0xff);
385 1.1 uwe
386 1.1 uwe cfg = ad_read(&sc->sc_ad1848, SP_INTERFACE_CONFIG);
387 1.3 uwe ad_write(&sc->sc_ad1848, SP_INTERFACE_CONFIG, cfg | CAPTURE_ENABLE);
388 1.1 uwe
389 1.17 kent return 0;
390 1.1 uwe }
391 1.1 uwe
392 1.1 uwe
393 1.1 uwe static int
394 1.17 kent cs4231_ebus_halt_output(void *addr)
395 1.1 uwe {
396 1.17 kent struct cs4231_ebus_softc *ebsc;
397 1.17 kent struct cs4231_softc *sc;
398 1.3 uwe u_int32_t csr;
399 1.1 uwe int cfg;
400 1.1 uwe
401 1.17 kent ebsc = addr;
402 1.17 kent sc = &ebsc->sc_cs4231;
403 1.1 uwe sc->sc_playback.t_active = 0;
404 1.3 uwe
405 1.3 uwe csr = bus_space_read_4(ebsc->sc_bt, ebsc->sc_pdmareg, EBUS_DMAC_DCSR);
406 1.3 uwe bus_space_write_4(ebsc->sc_bt, ebsc->sc_pdmareg, EBUS_DMAC_DCSR,
407 1.3 uwe csr & ~EBDMA_EN_DMA);
408 1.1 uwe
409 1.1 uwe cfg = ad_read(&sc->sc_ad1848, SP_INTERFACE_CONFIG);
410 1.3 uwe ad_write(&sc->sc_ad1848, SP_INTERFACE_CONFIG,
411 1.3 uwe cfg & ~PLAYBACK_ENABLE);
412 1.1 uwe
413 1.17 kent return 0;
414 1.1 uwe }
415 1.1 uwe
416 1.1 uwe
417 1.1 uwe static int
418 1.17 kent cs4231_ebus_halt_input(void *addr)
419 1.1 uwe {
420 1.17 kent struct cs4231_ebus_softc *ebsc;
421 1.17 kent struct cs4231_softc *sc;
422 1.17 kent uint32_t csr;
423 1.1 uwe int cfg;
424 1.1 uwe
425 1.17 kent ebsc = addr;
426 1.17 kent sc = &ebsc->sc_cs4231;
427 1.1 uwe sc->sc_capture.t_active = 0;
428 1.3 uwe
429 1.3 uwe csr = bus_space_read_4(ebsc->sc_bt, ebsc->sc_cdmareg, EBUS_DMAC_DCSR);
430 1.3 uwe bus_space_write_4(ebsc->sc_bt, ebsc->sc_cdmareg, EBUS_DMAC_DCSR,
431 1.3 uwe csr & ~EBDMA_EN_DMA);
432 1.1 uwe
433 1.1 uwe cfg = ad_read(&sc->sc_ad1848, SP_INTERFACE_CONFIG);
434 1.3 uwe ad_write(&sc->sc_ad1848, SP_INTERFACE_CONFIG,
435 1.3 uwe cfg & ~CAPTURE_ENABLE);
436 1.1 uwe
437 1.17 kent return 0;
438 1.1 uwe }
439 1.1 uwe
440 1.1 uwe
441 1.1 uwe static int
442 1.17 kent cs4231_ebus_dma_intr(struct cs_transfer *t, bus_space_tag_t dt,
443 1.17 kent bus_space_handle_t dh)
444 1.1 uwe {
445 1.17 kent uint32_t csr;
446 1.1 uwe #ifdef AUDIO_DEBUG
447 1.1 uwe char bits[128];
448 1.1 uwe #endif
449 1.1 uwe
450 1.1 uwe /* read DMA status, clear TC bit by writing it back */
451 1.3 uwe csr = bus_space_read_4(dt, dh, EBUS_DMAC_DCSR);
452 1.3 uwe bus_space_write_4(dt, dh, EBUS_DMAC_DCSR, csr);
453 1.1 uwe DPRINTF(("audiocs: %s dcsr=%s\n", t->t_name,
454 1.1 uwe bitmask_snprintf(csr, EBUS_DCSR_BITS, bits, sizeof(bits))));
455 1.1 uwe
456 1.1 uwe if (csr & EBDMA_ERR_PEND) {
457 1.1 uwe ++t->t_ierrcnt.ev_count;
458 1.1 uwe printf("audiocs: %s DMA error, resetting\n", t->t_name);
459 1.3 uwe cs4231_ebus_dma_reset(dt, dh);
460 1.1 uwe /* how to notify audio(9)??? */
461 1.17 kent return 1;
462 1.1 uwe }
463 1.1 uwe
464 1.1 uwe if ((csr & EBDMA_INT_PEND) == 0)
465 1.17 kent return 0;
466 1.1 uwe
467 1.1 uwe ++t->t_intrcnt.ev_count;
468 1.1 uwe
469 1.1 uwe if ((csr & EBDMA_TC) == 0) { /* can this happen? */
470 1.1 uwe printf("audiocs: %s INT_PEND but !TC\n", t->t_name);
471 1.17 kent return 1;
472 1.1 uwe }
473 1.1 uwe
474 1.1 uwe if (!t->t_active)
475 1.17 kent return 1;
476 1.1 uwe
477 1.3 uwe cs4231_ebus_dma_advance(t, dt, dh);
478 1.1 uwe
479 1.11 wiz /* call audio(9) framework while DMA is chugging along */
480 1.1 uwe if (t->t_intr != NULL)
481 1.1 uwe (*t->t_intr)(t->t_arg);
482 1.17 kent return 1;
483 1.1 uwe }
484 1.1 uwe
485 1.1 uwe
486 1.1 uwe static int
487 1.17 kent cs4231_ebus_intr(void *arg)
488 1.1 uwe {
489 1.17 kent struct cs4231_ebus_softc *ebsc;
490 1.17 kent struct cs4231_softc *sc;
491 1.1 uwe int status;
492 1.1 uwe int ret;
493 1.1 uwe #ifdef AUDIO_DEBUG
494 1.1 uwe char bits[128];
495 1.1 uwe #endif
496 1.1 uwe
497 1.17 kent ebsc = arg;
498 1.17 kent sc = &ebsc->sc_cs4231;
499 1.22.6.1 ad
500 1.22.6.1 ad mutex_enter(&sc->sc_lock);
501 1.22.6.1 ad
502 1.1 uwe status = ADREAD(&sc->sc_ad1848, AD1848_STATUS);
503 1.1 uwe
504 1.1 uwe #ifdef AUDIO_DEBUG
505 1.1 uwe if (cs4231_ebus_debug > 1)
506 1.1 uwe cs4231_ebus_regdump("audiointr", ebsc);
507 1.1 uwe
508 1.1 uwe DPRINTF(("%s: status: %s\n", sc->sc_ad1848.sc_dev.dv_xname,
509 1.1 uwe bitmask_snprintf(status, AD_R2_BITS, bits, sizeof(bits))));
510 1.1 uwe #endif
511 1.1 uwe
512 1.1 uwe if (status & INTERRUPT_STATUS) {
513 1.1 uwe #ifdef AUDIO_DEBUG
514 1.2 uwe int reason;
515 1.1 uwe
516 1.1 uwe reason = ad_read(&sc->sc_ad1848, CS_IRQ_STATUS);
517 1.1 uwe DPRINTF(("%s: i24: %s\n", sc->sc_ad1848.sc_dev.dv_xname,
518 1.1 uwe bitmask_snprintf(reason, CS_I24_BITS, bits, sizeof(bits))));
519 1.1 uwe #endif
520 1.1 uwe /* clear interrupt from ad1848 */
521 1.1 uwe ADWRITE(&sc->sc_ad1848, AD1848_STATUS, 0);
522 1.1 uwe }
523 1.1 uwe
524 1.1 uwe ret = 0;
525 1.1 uwe
526 1.3 uwe if (cs4231_ebus_dma_intr(&sc->sc_capture,
527 1.3 uwe ebsc->sc_bt, ebsc->sc_cdmareg) != 0)
528 1.3 uwe {
529 1.2 uwe ++sc->sc_intrcnt.ev_count;
530 1.2 uwe ret = 1;
531 1.1 uwe }
532 1.1 uwe
533 1.3 uwe if (cs4231_ebus_dma_intr(&sc->sc_playback,
534 1.3 uwe ebsc->sc_bt, ebsc->sc_pdmareg) != 0)
535 1.3 uwe {
536 1.2 uwe ++sc->sc_intrcnt.ev_count;
537 1.2 uwe ret = 1;
538 1.1 uwe }
539 1.1 uwe
540 1.22.6.1 ad mutex_exit(&sc->sc_lock);
541 1.22.6.1 ad
542 1.17 kent return ret;
543 1.1 uwe }
544