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cs4231_ebus.c revision 1.30
      1  1.30       mrg /*	$NetBSD: cs4231_ebus.c,v 1.30 2009/01/06 04:04:55 mrg Exp $ */
      2   1.1       uwe 
      3   1.1       uwe /*
      4   1.1       uwe  * Copyright (c) 2002 Valeriy E. Ushakov
      5   1.1       uwe  * All rights reserved.
      6   1.1       uwe  *
      7   1.1       uwe  * Redistribution and use in source and binary forms, with or without
      8   1.1       uwe  * modification, are permitted provided that the following conditions
      9   1.1       uwe  * are met:
     10   1.1       uwe  * 1. Redistributions of source code must retain the above copyright
     11   1.1       uwe  *    notice, this list of conditions and the following disclaimer.
     12   1.1       uwe  * 2. Redistributions in binary form must reproduce the above copyright
     13   1.1       uwe  *    notice, this list of conditions and the following disclaimer in the
     14   1.1       uwe  *    documentation and/or other materials provided with the distribution.
     15   1.1       uwe  * 3. The name of the author may not be used to endorse or promote products
     16   1.1       uwe  *    derived from this software without specific prior written permission
     17   1.1       uwe  *
     18   1.1       uwe  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     19   1.1       uwe  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     20   1.1       uwe  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     21   1.1       uwe  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     22   1.1       uwe  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     23   1.1       uwe  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     24   1.1       uwe  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     25   1.1       uwe  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     26   1.1       uwe  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     27   1.1       uwe  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     28   1.1       uwe  */
     29  1.12     lukem 
     30  1.12     lukem #include <sys/cdefs.h>
     31  1.30       mrg __KERNEL_RCSID(0, "$NetBSD: cs4231_ebus.c,v 1.30 2009/01/06 04:04:55 mrg Exp $");
     32  1.30       mrg 
     33  1.30       mrg #ifdef _KERNEL_OPT
     34  1.30       mrg #include "opt_sparc_arch.h"
     35  1.30       mrg #endif
     36   1.1       uwe 
     37   1.1       uwe #include <sys/param.h>
     38   1.1       uwe #include <sys/systm.h>
     39   1.1       uwe #include <sys/errno.h>
     40   1.1       uwe #include <sys/device.h>
     41   1.1       uwe #include <sys/malloc.h>
     42  1.24        ad #include <sys/cpu.h>
     43   1.1       uwe 
     44   1.1       uwe #include <machine/autoconf.h>
     45  1.24        ad 
     46   1.1       uwe #include <dev/ebus/ebusreg.h>
     47   1.1       uwe #include <dev/ebus/ebusvar.h>
     48   1.1       uwe 
     49   1.1       uwe #include <sys/audioio.h>
     50   1.1       uwe #include <dev/audio_if.h>
     51   1.1       uwe 
     52   1.1       uwe #include <dev/ic/ad1848reg.h>
     53   1.1       uwe #include <dev/ic/cs4231reg.h>
     54   1.1       uwe #include <dev/ic/ad1848var.h>
     55   1.1       uwe #include <dev/ic/cs4231var.h>
     56   1.1       uwe 
     57   1.1       uwe #ifdef AUDIO_DEBUG
     58   1.1       uwe int cs4231_ebus_debug = 0;
     59   1.2       uwe #define DPRINTF(x)	if (cs4231_ebus_debug) printf x
     60   1.1       uwe #else
     61   1.1       uwe #define DPRINTF(x)
     62   1.1       uwe #endif
     63   1.1       uwe 
     64   1.1       uwe 
     65   1.1       uwe struct cs4231_ebus_softc {
     66   1.1       uwe 	struct cs4231_softc sc_cs4231;
     67   1.1       uwe 
     68  1.24        ad 	void *sc_pint;
     69  1.24        ad 	void *sc_rint;
     70   1.3       uwe 	bus_space_tag_t sc_bt;
     71   1.3       uwe 	bus_space_handle_t sc_pdmareg; /* playback DMA */
     72   1.3       uwe 	bus_space_handle_t sc_cdmareg; /* record DMA */
     73   1.1       uwe };
     74   1.1       uwe 
     75   1.1       uwe 
     76   1.1       uwe void	cs4231_ebus_attach(struct device *, struct device *, void *);
     77   1.1       uwe int	cs4231_ebus_match(struct device *, struct cfdata *, void *);
     78   1.1       uwe 
     79  1.26        ad static int	cs4231_ebus_pint(void *);
     80  1.26        ad static int	cs4231_ebus_rint(void *);
     81  1.24        ad 
     82   1.8   thorpej CFATTACH_DECL(audiocs_ebus, sizeof(struct cs4231_ebus_softc),
     83   1.9   thorpej     cs4231_ebus_match, cs4231_ebus_attach, NULL, NULL);
     84   1.1       uwe 
     85  1.11       wiz /* audio_hw_if methods specific to ebus DMA */
     86  1.15      kent static int	cs4231_ebus_round_blocksize(void *, int, int,
     87  1.15      kent 					    const audio_params_t *);
     88   1.1       uwe static int	cs4231_ebus_trigger_output(void *, void *, void *, int,
     89   1.1       uwe 					   void (*)(void *), void *,
     90  1.16      kent 					   const audio_params_t *);
     91   1.1       uwe static int	cs4231_ebus_trigger_input(void *, void *, void *, int,
     92   1.1       uwe 					  void (*)(void *), void *,
     93  1.16      kent 					  const audio_params_t *);
     94   1.1       uwe static int	cs4231_ebus_halt_output(void *);
     95   1.1       uwe static int	cs4231_ebus_halt_input(void *);
     96   1.1       uwe 
     97  1.14      yamt const struct audio_hw_if audiocs_ebus_hw_if = {
     98   1.1       uwe 	cs4231_open,
     99   1.1       uwe 	cs4231_close,
    100   1.1       uwe 	NULL,			/* drain */
    101   1.1       uwe 	ad1848_query_encoding,
    102   1.1       uwe 	ad1848_set_params,
    103  1.13       uwe 	cs4231_ebus_round_blocksize,
    104   1.1       uwe 	ad1848_commit_settings,
    105   1.1       uwe 	NULL,			/* init_output */
    106   1.1       uwe 	NULL,			/* init_input */
    107   1.1       uwe 	NULL,			/* start_output */
    108   1.1       uwe 	NULL,			/* start_input */
    109   1.1       uwe 	cs4231_ebus_halt_output,
    110   1.1       uwe 	cs4231_ebus_halt_input,
    111   1.1       uwe 	NULL,			/* speaker_ctl */
    112   1.1       uwe 	cs4231_getdev,
    113   1.1       uwe 	NULL,			/* setfd */
    114   1.1       uwe 	cs4231_set_port,
    115   1.1       uwe 	cs4231_get_port,
    116   1.1       uwe 	cs4231_query_devinfo,
    117   1.1       uwe 	cs4231_malloc,
    118   1.1       uwe 	cs4231_free,
    119  1.13       uwe 	NULL,			/* round_buffersize */
    120   1.2       uwe 	NULL,			/* mappage */
    121   1.1       uwe 	cs4231_get_props,
    122   1.1       uwe 	cs4231_ebus_trigger_output,
    123   1.1       uwe 	cs4231_ebus_trigger_input,
    124   1.1       uwe 	NULL,			/* dev_ioctl */
    125  1.22    martin 	NULL,			/* powerstate */
    126   1.1       uwe };
    127   1.1       uwe 
    128   1.1       uwe #ifdef AUDIO_DEBUG
    129   1.1       uwe static void	cs4231_ebus_regdump(char *, struct cs4231_ebus_softc *);
    130   1.1       uwe #endif
    131   1.1       uwe 
    132   1.3       uwe static int	cs4231_ebus_dma_reset(bus_space_tag_t, bus_space_handle_t);
    133   1.1       uwe static int	cs4231_ebus_trigger_transfer(struct cs4231_softc *,
    134   1.3       uwe 			struct cs_transfer *,
    135   1.3       uwe 			bus_space_tag_t, bus_space_handle_t,
    136   1.1       uwe 			int, void *, void *, int, void (*)(void *), void *,
    137  1.16      kent 			const audio_params_t *);
    138   1.1       uwe static void	cs4231_ebus_dma_advance(struct cs_transfer *,
    139   1.3       uwe 					bus_space_tag_t, bus_space_handle_t);
    140   1.1       uwe static int	cs4231_ebus_dma_intr(struct cs_transfer *,
    141  1.24        ad 				     bus_space_tag_t, bus_space_handle_t,
    142  1.24        ad 				     void *);
    143   1.1       uwe static int	cs4231_ebus_intr(void *);
    144   1.1       uwe 
    145   1.1       uwe 
    146   1.1       uwe int
    147  1.17      kent cs4231_ebus_match(struct device *parent, struct cfdata *cf, void *aux)
    148   1.1       uwe {
    149  1.17      kent 	struct ebus_attach_args *ea;
    150  1.27       mrg 	char *compat;
    151  1.30       mrg 	int len, total_size;
    152   1.1       uwe 
    153  1.17      kent 	ea = aux;
    154   1.1       uwe 	if (strcmp(ea->ea_name, AUDIOCS_PROM_NAME) == 0)
    155  1.17      kent 		return 1;
    156   1.1       uwe 
    157  1.30       mrg 	compat = NULL;
    158  1.30       mrg 	if (prom_getprop(ea->ea_node, "compatible", 1, &total_size, &compat) == 0) {
    159  1.30       mrg 		do {
    160  1.30       mrg 			if (strcmp(compat, AUDIOCS_PROM_NAME) == 0)
    161  1.30       mrg 				return 1;
    162  1.30       mrg 			len = strlen(compat) + 1;
    163  1.30       mrg 			total_size -= len;
    164  1.30       mrg 			compat += len;
    165  1.30       mrg 		} while (total_size > 0);
    166  1.30       mrg 	}
    167  1.27       mrg 
    168  1.17      kent 	return 0;
    169   1.1       uwe }
    170   1.1       uwe 
    171   1.1       uwe 
    172   1.1       uwe void
    173  1.17      kent cs4231_ebus_attach(struct device *parent, struct device *self, void *aux)
    174  1.17      kent {
    175  1.17      kent 	struct cs4231_ebus_softc *ebsc;
    176  1.17      kent 	struct cs4231_softc *sc;
    177  1.17      kent 	struct ebus_attach_args *ea;
    178   1.1       uwe 	bus_space_handle_t bh;
    179   1.1       uwe 	int i;
    180   1.1       uwe 
    181  1.20   thorpej 	ebsc = device_private(self);
    182  1.17      kent 	sc = &ebsc->sc_cs4231;
    183  1.17      kent 	ea = aux;
    184   1.3       uwe 	sc->sc_bustag = ebsc->sc_bt = ea->ea_bustag;
    185   1.1       uwe 	sc->sc_dmatag = ea->ea_dmatag;
    186   1.1       uwe 
    187  1.26        ad 	ebsc->sc_pint = sparc_softintr_establish(IPL_VM,
    188  1.26        ad 	    (void *)cs4231_ebus_pint, sc);
    189  1.26        ad 	ebsc->sc_rint = sparc_softintr_establish(IPL_VM,
    190  1.26        ad 	    (void *)cs4231_ebus_rint, sc);
    191  1.24        ad 
    192   1.1       uwe 	/*
    193   1.1       uwe 	 * These are the register we get from the prom:
    194   1.1       uwe 	 *	- CS4231 registers
    195   1.1       uwe 	 *	- Playback EBus DMA controller
    196   1.1       uwe 	 *	- Capture EBus DMA controller
    197   1.1       uwe 	 *	- AUXIO audio register (codec powerdown)
    198   1.1       uwe 	 *
    199   1.1       uwe 	 * Map my registers in, if they aren't already in virtual
    200   1.1       uwe 	 * address space.
    201   1.1       uwe 	 */
    202   1.4       eeh 	if (bus_space_map(ea->ea_bustag, EBUS_ADDR_FROM_REG(&ea->ea_reg[0]),
    203   1.4       eeh 		ea->ea_reg[0].size, 0, &bh) != 0) {
    204   1.6       uwe 		printf(": unable to map registers\n");
    205   1.4       eeh 		return;
    206   1.1       uwe 	}
    207  1.18     perry 
    208   1.1       uwe 	if (bus_space_map(ea->ea_bustag,
    209  1.30       mrg #ifdef MSIIEP		/* XXX: Krups */
    210  1.30       mrg 			  /*
    211  1.30       mrg 			   * XXX: map playback DMA registers
    212  1.30       mrg 			   * (we just know where they are)
    213  1.30       mrg 			   */
    214   1.1       uwe 			  BUS_ADDR(0x14, 0x702000), /* XXX: magic num */
    215   1.3       uwe 			  EBUS_DMAC_SIZE,
    216  1.30       mrg #else
    217  1.30       mrg 			  EBUS_ADDR_FROM_REG(&ea->ea_reg[1]),
    218  1.30       mrg 			  ea->ea_reg[1].size,
    219  1.30       mrg #endif
    220   1.3       uwe 			  0, &ebsc->sc_pdmareg) != 0)
    221   1.1       uwe 	{
    222   1.6       uwe 		printf(": unable to map playback DMA registers\n");
    223   1.2       uwe 		return;
    224   1.1       uwe 	}
    225   1.1       uwe 
    226   1.1       uwe 	if (bus_space_map(ea->ea_bustag,
    227  1.30       mrg #ifdef MSIIEP		/* XXX: Krups */
    228  1.30       mrg 			  /*
    229  1.30       mrg 			   * XXX: map capture DMA registers
    230  1.30       mrg 			   * (we just know where they are)
    231  1.30       mrg 			   */
    232   1.1       uwe 			  BUS_ADDR(0x14, 0x704000), /* XXX: magic num */
    233   1.3       uwe 			  EBUS_DMAC_SIZE,
    234  1.30       mrg #else
    235  1.30       mrg 			  EBUS_ADDR_FROM_REG(&ea->ea_reg[2]),
    236  1.30       mrg 			  ea->ea_reg[2].size,
    237  1.30       mrg #endif
    238   1.3       uwe 			  0, &ebsc->sc_cdmareg) != 0)
    239   1.1       uwe 	{
    240   1.6       uwe 		printf(": unable to map capture DMA registers\n");
    241   1.2       uwe 		return;
    242   1.1       uwe 	}
    243   1.1       uwe 
    244   1.1       uwe 	/* establish interrupt channels */
    245   1.1       uwe 	for (i = 0; i < ea->ea_nintr; ++i)
    246   1.1       uwe 		bus_intr_establish(ea->ea_bustag,
    247  1.24        ad 				   ea->ea_intr[i], IPL_SCHED,
    248   1.1       uwe 				   cs4231_ebus_intr, ebsc);
    249   1.1       uwe 
    250   1.1       uwe 	cs4231_common_attach(sc, bh);
    251   1.1       uwe 	printf("\n");
    252   1.1       uwe 
    253   1.1       uwe 	/* XXX: todo: move to cs4231_common_attach, pass hw_if as arg? */
    254   1.1       uwe 	audio_attach_mi(&audiocs_ebus_hw_if, sc, &sc->sc_ad1848.sc_dev);
    255   1.1       uwe }
    256   1.1       uwe 
    257   1.1       uwe 
    258  1.13       uwe static int
    259  1.17      kent cs4231_ebus_round_blocksize(void *addr, int blk, int mode,
    260  1.17      kent 			    const audio_params_t *param)
    261  1.13       uwe {
    262  1.13       uwe 
    263  1.13       uwe 	/* we want to use DMA burst size of 16 words */
    264  1.17      kent 	return blk & -64;
    265  1.13       uwe }
    266  1.13       uwe 
    267  1.13       uwe 
    268   1.1       uwe #ifdef AUDIO_DEBUG
    269   1.1       uwe static void
    270  1.17      kent cs4231_ebus_regdump(char *label, struct cs4231_ebus_softc *ebsc)
    271   1.1       uwe {
    272   1.1       uwe 	/* char bits[128]; */
    273   1.1       uwe 
    274   1.1       uwe 	printf("cs4231regdump(%s): regs:", label);
    275  1.11       wiz 	/* XXX: dump ebus DMA and aux registers */
    276   1.1       uwe 	ad1848_dump_regs(&ebsc->sc_cs4231.sc_ad1848);
    277   1.1       uwe }
    278   1.1       uwe #endif /* AUDIO_DEBUG */
    279   1.1       uwe 
    280   1.1       uwe 
    281   1.1       uwe /* XXX: nothing CS4231-specific in this code... */
    282   1.1       uwe static int
    283  1.17      kent cs4231_ebus_dma_reset(bus_space_tag_t dt, bus_space_handle_t dh)
    284   1.1       uwe {
    285   1.3       uwe 	u_int32_t csr;
    286   1.1       uwe 	int timo;
    287   1.1       uwe 
    288   1.3       uwe 	/* reset, also clear TC, just in case */
    289   1.3       uwe 	bus_space_write_4(dt, dh, EBUS_DMAC_DCSR, EBDMA_RESET | EBDMA_TC);
    290   1.1       uwe 
    291   1.3       uwe 	for (timo = 50000; timo != 0; --timo) {
    292   1.3       uwe 		csr = bus_space_read_4(dt, dh, EBUS_DMAC_DCSR);
    293   1.3       uwe 		if ((csr & (EBDMA_CYC_PEND | EBDMA_DRAIN)) == 0)
    294   1.1       uwe 			break;
    295   1.3       uwe 	}
    296   1.1       uwe 
    297   1.1       uwe 	if (timo == 0) {
    298   1.3       uwe 		char bits[128];
    299  1.28  christos 		snprintb(bits, sizeof(bits), EBUS_DCSR_BITS, csr);
    300  1.28  christos 		printf("cs4231_ebus_dma_reset: timed out: csr=%s\n", bits);
    301  1.17      kent 		return ETIMEDOUT;
    302   1.1       uwe 	}
    303   1.1       uwe 
    304   1.3       uwe 	bus_space_write_4(dt, dh, EBUS_DMAC_DCSR, csr & ~EBDMA_RESET);
    305  1.17      kent 	return 0;
    306   1.1       uwe }
    307   1.1       uwe 
    308   1.1       uwe 
    309   1.1       uwe static void
    310  1.17      kent cs4231_ebus_dma_advance(struct cs_transfer *t, bus_space_tag_t dt,
    311  1.17      kent 			bus_space_handle_t dh)
    312   1.1       uwe {
    313   1.1       uwe 	bus_addr_t dmaaddr;
    314   1.1       uwe 	bus_size_t dmasize;
    315   1.1       uwe 
    316   1.1       uwe 	cs4231_transfer_advance(t, &dmaaddr, &dmasize);
    317   1.3       uwe 
    318   1.3       uwe 	bus_space_write_4(dt, dh, EBUS_DMAC_DNBR, (u_int32_t)dmasize);
    319   1.3       uwe 	bus_space_write_4(dt, dh, EBUS_DMAC_DNAR, (u_int32_t)dmaaddr);
    320   1.1       uwe }
    321   1.1       uwe 
    322   1.1       uwe 
    323   1.1       uwe /*
    324  1.13       uwe  * Trigger transfer "t" using DMA controller at "dt"/"dh".
    325   1.1       uwe  * "iswrite" defines direction of the transfer.
    326   1.1       uwe  */
    327   1.1       uwe static int
    328  1.17      kent cs4231_ebus_trigger_transfer(
    329  1.17      kent 	struct cs4231_softc *sc,
    330  1.17      kent 	struct cs_transfer *t,
    331  1.17      kent 	bus_space_tag_t dt,
    332  1.17      kent 	bus_space_handle_t dh,
    333  1.17      kent 	int iswrite,
    334  1.17      kent 	void *start, void *end,
    335  1.17      kent 	int blksize,
    336  1.17      kent 	void (*intr)(void *),
    337  1.17      kent 	void *arg,
    338  1.17      kent 	const audio_params_t *param)
    339   1.1       uwe {
    340  1.17      kent 	uint32_t csr;
    341   1.1       uwe 	bus_addr_t dmaaddr;
    342   1.1       uwe 	bus_size_t dmasize;
    343   1.1       uwe 	int ret;
    344   1.1       uwe 
    345   1.1       uwe 	ret = cs4231_transfer_init(sc, t, &dmaaddr, &dmasize,
    346   1.1       uwe 				   start, end, blksize, intr, arg);
    347   1.1       uwe 	if (ret != 0)
    348  1.17      kent 		return ret;
    349   1.1       uwe 
    350   1.3       uwe 	ret = cs4231_ebus_dma_reset(dt, dh);
    351   1.1       uwe 	if (ret != 0)
    352  1.17      kent 		return ret;
    353   1.1       uwe 
    354   1.5    martin 	csr = bus_space_read_4(dt, dh, EBUS_DMAC_DCSR);
    355   1.5    martin 	bus_space_write_4(dt, dh, EBUS_DMAC_DCSR,
    356   1.3       uwe 			  csr | EBDMA_EN_NEXT | (iswrite ? EBDMA_WRITE : 0)
    357  1.13       uwe 			  | EBDMA_EN_DMA | EBDMA_EN_CNT | EBDMA_INT_EN
    358  1.13       uwe 			  | EBDMA_BURST_SIZE_16);
    359   1.3       uwe 
    360   1.3       uwe 	/* first load: propagated to DACR/DBCR */
    361  1.17      kent 	bus_space_write_4(dt, dh, EBUS_DMAC_DNBR, (uint32_t)dmasize);
    362  1.17      kent 	bus_space_write_4(dt, dh, EBUS_DMAC_DNAR, (uint32_t)dmaaddr);
    363   1.1       uwe 
    364   1.1       uwe 	/* next load: goes to DNAR/DNBR */
    365   1.3       uwe 	cs4231_ebus_dma_advance(t, dt, dh);
    366   1.1       uwe 
    367  1.17      kent 	return 0;
    368   1.1       uwe }
    369   1.1       uwe 
    370   1.1       uwe 
    371   1.1       uwe static int
    372  1.17      kent cs4231_ebus_trigger_output(void *addr, void *start, void *end, int blksize,
    373  1.17      kent 			   void (*intr)(void *), void *arg,
    374  1.17      kent 			   const audio_params_t *param)
    375   1.1       uwe {
    376  1.17      kent 	struct cs4231_ebus_softc *ebsc;
    377  1.17      kent 	struct cs4231_softc *sc;
    378   1.3       uwe 	int cfg, ret;
    379   1.1       uwe 
    380  1.17      kent 	ebsc = addr;
    381  1.17      kent 	sc = &ebsc->sc_cs4231;
    382   1.3       uwe 	ret = cs4231_ebus_trigger_transfer(sc, &sc->sc_playback,
    383   1.3       uwe 					   ebsc->sc_bt, ebsc->sc_pdmareg,
    384   1.3       uwe 					   0, /* iswrite */
    385   1.1       uwe 					   start, end, blksize,
    386   1.3       uwe 					   intr, arg, param);
    387   1.1       uwe 	if (ret != 0)
    388  1.17      kent 		return ret;
    389   1.1       uwe 
    390   1.1       uwe 	ad_write(&sc->sc_ad1848, SP_LOWER_BASE_COUNT, 0xff);
    391   1.1       uwe 	ad_write(&sc->sc_ad1848, SP_UPPER_BASE_COUNT, 0xff);
    392   1.1       uwe 
    393   1.1       uwe 	cfg = ad_read(&sc->sc_ad1848, SP_INTERFACE_CONFIG);
    394   1.3       uwe 	ad_write(&sc->sc_ad1848, SP_INTERFACE_CONFIG, cfg | PLAYBACK_ENABLE);
    395   1.1       uwe 
    396  1.17      kent 	return 0;
    397   1.1       uwe }
    398   1.1       uwe 
    399   1.1       uwe 
    400   1.1       uwe static int
    401  1.17      kent cs4231_ebus_trigger_input(void *addr, void *start, void *end, int blksize,
    402  1.17      kent 			  void (*intr)(void *), void *arg,
    403  1.17      kent 			  const audio_params_t *param)
    404   1.1       uwe {
    405  1.17      kent 	struct cs4231_ebus_softc *ebsc;
    406  1.17      kent 	struct cs4231_softc *sc;
    407   1.3       uwe 	int cfg, ret;
    408   1.1       uwe 
    409  1.17      kent 	ebsc = addr;
    410  1.17      kent 	sc = &ebsc->sc_cs4231;
    411   1.3       uwe 	ret = cs4231_ebus_trigger_transfer(sc, &sc->sc_capture,
    412   1.3       uwe 					   ebsc->sc_bt, ebsc->sc_cdmareg,
    413   1.3       uwe 					   1, /* iswrite */
    414   1.1       uwe 					   start, end, blksize,
    415   1.3       uwe 					   intr, arg, param);
    416   1.1       uwe 	if (ret != 0)
    417  1.17      kent 		return ret;
    418   1.1       uwe 
    419   1.1       uwe 	ad_write(&sc->sc_ad1848, CS_LOWER_REC_CNT, 0xff);
    420   1.1       uwe 	ad_write(&sc->sc_ad1848, CS_UPPER_REC_CNT, 0xff);
    421   1.1       uwe 
    422   1.1       uwe 	cfg = ad_read(&sc->sc_ad1848, SP_INTERFACE_CONFIG);
    423   1.3       uwe 	ad_write(&sc->sc_ad1848, SP_INTERFACE_CONFIG, cfg | CAPTURE_ENABLE);
    424   1.1       uwe 
    425  1.17      kent 	return 0;
    426   1.1       uwe }
    427   1.1       uwe 
    428   1.1       uwe 
    429   1.1       uwe static int
    430  1.17      kent cs4231_ebus_halt_output(void *addr)
    431   1.1       uwe {
    432  1.17      kent 	struct cs4231_ebus_softc *ebsc;
    433  1.17      kent 	struct cs4231_softc *sc;
    434   1.3       uwe 	u_int32_t csr;
    435   1.1       uwe 	int cfg;
    436   1.1       uwe 
    437  1.17      kent 	ebsc = addr;
    438  1.17      kent 	sc = &ebsc->sc_cs4231;
    439   1.1       uwe 	sc->sc_playback.t_active = 0;
    440   1.3       uwe 
    441   1.3       uwe 	csr = bus_space_read_4(ebsc->sc_bt, ebsc->sc_pdmareg, EBUS_DMAC_DCSR);
    442   1.3       uwe 	bus_space_write_4(ebsc->sc_bt, ebsc->sc_pdmareg, EBUS_DMAC_DCSR,
    443   1.3       uwe 			  csr & ~EBDMA_EN_DMA);
    444   1.1       uwe 
    445   1.1       uwe 	cfg = ad_read(&sc->sc_ad1848, SP_INTERFACE_CONFIG);
    446   1.3       uwe 	ad_write(&sc->sc_ad1848, SP_INTERFACE_CONFIG,
    447   1.3       uwe 		 cfg & ~PLAYBACK_ENABLE);
    448   1.1       uwe 
    449  1.17      kent 	return 0;
    450   1.1       uwe }
    451   1.1       uwe 
    452   1.1       uwe 
    453   1.1       uwe static int
    454  1.17      kent cs4231_ebus_halt_input(void *addr)
    455   1.1       uwe {
    456  1.17      kent 	struct cs4231_ebus_softc *ebsc;
    457  1.17      kent 	struct cs4231_softc *sc;
    458  1.17      kent 	uint32_t csr;
    459   1.1       uwe 	int cfg;
    460   1.1       uwe 
    461  1.17      kent 	ebsc = addr;
    462  1.17      kent 	sc = &ebsc->sc_cs4231;
    463   1.1       uwe 	sc->sc_capture.t_active = 0;
    464   1.3       uwe 
    465   1.3       uwe 	csr = bus_space_read_4(ebsc->sc_bt, ebsc->sc_cdmareg, EBUS_DMAC_DCSR);
    466   1.3       uwe 	bus_space_write_4(ebsc->sc_bt, ebsc->sc_cdmareg, EBUS_DMAC_DCSR,
    467   1.3       uwe 			  csr & ~EBDMA_EN_DMA);
    468   1.1       uwe 
    469   1.1       uwe 	cfg = ad_read(&sc->sc_ad1848, SP_INTERFACE_CONFIG);
    470   1.3       uwe 	ad_write(&sc->sc_ad1848, SP_INTERFACE_CONFIG,
    471   1.3       uwe 		 cfg & ~CAPTURE_ENABLE);
    472   1.1       uwe 
    473  1.17      kent 	return 0;
    474   1.1       uwe }
    475   1.1       uwe 
    476   1.1       uwe 
    477   1.1       uwe static int
    478  1.17      kent cs4231_ebus_dma_intr(struct cs_transfer *t, bus_space_tag_t dt,
    479  1.24        ad 		     bus_space_handle_t dh, void *sih)
    480   1.1       uwe {
    481  1.17      kent 	uint32_t csr;
    482   1.1       uwe #ifdef AUDIO_DEBUG
    483   1.1       uwe 	char bits[128];
    484   1.1       uwe #endif
    485   1.1       uwe 
    486   1.1       uwe 	/* read DMA status, clear TC bit by writing it back */
    487   1.3       uwe 	csr = bus_space_read_4(dt, dh, EBUS_DMAC_DCSR);
    488   1.3       uwe 	bus_space_write_4(dt, dh, EBUS_DMAC_DCSR, csr);
    489  1.28  christos #ifdef AUDIO_DEBUG
    490  1.28  christos 	snprintb(bits, sizeof(bits), EBUS_DCSR_BITS, csr);
    491  1.28  christos 	DPRINTF(("audiocs: %s dcsr=%s\n", t->t_name, bits));
    492  1.29    cegger #endif
    493   1.1       uwe 
    494   1.1       uwe 	if (csr & EBDMA_ERR_PEND) {
    495   1.1       uwe 		++t->t_ierrcnt.ev_count;
    496   1.1       uwe 		printf("audiocs: %s DMA error, resetting\n", t->t_name);
    497   1.3       uwe 		cs4231_ebus_dma_reset(dt, dh);
    498   1.1       uwe 		/* how to notify audio(9)??? */
    499  1.17      kent 		return 1;
    500   1.1       uwe 	}
    501   1.1       uwe 
    502   1.1       uwe 	if ((csr & EBDMA_INT_PEND) == 0)
    503  1.17      kent 		return 0;
    504   1.1       uwe 
    505   1.1       uwe 	++t->t_intrcnt.ev_count;
    506   1.1       uwe 
    507   1.1       uwe 	if ((csr & EBDMA_TC) == 0) { /* can this happen? */
    508   1.1       uwe 		printf("audiocs: %s INT_PEND but !TC\n", t->t_name);
    509  1.17      kent 		return 1;
    510   1.1       uwe 	}
    511   1.1       uwe 
    512   1.1       uwe 	if (!t->t_active)
    513  1.17      kent 		return 1;
    514   1.1       uwe 
    515   1.3       uwe 	cs4231_ebus_dma_advance(t, dt, dh);
    516   1.1       uwe 
    517  1.11       wiz 	/* call audio(9) framework while DMA is chugging along */
    518   1.1       uwe 	if (t->t_intr != NULL)
    519  1.26        ad 		sparc_softintr_schedule(sih);
    520  1.17      kent 	return 1;
    521   1.1       uwe }
    522   1.1       uwe 
    523   1.1       uwe 
    524   1.1       uwe static int
    525  1.17      kent cs4231_ebus_intr(void *arg)
    526   1.1       uwe {
    527  1.17      kent 	struct cs4231_ebus_softc *ebsc;
    528  1.17      kent 	struct cs4231_softc *sc;
    529   1.1       uwe 	int status;
    530   1.1       uwe 	int ret;
    531   1.1       uwe #ifdef AUDIO_DEBUG
    532   1.1       uwe 	char bits[128];
    533   1.1       uwe #endif
    534   1.1       uwe 
    535  1.17      kent 	ebsc = arg;
    536  1.17      kent 	sc = &ebsc->sc_cs4231;
    537   1.1       uwe 	status = ADREAD(&sc->sc_ad1848, AD1848_STATUS);
    538   1.1       uwe 
    539   1.1       uwe #ifdef AUDIO_DEBUG
    540   1.1       uwe 	if (cs4231_ebus_debug > 1)
    541   1.1       uwe 		cs4231_ebus_regdump("audiointr", ebsc);
    542   1.1       uwe 
    543  1.28  christos 	snprintb(bits, sizeof(bits), AD_R2_BITS, status);
    544  1.25    cegger 	DPRINTF(("%s: status: %s\n", device_xname(&sc->sc_ad1848.sc_dev),
    545  1.28  christos 	    bits));
    546   1.1       uwe #endif
    547   1.1       uwe 
    548   1.1       uwe 	if (status & INTERRUPT_STATUS) {
    549   1.1       uwe #ifdef AUDIO_DEBUG
    550   1.2       uwe 		int reason;
    551   1.1       uwe 
    552   1.1       uwe 		reason = ad_read(&sc->sc_ad1848, CS_IRQ_STATUS);
    553  1.28  christos 	        snprintb(bits, sizeof(bits), CS_I24_BITS, reason);
    554  1.25    cegger 		DPRINTF(("%s: i24: %s\n", device_xname(&sc->sc_ad1848.sc_dev),
    555  1.28  christos 		    bits));
    556   1.1       uwe #endif
    557   1.1       uwe 		/* clear interrupt from ad1848 */
    558   1.1       uwe 		ADWRITE(&sc->sc_ad1848, AD1848_STATUS, 0);
    559   1.1       uwe 	}
    560   1.1       uwe 
    561   1.1       uwe 	ret = 0;
    562   1.1       uwe 
    563  1.24        ad 	if (cs4231_ebus_dma_intr(&sc->sc_capture, ebsc->sc_bt,
    564  1.24        ad 	    ebsc->sc_cdmareg, ebsc->sc_rint) != 0)
    565   1.3       uwe 	{
    566   1.2       uwe 		++sc->sc_intrcnt.ev_count;
    567   1.2       uwe 		ret = 1;
    568   1.1       uwe 	}
    569   1.1       uwe 
    570  1.24        ad 	if (cs4231_ebus_dma_intr(&sc->sc_playback, ebsc->sc_bt,
    571  1.24        ad 	    ebsc->sc_pdmareg, ebsc->sc_pint) != 0)
    572   1.3       uwe 	{
    573   1.2       uwe 		++sc->sc_intrcnt.ev_count;
    574   1.2       uwe 		ret = 1;
    575   1.1       uwe 	}
    576   1.1       uwe 
    577  1.26        ad 
    578  1.17      kent 	return ret;
    579   1.1       uwe }
    580  1.24        ad 
    581  1.26        ad static int
    582  1.24        ad cs4231_ebus_pint(void *cookie)
    583  1.24        ad {
    584  1.24        ad 	struct cs4231_softc *sc = cookie;
    585  1.24        ad 	struct cs_transfer *t = &sc->sc_playback;
    586  1.24        ad 
    587  1.26        ad 	KERNEL_LOCK(1, NULL);
    588  1.24        ad 	if (t->t_intr != NULL)
    589  1.24        ad 		(*t->t_intr)(t->t_arg);
    590  1.26        ad 	KERNEL_UNLOCK_ONE(NULL);
    591  1.26        ad 	return 0;
    592  1.24        ad }
    593  1.24        ad 
    594  1.26        ad static int
    595  1.24        ad cs4231_ebus_rint(void *cookie)
    596  1.24        ad {
    597  1.24        ad 	struct cs4231_softc *sc = cookie;
    598  1.24        ad 	struct cs_transfer *t = &sc->sc_capture;
    599  1.24        ad 
    600  1.26        ad 	KERNEL_LOCK(1, NULL);
    601  1.24        ad 	if (t->t_intr != NULL)
    602  1.24        ad 		(*t->t_intr)(t->t_arg);
    603  1.26        ad 	KERNEL_UNLOCK_ONE(NULL);
    604  1.26        ad 	return 0;
    605  1.24        ad }
    606