cs4231_ebus.c revision 1.31 1 1.31 martin /* $NetBSD: cs4231_ebus.c,v 1.31 2009/01/31 10:35:38 martin Exp $ */
2 1.1 uwe
3 1.1 uwe /*
4 1.1 uwe * Copyright (c) 2002 Valeriy E. Ushakov
5 1.1 uwe * All rights reserved.
6 1.1 uwe *
7 1.1 uwe * Redistribution and use in source and binary forms, with or without
8 1.1 uwe * modification, are permitted provided that the following conditions
9 1.1 uwe * are met:
10 1.1 uwe * 1. Redistributions of source code must retain the above copyright
11 1.1 uwe * notice, this list of conditions and the following disclaimer.
12 1.1 uwe * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 uwe * notice, this list of conditions and the following disclaimer in the
14 1.1 uwe * documentation and/or other materials provided with the distribution.
15 1.1 uwe * 3. The name of the author may not be used to endorse or promote products
16 1.1 uwe * derived from this software without specific prior written permission
17 1.1 uwe *
18 1.1 uwe * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19 1.1 uwe * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 1.1 uwe * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 1.1 uwe * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 1.1 uwe * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23 1.1 uwe * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 1.1 uwe * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 1.1 uwe * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 1.1 uwe * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27 1.1 uwe * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 1.1 uwe */
29 1.12 lukem
30 1.12 lukem #include <sys/cdefs.h>
31 1.31 martin __KERNEL_RCSID(0, "$NetBSD: cs4231_ebus.c,v 1.31 2009/01/31 10:35:38 martin Exp $");
32 1.30 mrg
33 1.30 mrg #ifdef _KERNEL_OPT
34 1.30 mrg #include "opt_sparc_arch.h"
35 1.30 mrg #endif
36 1.1 uwe
37 1.1 uwe #include <sys/param.h>
38 1.1 uwe #include <sys/systm.h>
39 1.1 uwe #include <sys/errno.h>
40 1.1 uwe #include <sys/device.h>
41 1.1 uwe #include <sys/malloc.h>
42 1.24 ad #include <sys/cpu.h>
43 1.1 uwe
44 1.1 uwe #include <machine/autoconf.h>
45 1.24 ad
46 1.1 uwe #include <dev/ebus/ebusreg.h>
47 1.1 uwe #include <dev/ebus/ebusvar.h>
48 1.1 uwe
49 1.1 uwe #include <sys/audioio.h>
50 1.1 uwe #include <dev/audio_if.h>
51 1.1 uwe
52 1.1 uwe #include <dev/ic/ad1848reg.h>
53 1.1 uwe #include <dev/ic/cs4231reg.h>
54 1.1 uwe #include <dev/ic/ad1848var.h>
55 1.1 uwe #include <dev/ic/cs4231var.h>
56 1.1 uwe
57 1.1 uwe #ifdef AUDIO_DEBUG
58 1.1 uwe int cs4231_ebus_debug = 0;
59 1.2 uwe #define DPRINTF(x) if (cs4231_ebus_debug) printf x
60 1.1 uwe #else
61 1.1 uwe #define DPRINTF(x)
62 1.1 uwe #endif
63 1.1 uwe
64 1.1 uwe
65 1.1 uwe struct cs4231_ebus_softc {
66 1.1 uwe struct cs4231_softc sc_cs4231;
67 1.1 uwe
68 1.24 ad void *sc_pint;
69 1.24 ad void *sc_rint;
70 1.3 uwe bus_space_tag_t sc_bt;
71 1.3 uwe bus_space_handle_t sc_pdmareg; /* playback DMA */
72 1.3 uwe bus_space_handle_t sc_cdmareg; /* record DMA */
73 1.1 uwe };
74 1.1 uwe
75 1.1 uwe
76 1.1 uwe void cs4231_ebus_attach(struct device *, struct device *, void *);
77 1.1 uwe int cs4231_ebus_match(struct device *, struct cfdata *, void *);
78 1.1 uwe
79 1.26 ad static int cs4231_ebus_pint(void *);
80 1.26 ad static int cs4231_ebus_rint(void *);
81 1.24 ad
82 1.8 thorpej CFATTACH_DECL(audiocs_ebus, sizeof(struct cs4231_ebus_softc),
83 1.9 thorpej cs4231_ebus_match, cs4231_ebus_attach, NULL, NULL);
84 1.1 uwe
85 1.11 wiz /* audio_hw_if methods specific to ebus DMA */
86 1.15 kent static int cs4231_ebus_round_blocksize(void *, int, int,
87 1.15 kent const audio_params_t *);
88 1.1 uwe static int cs4231_ebus_trigger_output(void *, void *, void *, int,
89 1.1 uwe void (*)(void *), void *,
90 1.16 kent const audio_params_t *);
91 1.1 uwe static int cs4231_ebus_trigger_input(void *, void *, void *, int,
92 1.1 uwe void (*)(void *), void *,
93 1.16 kent const audio_params_t *);
94 1.1 uwe static int cs4231_ebus_halt_output(void *);
95 1.1 uwe static int cs4231_ebus_halt_input(void *);
96 1.1 uwe
97 1.14 yamt const struct audio_hw_if audiocs_ebus_hw_if = {
98 1.1 uwe cs4231_open,
99 1.1 uwe cs4231_close,
100 1.1 uwe NULL, /* drain */
101 1.1 uwe ad1848_query_encoding,
102 1.1 uwe ad1848_set_params,
103 1.13 uwe cs4231_ebus_round_blocksize,
104 1.1 uwe ad1848_commit_settings,
105 1.1 uwe NULL, /* init_output */
106 1.1 uwe NULL, /* init_input */
107 1.1 uwe NULL, /* start_output */
108 1.1 uwe NULL, /* start_input */
109 1.1 uwe cs4231_ebus_halt_output,
110 1.1 uwe cs4231_ebus_halt_input,
111 1.1 uwe NULL, /* speaker_ctl */
112 1.1 uwe cs4231_getdev,
113 1.1 uwe NULL, /* setfd */
114 1.1 uwe cs4231_set_port,
115 1.1 uwe cs4231_get_port,
116 1.1 uwe cs4231_query_devinfo,
117 1.1 uwe cs4231_malloc,
118 1.1 uwe cs4231_free,
119 1.13 uwe NULL, /* round_buffersize */
120 1.2 uwe NULL, /* mappage */
121 1.1 uwe cs4231_get_props,
122 1.1 uwe cs4231_ebus_trigger_output,
123 1.1 uwe cs4231_ebus_trigger_input,
124 1.1 uwe NULL, /* dev_ioctl */
125 1.22 martin NULL, /* powerstate */
126 1.1 uwe };
127 1.1 uwe
128 1.1 uwe #ifdef AUDIO_DEBUG
129 1.1 uwe static void cs4231_ebus_regdump(char *, struct cs4231_ebus_softc *);
130 1.1 uwe #endif
131 1.1 uwe
132 1.3 uwe static int cs4231_ebus_dma_reset(bus_space_tag_t, bus_space_handle_t);
133 1.1 uwe static int cs4231_ebus_trigger_transfer(struct cs4231_softc *,
134 1.3 uwe struct cs_transfer *,
135 1.3 uwe bus_space_tag_t, bus_space_handle_t,
136 1.1 uwe int, void *, void *, int, void (*)(void *), void *,
137 1.16 kent const audio_params_t *);
138 1.1 uwe static void cs4231_ebus_dma_advance(struct cs_transfer *,
139 1.3 uwe bus_space_tag_t, bus_space_handle_t);
140 1.1 uwe static int cs4231_ebus_dma_intr(struct cs_transfer *,
141 1.24 ad bus_space_tag_t, bus_space_handle_t,
142 1.24 ad void *);
143 1.1 uwe static int cs4231_ebus_intr(void *);
144 1.1 uwe
145 1.1 uwe
146 1.1 uwe int
147 1.17 kent cs4231_ebus_match(struct device *parent, struct cfdata *cf, void *aux)
148 1.1 uwe {
149 1.17 kent struct ebus_attach_args *ea;
150 1.27 mrg char *compat;
151 1.30 mrg int len, total_size;
152 1.1 uwe
153 1.17 kent ea = aux;
154 1.1 uwe if (strcmp(ea->ea_name, AUDIOCS_PROM_NAME) == 0)
155 1.17 kent return 1;
156 1.1 uwe
157 1.30 mrg compat = NULL;
158 1.30 mrg if (prom_getprop(ea->ea_node, "compatible", 1, &total_size, &compat) == 0) {
159 1.30 mrg do {
160 1.30 mrg if (strcmp(compat, AUDIOCS_PROM_NAME) == 0)
161 1.30 mrg return 1;
162 1.31 martin #ifdef __sparc__
163 1.31 martin /* on KRUPS compatible lists: "cs4231", "ad1848",
164 1.31 martin * "mwave", and "pnpPNP,b007" */
165 1.31 martin if (strcmp(compat, "cs4231") == 0)
166 1.31 martin return 1;
167 1.31 martin #endif
168 1.30 mrg len = strlen(compat) + 1;
169 1.30 mrg total_size -= len;
170 1.30 mrg compat += len;
171 1.30 mrg } while (total_size > 0);
172 1.30 mrg }
173 1.27 mrg
174 1.17 kent return 0;
175 1.1 uwe }
176 1.1 uwe
177 1.1 uwe
178 1.1 uwe void
179 1.17 kent cs4231_ebus_attach(struct device *parent, struct device *self, void *aux)
180 1.17 kent {
181 1.17 kent struct cs4231_ebus_softc *ebsc;
182 1.17 kent struct cs4231_softc *sc;
183 1.17 kent struct ebus_attach_args *ea;
184 1.1 uwe bus_space_handle_t bh;
185 1.1 uwe int i;
186 1.1 uwe
187 1.20 thorpej ebsc = device_private(self);
188 1.17 kent sc = &ebsc->sc_cs4231;
189 1.17 kent ea = aux;
190 1.3 uwe sc->sc_bustag = ebsc->sc_bt = ea->ea_bustag;
191 1.1 uwe sc->sc_dmatag = ea->ea_dmatag;
192 1.1 uwe
193 1.26 ad ebsc->sc_pint = sparc_softintr_establish(IPL_VM,
194 1.26 ad (void *)cs4231_ebus_pint, sc);
195 1.26 ad ebsc->sc_rint = sparc_softintr_establish(IPL_VM,
196 1.26 ad (void *)cs4231_ebus_rint, sc);
197 1.24 ad
198 1.1 uwe /*
199 1.1 uwe * These are the register we get from the prom:
200 1.1 uwe * - CS4231 registers
201 1.1 uwe * - Playback EBus DMA controller
202 1.1 uwe * - Capture EBus DMA controller
203 1.1 uwe * - AUXIO audio register (codec powerdown)
204 1.1 uwe *
205 1.1 uwe * Map my registers in, if they aren't already in virtual
206 1.1 uwe * address space.
207 1.1 uwe */
208 1.4 eeh if (bus_space_map(ea->ea_bustag, EBUS_ADDR_FROM_REG(&ea->ea_reg[0]),
209 1.4 eeh ea->ea_reg[0].size, 0, &bh) != 0) {
210 1.6 uwe printf(": unable to map registers\n");
211 1.4 eeh return;
212 1.1 uwe }
213 1.18 perry
214 1.1 uwe if (bus_space_map(ea->ea_bustag,
215 1.30 mrg #ifdef MSIIEP /* XXX: Krups */
216 1.30 mrg /*
217 1.30 mrg * XXX: map playback DMA registers
218 1.30 mrg * (we just know where they are)
219 1.30 mrg */
220 1.1 uwe BUS_ADDR(0x14, 0x702000), /* XXX: magic num */
221 1.3 uwe EBUS_DMAC_SIZE,
222 1.30 mrg #else
223 1.30 mrg EBUS_ADDR_FROM_REG(&ea->ea_reg[1]),
224 1.30 mrg ea->ea_reg[1].size,
225 1.30 mrg #endif
226 1.3 uwe 0, &ebsc->sc_pdmareg) != 0)
227 1.1 uwe {
228 1.6 uwe printf(": unable to map playback DMA registers\n");
229 1.2 uwe return;
230 1.1 uwe }
231 1.1 uwe
232 1.1 uwe if (bus_space_map(ea->ea_bustag,
233 1.30 mrg #ifdef MSIIEP /* XXX: Krups */
234 1.30 mrg /*
235 1.30 mrg * XXX: map capture DMA registers
236 1.30 mrg * (we just know where they are)
237 1.30 mrg */
238 1.1 uwe BUS_ADDR(0x14, 0x704000), /* XXX: magic num */
239 1.3 uwe EBUS_DMAC_SIZE,
240 1.30 mrg #else
241 1.30 mrg EBUS_ADDR_FROM_REG(&ea->ea_reg[2]),
242 1.30 mrg ea->ea_reg[2].size,
243 1.30 mrg #endif
244 1.3 uwe 0, &ebsc->sc_cdmareg) != 0)
245 1.1 uwe {
246 1.6 uwe printf(": unable to map capture DMA registers\n");
247 1.2 uwe return;
248 1.1 uwe }
249 1.1 uwe
250 1.1 uwe /* establish interrupt channels */
251 1.1 uwe for (i = 0; i < ea->ea_nintr; ++i)
252 1.1 uwe bus_intr_establish(ea->ea_bustag,
253 1.24 ad ea->ea_intr[i], IPL_SCHED,
254 1.1 uwe cs4231_ebus_intr, ebsc);
255 1.1 uwe
256 1.1 uwe cs4231_common_attach(sc, bh);
257 1.1 uwe printf("\n");
258 1.1 uwe
259 1.1 uwe /* XXX: todo: move to cs4231_common_attach, pass hw_if as arg? */
260 1.1 uwe audio_attach_mi(&audiocs_ebus_hw_if, sc, &sc->sc_ad1848.sc_dev);
261 1.1 uwe }
262 1.1 uwe
263 1.1 uwe
264 1.13 uwe static int
265 1.17 kent cs4231_ebus_round_blocksize(void *addr, int blk, int mode,
266 1.17 kent const audio_params_t *param)
267 1.13 uwe {
268 1.13 uwe
269 1.13 uwe /* we want to use DMA burst size of 16 words */
270 1.17 kent return blk & -64;
271 1.13 uwe }
272 1.13 uwe
273 1.13 uwe
274 1.1 uwe #ifdef AUDIO_DEBUG
275 1.1 uwe static void
276 1.17 kent cs4231_ebus_regdump(char *label, struct cs4231_ebus_softc *ebsc)
277 1.1 uwe {
278 1.1 uwe /* char bits[128]; */
279 1.1 uwe
280 1.1 uwe printf("cs4231regdump(%s): regs:", label);
281 1.11 wiz /* XXX: dump ebus DMA and aux registers */
282 1.1 uwe ad1848_dump_regs(&ebsc->sc_cs4231.sc_ad1848);
283 1.1 uwe }
284 1.1 uwe #endif /* AUDIO_DEBUG */
285 1.1 uwe
286 1.1 uwe
287 1.1 uwe /* XXX: nothing CS4231-specific in this code... */
288 1.1 uwe static int
289 1.17 kent cs4231_ebus_dma_reset(bus_space_tag_t dt, bus_space_handle_t dh)
290 1.1 uwe {
291 1.3 uwe u_int32_t csr;
292 1.1 uwe int timo;
293 1.1 uwe
294 1.3 uwe /* reset, also clear TC, just in case */
295 1.3 uwe bus_space_write_4(dt, dh, EBUS_DMAC_DCSR, EBDMA_RESET | EBDMA_TC);
296 1.1 uwe
297 1.3 uwe for (timo = 50000; timo != 0; --timo) {
298 1.3 uwe csr = bus_space_read_4(dt, dh, EBUS_DMAC_DCSR);
299 1.3 uwe if ((csr & (EBDMA_CYC_PEND | EBDMA_DRAIN)) == 0)
300 1.1 uwe break;
301 1.3 uwe }
302 1.1 uwe
303 1.1 uwe if (timo == 0) {
304 1.3 uwe char bits[128];
305 1.28 christos snprintb(bits, sizeof(bits), EBUS_DCSR_BITS, csr);
306 1.28 christos printf("cs4231_ebus_dma_reset: timed out: csr=%s\n", bits);
307 1.17 kent return ETIMEDOUT;
308 1.1 uwe }
309 1.1 uwe
310 1.3 uwe bus_space_write_4(dt, dh, EBUS_DMAC_DCSR, csr & ~EBDMA_RESET);
311 1.17 kent return 0;
312 1.1 uwe }
313 1.1 uwe
314 1.1 uwe
315 1.1 uwe static void
316 1.17 kent cs4231_ebus_dma_advance(struct cs_transfer *t, bus_space_tag_t dt,
317 1.17 kent bus_space_handle_t dh)
318 1.1 uwe {
319 1.1 uwe bus_addr_t dmaaddr;
320 1.1 uwe bus_size_t dmasize;
321 1.1 uwe
322 1.1 uwe cs4231_transfer_advance(t, &dmaaddr, &dmasize);
323 1.3 uwe
324 1.3 uwe bus_space_write_4(dt, dh, EBUS_DMAC_DNBR, (u_int32_t)dmasize);
325 1.3 uwe bus_space_write_4(dt, dh, EBUS_DMAC_DNAR, (u_int32_t)dmaaddr);
326 1.1 uwe }
327 1.1 uwe
328 1.1 uwe
329 1.1 uwe /*
330 1.13 uwe * Trigger transfer "t" using DMA controller at "dt"/"dh".
331 1.1 uwe * "iswrite" defines direction of the transfer.
332 1.1 uwe */
333 1.1 uwe static int
334 1.17 kent cs4231_ebus_trigger_transfer(
335 1.17 kent struct cs4231_softc *sc,
336 1.17 kent struct cs_transfer *t,
337 1.17 kent bus_space_tag_t dt,
338 1.17 kent bus_space_handle_t dh,
339 1.17 kent int iswrite,
340 1.17 kent void *start, void *end,
341 1.17 kent int blksize,
342 1.17 kent void (*intr)(void *),
343 1.17 kent void *arg,
344 1.17 kent const audio_params_t *param)
345 1.1 uwe {
346 1.17 kent uint32_t csr;
347 1.1 uwe bus_addr_t dmaaddr;
348 1.1 uwe bus_size_t dmasize;
349 1.1 uwe int ret;
350 1.1 uwe
351 1.1 uwe ret = cs4231_transfer_init(sc, t, &dmaaddr, &dmasize,
352 1.1 uwe start, end, blksize, intr, arg);
353 1.1 uwe if (ret != 0)
354 1.17 kent return ret;
355 1.1 uwe
356 1.3 uwe ret = cs4231_ebus_dma_reset(dt, dh);
357 1.1 uwe if (ret != 0)
358 1.17 kent return ret;
359 1.1 uwe
360 1.5 martin csr = bus_space_read_4(dt, dh, EBUS_DMAC_DCSR);
361 1.5 martin bus_space_write_4(dt, dh, EBUS_DMAC_DCSR,
362 1.3 uwe csr | EBDMA_EN_NEXT | (iswrite ? EBDMA_WRITE : 0)
363 1.13 uwe | EBDMA_EN_DMA | EBDMA_EN_CNT | EBDMA_INT_EN
364 1.13 uwe | EBDMA_BURST_SIZE_16);
365 1.3 uwe
366 1.3 uwe /* first load: propagated to DACR/DBCR */
367 1.17 kent bus_space_write_4(dt, dh, EBUS_DMAC_DNBR, (uint32_t)dmasize);
368 1.17 kent bus_space_write_4(dt, dh, EBUS_DMAC_DNAR, (uint32_t)dmaaddr);
369 1.1 uwe
370 1.1 uwe /* next load: goes to DNAR/DNBR */
371 1.3 uwe cs4231_ebus_dma_advance(t, dt, dh);
372 1.1 uwe
373 1.17 kent return 0;
374 1.1 uwe }
375 1.1 uwe
376 1.1 uwe
377 1.1 uwe static int
378 1.17 kent cs4231_ebus_trigger_output(void *addr, void *start, void *end, int blksize,
379 1.17 kent void (*intr)(void *), void *arg,
380 1.17 kent const audio_params_t *param)
381 1.1 uwe {
382 1.17 kent struct cs4231_ebus_softc *ebsc;
383 1.17 kent struct cs4231_softc *sc;
384 1.3 uwe int cfg, ret;
385 1.1 uwe
386 1.17 kent ebsc = addr;
387 1.17 kent sc = &ebsc->sc_cs4231;
388 1.3 uwe ret = cs4231_ebus_trigger_transfer(sc, &sc->sc_playback,
389 1.3 uwe ebsc->sc_bt, ebsc->sc_pdmareg,
390 1.3 uwe 0, /* iswrite */
391 1.1 uwe start, end, blksize,
392 1.3 uwe intr, arg, param);
393 1.1 uwe if (ret != 0)
394 1.17 kent return ret;
395 1.1 uwe
396 1.1 uwe ad_write(&sc->sc_ad1848, SP_LOWER_BASE_COUNT, 0xff);
397 1.1 uwe ad_write(&sc->sc_ad1848, SP_UPPER_BASE_COUNT, 0xff);
398 1.1 uwe
399 1.1 uwe cfg = ad_read(&sc->sc_ad1848, SP_INTERFACE_CONFIG);
400 1.3 uwe ad_write(&sc->sc_ad1848, SP_INTERFACE_CONFIG, cfg | PLAYBACK_ENABLE);
401 1.1 uwe
402 1.17 kent return 0;
403 1.1 uwe }
404 1.1 uwe
405 1.1 uwe
406 1.1 uwe static int
407 1.17 kent cs4231_ebus_trigger_input(void *addr, void *start, void *end, int blksize,
408 1.17 kent void (*intr)(void *), void *arg,
409 1.17 kent const audio_params_t *param)
410 1.1 uwe {
411 1.17 kent struct cs4231_ebus_softc *ebsc;
412 1.17 kent struct cs4231_softc *sc;
413 1.3 uwe int cfg, ret;
414 1.1 uwe
415 1.17 kent ebsc = addr;
416 1.17 kent sc = &ebsc->sc_cs4231;
417 1.3 uwe ret = cs4231_ebus_trigger_transfer(sc, &sc->sc_capture,
418 1.3 uwe ebsc->sc_bt, ebsc->sc_cdmareg,
419 1.3 uwe 1, /* iswrite */
420 1.1 uwe start, end, blksize,
421 1.3 uwe intr, arg, param);
422 1.1 uwe if (ret != 0)
423 1.17 kent return ret;
424 1.1 uwe
425 1.1 uwe ad_write(&sc->sc_ad1848, CS_LOWER_REC_CNT, 0xff);
426 1.1 uwe ad_write(&sc->sc_ad1848, CS_UPPER_REC_CNT, 0xff);
427 1.1 uwe
428 1.1 uwe cfg = ad_read(&sc->sc_ad1848, SP_INTERFACE_CONFIG);
429 1.3 uwe ad_write(&sc->sc_ad1848, SP_INTERFACE_CONFIG, cfg | CAPTURE_ENABLE);
430 1.1 uwe
431 1.17 kent return 0;
432 1.1 uwe }
433 1.1 uwe
434 1.1 uwe
435 1.1 uwe static int
436 1.17 kent cs4231_ebus_halt_output(void *addr)
437 1.1 uwe {
438 1.17 kent struct cs4231_ebus_softc *ebsc;
439 1.17 kent struct cs4231_softc *sc;
440 1.3 uwe u_int32_t csr;
441 1.1 uwe int cfg;
442 1.1 uwe
443 1.17 kent ebsc = addr;
444 1.17 kent sc = &ebsc->sc_cs4231;
445 1.1 uwe sc->sc_playback.t_active = 0;
446 1.3 uwe
447 1.3 uwe csr = bus_space_read_4(ebsc->sc_bt, ebsc->sc_pdmareg, EBUS_DMAC_DCSR);
448 1.3 uwe bus_space_write_4(ebsc->sc_bt, ebsc->sc_pdmareg, EBUS_DMAC_DCSR,
449 1.3 uwe csr & ~EBDMA_EN_DMA);
450 1.1 uwe
451 1.1 uwe cfg = ad_read(&sc->sc_ad1848, SP_INTERFACE_CONFIG);
452 1.3 uwe ad_write(&sc->sc_ad1848, SP_INTERFACE_CONFIG,
453 1.3 uwe cfg & ~PLAYBACK_ENABLE);
454 1.1 uwe
455 1.17 kent return 0;
456 1.1 uwe }
457 1.1 uwe
458 1.1 uwe
459 1.1 uwe static int
460 1.17 kent cs4231_ebus_halt_input(void *addr)
461 1.1 uwe {
462 1.17 kent struct cs4231_ebus_softc *ebsc;
463 1.17 kent struct cs4231_softc *sc;
464 1.17 kent uint32_t csr;
465 1.1 uwe int cfg;
466 1.1 uwe
467 1.17 kent ebsc = addr;
468 1.17 kent sc = &ebsc->sc_cs4231;
469 1.1 uwe sc->sc_capture.t_active = 0;
470 1.3 uwe
471 1.3 uwe csr = bus_space_read_4(ebsc->sc_bt, ebsc->sc_cdmareg, EBUS_DMAC_DCSR);
472 1.3 uwe bus_space_write_4(ebsc->sc_bt, ebsc->sc_cdmareg, EBUS_DMAC_DCSR,
473 1.3 uwe csr & ~EBDMA_EN_DMA);
474 1.1 uwe
475 1.1 uwe cfg = ad_read(&sc->sc_ad1848, SP_INTERFACE_CONFIG);
476 1.3 uwe ad_write(&sc->sc_ad1848, SP_INTERFACE_CONFIG,
477 1.3 uwe cfg & ~CAPTURE_ENABLE);
478 1.1 uwe
479 1.17 kent return 0;
480 1.1 uwe }
481 1.1 uwe
482 1.1 uwe
483 1.1 uwe static int
484 1.17 kent cs4231_ebus_dma_intr(struct cs_transfer *t, bus_space_tag_t dt,
485 1.24 ad bus_space_handle_t dh, void *sih)
486 1.1 uwe {
487 1.17 kent uint32_t csr;
488 1.1 uwe #ifdef AUDIO_DEBUG
489 1.1 uwe char bits[128];
490 1.1 uwe #endif
491 1.1 uwe
492 1.1 uwe /* read DMA status, clear TC bit by writing it back */
493 1.3 uwe csr = bus_space_read_4(dt, dh, EBUS_DMAC_DCSR);
494 1.3 uwe bus_space_write_4(dt, dh, EBUS_DMAC_DCSR, csr);
495 1.28 christos #ifdef AUDIO_DEBUG
496 1.28 christos snprintb(bits, sizeof(bits), EBUS_DCSR_BITS, csr);
497 1.28 christos DPRINTF(("audiocs: %s dcsr=%s\n", t->t_name, bits));
498 1.29 cegger #endif
499 1.1 uwe
500 1.1 uwe if (csr & EBDMA_ERR_PEND) {
501 1.1 uwe ++t->t_ierrcnt.ev_count;
502 1.1 uwe printf("audiocs: %s DMA error, resetting\n", t->t_name);
503 1.3 uwe cs4231_ebus_dma_reset(dt, dh);
504 1.1 uwe /* how to notify audio(9)??? */
505 1.17 kent return 1;
506 1.1 uwe }
507 1.1 uwe
508 1.1 uwe if ((csr & EBDMA_INT_PEND) == 0)
509 1.17 kent return 0;
510 1.1 uwe
511 1.1 uwe ++t->t_intrcnt.ev_count;
512 1.1 uwe
513 1.1 uwe if ((csr & EBDMA_TC) == 0) { /* can this happen? */
514 1.1 uwe printf("audiocs: %s INT_PEND but !TC\n", t->t_name);
515 1.17 kent return 1;
516 1.1 uwe }
517 1.1 uwe
518 1.1 uwe if (!t->t_active)
519 1.17 kent return 1;
520 1.1 uwe
521 1.3 uwe cs4231_ebus_dma_advance(t, dt, dh);
522 1.1 uwe
523 1.11 wiz /* call audio(9) framework while DMA is chugging along */
524 1.1 uwe if (t->t_intr != NULL)
525 1.26 ad sparc_softintr_schedule(sih);
526 1.17 kent return 1;
527 1.1 uwe }
528 1.1 uwe
529 1.1 uwe
530 1.1 uwe static int
531 1.17 kent cs4231_ebus_intr(void *arg)
532 1.1 uwe {
533 1.17 kent struct cs4231_ebus_softc *ebsc;
534 1.17 kent struct cs4231_softc *sc;
535 1.1 uwe int status;
536 1.1 uwe int ret;
537 1.1 uwe #ifdef AUDIO_DEBUG
538 1.1 uwe char bits[128];
539 1.1 uwe #endif
540 1.1 uwe
541 1.17 kent ebsc = arg;
542 1.17 kent sc = &ebsc->sc_cs4231;
543 1.1 uwe status = ADREAD(&sc->sc_ad1848, AD1848_STATUS);
544 1.1 uwe
545 1.1 uwe #ifdef AUDIO_DEBUG
546 1.1 uwe if (cs4231_ebus_debug > 1)
547 1.1 uwe cs4231_ebus_regdump("audiointr", ebsc);
548 1.1 uwe
549 1.28 christos snprintb(bits, sizeof(bits), AD_R2_BITS, status);
550 1.25 cegger DPRINTF(("%s: status: %s\n", device_xname(&sc->sc_ad1848.sc_dev),
551 1.28 christos bits));
552 1.1 uwe #endif
553 1.1 uwe
554 1.1 uwe if (status & INTERRUPT_STATUS) {
555 1.1 uwe #ifdef AUDIO_DEBUG
556 1.2 uwe int reason;
557 1.1 uwe
558 1.1 uwe reason = ad_read(&sc->sc_ad1848, CS_IRQ_STATUS);
559 1.28 christos snprintb(bits, sizeof(bits), CS_I24_BITS, reason);
560 1.25 cegger DPRINTF(("%s: i24: %s\n", device_xname(&sc->sc_ad1848.sc_dev),
561 1.28 christos bits));
562 1.1 uwe #endif
563 1.1 uwe /* clear interrupt from ad1848 */
564 1.1 uwe ADWRITE(&sc->sc_ad1848, AD1848_STATUS, 0);
565 1.1 uwe }
566 1.1 uwe
567 1.1 uwe ret = 0;
568 1.1 uwe
569 1.24 ad if (cs4231_ebus_dma_intr(&sc->sc_capture, ebsc->sc_bt,
570 1.24 ad ebsc->sc_cdmareg, ebsc->sc_rint) != 0)
571 1.3 uwe {
572 1.2 uwe ++sc->sc_intrcnt.ev_count;
573 1.2 uwe ret = 1;
574 1.1 uwe }
575 1.1 uwe
576 1.24 ad if (cs4231_ebus_dma_intr(&sc->sc_playback, ebsc->sc_bt,
577 1.24 ad ebsc->sc_pdmareg, ebsc->sc_pint) != 0)
578 1.3 uwe {
579 1.2 uwe ++sc->sc_intrcnt.ev_count;
580 1.2 uwe ret = 1;
581 1.1 uwe }
582 1.1 uwe
583 1.26 ad
584 1.17 kent return ret;
585 1.1 uwe }
586 1.24 ad
587 1.26 ad static int
588 1.24 ad cs4231_ebus_pint(void *cookie)
589 1.24 ad {
590 1.24 ad struct cs4231_softc *sc = cookie;
591 1.24 ad struct cs_transfer *t = &sc->sc_playback;
592 1.24 ad
593 1.26 ad KERNEL_LOCK(1, NULL);
594 1.24 ad if (t->t_intr != NULL)
595 1.24 ad (*t->t_intr)(t->t_arg);
596 1.26 ad KERNEL_UNLOCK_ONE(NULL);
597 1.26 ad return 0;
598 1.24 ad }
599 1.24 ad
600 1.26 ad static int
601 1.24 ad cs4231_ebus_rint(void *cookie)
602 1.24 ad {
603 1.24 ad struct cs4231_softc *sc = cookie;
604 1.24 ad struct cs_transfer *t = &sc->sc_capture;
605 1.24 ad
606 1.26 ad KERNEL_LOCK(1, NULL);
607 1.24 ad if (t->t_intr != NULL)
608 1.24 ad (*t->t_intr)(t->t_arg);
609 1.26 ad KERNEL_UNLOCK_ONE(NULL);
610 1.26 ad return 0;
611 1.24 ad }
612