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cs4231_ebus.c revision 1.37.10.1
      1  1.37.10.1  christos /*	$NetBSD: cs4231_ebus.c,v 1.37.10.1 2019/06/10 22:07:07 christos Exp $ */
      2        1.1       uwe 
      3        1.1       uwe /*
      4        1.1       uwe  * Copyright (c) 2002 Valeriy E. Ushakov
      5        1.1       uwe  * All rights reserved.
      6        1.1       uwe  *
      7        1.1       uwe  * Redistribution and use in source and binary forms, with or without
      8        1.1       uwe  * modification, are permitted provided that the following conditions
      9        1.1       uwe  * are met:
     10        1.1       uwe  * 1. Redistributions of source code must retain the above copyright
     11        1.1       uwe  *    notice, this list of conditions and the following disclaimer.
     12        1.1       uwe  * 2. Redistributions in binary form must reproduce the above copyright
     13        1.1       uwe  *    notice, this list of conditions and the following disclaimer in the
     14        1.1       uwe  *    documentation and/or other materials provided with the distribution.
     15        1.1       uwe  * 3. The name of the author may not be used to endorse or promote products
     16        1.1       uwe  *    derived from this software without specific prior written permission
     17        1.1       uwe  *
     18        1.1       uwe  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     19        1.1       uwe  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     20        1.1       uwe  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     21        1.1       uwe  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     22        1.1       uwe  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     23        1.1       uwe  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     24        1.1       uwe  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     25        1.1       uwe  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     26        1.1       uwe  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     27        1.1       uwe  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     28        1.1       uwe  */
     29       1.12     lukem 
     30       1.12     lukem #include <sys/cdefs.h>
     31  1.37.10.1  christos __KERNEL_RCSID(0, "$NetBSD: cs4231_ebus.c,v 1.37.10.1 2019/06/10 22:07:07 christos Exp $");
     32       1.30       mrg 
     33       1.30       mrg #ifdef _KERNEL_OPT
     34       1.30       mrg #include "opt_sparc_arch.h"
     35       1.30       mrg #endif
     36        1.1       uwe 
     37        1.1       uwe #include <sys/param.h>
     38        1.1       uwe #include <sys/systm.h>
     39        1.1       uwe #include <sys/errno.h>
     40        1.1       uwe #include <sys/device.h>
     41       1.35  jmcneill #include <sys/cpu.h>
     42       1.35  jmcneill #include <sys/kmem.h>
     43        1.1       uwe #include <sys/malloc.h>
     44        1.1       uwe 
     45        1.1       uwe #include <machine/autoconf.h>
     46       1.24        ad 
     47        1.1       uwe #include <dev/ebus/ebusreg.h>
     48        1.1       uwe #include <dev/ebus/ebusvar.h>
     49        1.1       uwe 
     50        1.1       uwe #include <sys/audioio.h>
     51  1.37.10.1  christos #include <dev/audio/audio_if.h>
     52        1.1       uwe 
     53        1.1       uwe #include <dev/ic/ad1848reg.h>
     54        1.1       uwe #include <dev/ic/cs4231reg.h>
     55        1.1       uwe #include <dev/ic/ad1848var.h>
     56        1.1       uwe #include <dev/ic/cs4231var.h>
     57        1.1       uwe 
     58        1.1       uwe #ifdef AUDIO_DEBUG
     59        1.1       uwe int cs4231_ebus_debug = 0;
     60        1.2       uwe #define DPRINTF(x)	if (cs4231_ebus_debug) printf x
     61        1.1       uwe #else
     62        1.1       uwe #define DPRINTF(x)
     63        1.1       uwe #endif
     64        1.1       uwe 
     65        1.1       uwe 
     66        1.1       uwe struct cs4231_ebus_softc {
     67        1.1       uwe 	struct cs4231_softc sc_cs4231;
     68        1.1       uwe 
     69       1.24        ad 	void *sc_pint;
     70       1.24        ad 	void *sc_rint;
     71        1.3       uwe 	bus_space_tag_t sc_bt;
     72        1.3       uwe 	bus_space_handle_t sc_pdmareg; /* playback DMA */
     73        1.3       uwe 	bus_space_handle_t sc_cdmareg; /* record DMA */
     74        1.1       uwe };
     75        1.1       uwe 
     76        1.1       uwe 
     77       1.33    cegger void	cs4231_ebus_attach(device_t, device_t, void *);
     78       1.33    cegger int	cs4231_ebus_match(device_t, cfdata_t, void *);
     79        1.1       uwe 
     80       1.26        ad static int	cs4231_ebus_pint(void *);
     81       1.26        ad static int	cs4231_ebus_rint(void *);
     82       1.24        ad 
     83       1.34  christos CFATTACH_DECL_NEW(audiocs_ebus, sizeof(struct cs4231_ebus_softc),
     84        1.9   thorpej     cs4231_ebus_match, cs4231_ebus_attach, NULL, NULL);
     85        1.1       uwe 
     86       1.11       wiz /* audio_hw_if methods specific to ebus DMA */
     87       1.15      kent static int	cs4231_ebus_round_blocksize(void *, int, int,
     88       1.15      kent 					    const audio_params_t *);
     89        1.1       uwe static int	cs4231_ebus_trigger_output(void *, void *, void *, int,
     90        1.1       uwe 					   void (*)(void *), void *,
     91       1.16      kent 					   const audio_params_t *);
     92        1.1       uwe static int	cs4231_ebus_trigger_input(void *, void *, void *, int,
     93        1.1       uwe 					  void (*)(void *), void *,
     94       1.16      kent 					  const audio_params_t *);
     95        1.1       uwe static int	cs4231_ebus_halt_output(void *);
     96        1.1       uwe static int	cs4231_ebus_halt_input(void *);
     97        1.1       uwe 
     98       1.14      yamt const struct audio_hw_if audiocs_ebus_hw_if = {
     99  1.37.10.1  christos 	.open			= cs4231_open,
    100  1.37.10.1  christos 	.close			= cs4231_close,
    101  1.37.10.1  christos 	.query_format		= ad1848_query_format,
    102  1.37.10.1  christos 	.set_format		= ad1848_set_format,
    103  1.37.10.1  christos 	.round_blocksize	= cs4231_ebus_round_blocksize,
    104  1.37.10.1  christos 	.commit_settings	= ad1848_commit_settings,
    105  1.37.10.1  christos 	.halt_output		= cs4231_ebus_halt_output,
    106  1.37.10.1  christos 	.halt_input		= cs4231_ebus_halt_input,
    107  1.37.10.1  christos 	.getdev			= cs4231_getdev,
    108  1.37.10.1  christos 	.set_port		= cs4231_set_port,
    109  1.37.10.1  christos 	.get_port		= cs4231_get_port,
    110  1.37.10.1  christos 	.query_devinfo		= cs4231_query_devinfo,
    111  1.37.10.1  christos 	.allocm			= cs4231_malloc,
    112  1.37.10.1  christos 	.freem			= cs4231_free,
    113  1.37.10.1  christos 	.get_props		= cs4231_get_props,
    114  1.37.10.1  christos 	.trigger_output		= cs4231_ebus_trigger_output,
    115  1.37.10.1  christos 	.trigger_input		= cs4231_ebus_trigger_input,
    116  1.37.10.1  christos 	.get_locks		= ad1848_get_locks,
    117        1.1       uwe };
    118        1.1       uwe 
    119        1.1       uwe #ifdef AUDIO_DEBUG
    120       1.37    martin static void	cs4231_ebus_regdump(const char *, struct cs4231_ebus_softc *);
    121        1.1       uwe #endif
    122        1.1       uwe 
    123        1.3       uwe static int	cs4231_ebus_dma_reset(bus_space_tag_t, bus_space_handle_t);
    124        1.1       uwe static int	cs4231_ebus_trigger_transfer(struct cs4231_softc *,
    125        1.3       uwe 			struct cs_transfer *,
    126        1.3       uwe 			bus_space_tag_t, bus_space_handle_t,
    127        1.1       uwe 			int, void *, void *, int, void (*)(void *), void *,
    128       1.16      kent 			const audio_params_t *);
    129        1.1       uwe static void	cs4231_ebus_dma_advance(struct cs_transfer *,
    130        1.3       uwe 					bus_space_tag_t, bus_space_handle_t);
    131        1.1       uwe static int	cs4231_ebus_dma_intr(struct cs_transfer *,
    132       1.24        ad 				     bus_space_tag_t, bus_space_handle_t,
    133       1.24        ad 				     void *);
    134        1.1       uwe static int	cs4231_ebus_intr(void *);
    135        1.1       uwe 
    136        1.1       uwe 
    137        1.1       uwe int
    138       1.33    cegger cs4231_ebus_match(device_t parent, cfdata_t cf, void *aux)
    139        1.1       uwe {
    140       1.17      kent 	struct ebus_attach_args *ea;
    141       1.27       mrg 	char *compat;
    142       1.30       mrg 	int len, total_size;
    143        1.1       uwe 
    144       1.17      kent 	ea = aux;
    145        1.1       uwe 	if (strcmp(ea->ea_name, AUDIOCS_PROM_NAME) == 0)
    146       1.17      kent 		return 1;
    147        1.1       uwe 
    148       1.30       mrg 	compat = NULL;
    149       1.30       mrg 	if (prom_getprop(ea->ea_node, "compatible", 1, &total_size, &compat) == 0) {
    150       1.30       mrg 		do {
    151       1.30       mrg 			if (strcmp(compat, AUDIOCS_PROM_NAME) == 0)
    152       1.30       mrg 				return 1;
    153       1.31    martin #ifdef __sparc__
    154       1.31    martin 			/* on KRUPS compatible lists: "cs4231", "ad1848",
    155       1.31    martin 			 * "mwave", and "pnpPNP,b007" */
    156       1.31    martin 			if (strcmp(compat, "cs4231") == 0)
    157       1.31    martin 				return 1;
    158       1.31    martin #endif
    159       1.30       mrg 			len = strlen(compat) + 1;
    160       1.30       mrg 			total_size -= len;
    161       1.30       mrg 			compat += len;
    162       1.30       mrg 		} while (total_size > 0);
    163       1.30       mrg 	}
    164       1.27       mrg 
    165       1.17      kent 	return 0;
    166        1.1       uwe }
    167        1.1       uwe 
    168        1.1       uwe 
    169        1.1       uwe void
    170       1.33    cegger cs4231_ebus_attach(device_t parent, device_t self, void *aux)
    171       1.17      kent {
    172       1.17      kent 	struct cs4231_ebus_softc *ebsc;
    173       1.17      kent 	struct cs4231_softc *sc;
    174       1.17      kent 	struct ebus_attach_args *ea;
    175        1.1       uwe 	bus_space_handle_t bh;
    176        1.1       uwe 	int i;
    177        1.1       uwe 
    178       1.20   thorpej 	ebsc = device_private(self);
    179       1.17      kent 	sc = &ebsc->sc_cs4231;
    180       1.17      kent 	ea = aux;
    181        1.3       uwe 	sc->sc_bustag = ebsc->sc_bt = ea->ea_bustag;
    182        1.1       uwe 	sc->sc_dmatag = ea->ea_dmatag;
    183        1.1       uwe 
    184       1.26        ad 	ebsc->sc_pint = sparc_softintr_establish(IPL_VM,
    185       1.26        ad 	    (void *)cs4231_ebus_pint, sc);
    186       1.26        ad 	ebsc->sc_rint = sparc_softintr_establish(IPL_VM,
    187       1.26        ad 	    (void *)cs4231_ebus_rint, sc);
    188       1.24        ad 
    189        1.1       uwe 	/*
    190        1.1       uwe 	 * These are the register we get from the prom:
    191        1.1       uwe 	 *	- CS4231 registers
    192        1.1       uwe 	 *	- Playback EBus DMA controller
    193        1.1       uwe 	 *	- Capture EBus DMA controller
    194        1.1       uwe 	 *	- AUXIO audio register (codec powerdown)
    195        1.1       uwe 	 *
    196        1.1       uwe 	 * Map my registers in, if they aren't already in virtual
    197        1.1       uwe 	 * address space.
    198        1.1       uwe 	 */
    199        1.4       eeh 	if (bus_space_map(ea->ea_bustag, EBUS_ADDR_FROM_REG(&ea->ea_reg[0]),
    200        1.4       eeh 		ea->ea_reg[0].size, 0, &bh) != 0) {
    201        1.6       uwe 		printf(": unable to map registers\n");
    202        1.4       eeh 		return;
    203        1.1       uwe 	}
    204       1.18     perry 
    205        1.1       uwe 	if (bus_space_map(ea->ea_bustag,
    206       1.30       mrg #ifdef MSIIEP		/* XXX: Krups */
    207       1.30       mrg 			  /*
    208       1.30       mrg 			   * XXX: map playback DMA registers
    209       1.30       mrg 			   * (we just know where they are)
    210       1.30       mrg 			   */
    211        1.1       uwe 			  BUS_ADDR(0x14, 0x702000), /* XXX: magic num */
    212        1.3       uwe 			  EBUS_DMAC_SIZE,
    213       1.30       mrg #else
    214       1.30       mrg 			  EBUS_ADDR_FROM_REG(&ea->ea_reg[1]),
    215       1.30       mrg 			  ea->ea_reg[1].size,
    216       1.30       mrg #endif
    217        1.3       uwe 			  0, &ebsc->sc_pdmareg) != 0)
    218        1.1       uwe 	{
    219        1.6       uwe 		printf(": unable to map playback DMA registers\n");
    220        1.2       uwe 		return;
    221        1.1       uwe 	}
    222        1.1       uwe 
    223        1.1       uwe 	if (bus_space_map(ea->ea_bustag,
    224       1.30       mrg #ifdef MSIIEP		/* XXX: Krups */
    225       1.30       mrg 			  /*
    226       1.30       mrg 			   * XXX: map capture DMA registers
    227       1.30       mrg 			   * (we just know where they are)
    228       1.30       mrg 			   */
    229        1.1       uwe 			  BUS_ADDR(0x14, 0x704000), /* XXX: magic num */
    230        1.3       uwe 			  EBUS_DMAC_SIZE,
    231       1.30       mrg #else
    232       1.30       mrg 			  EBUS_ADDR_FROM_REG(&ea->ea_reg[2]),
    233       1.30       mrg 			  ea->ea_reg[2].size,
    234       1.30       mrg #endif
    235        1.3       uwe 			  0, &ebsc->sc_cdmareg) != 0)
    236        1.1       uwe 	{
    237        1.6       uwe 		printf(": unable to map capture DMA registers\n");
    238        1.2       uwe 		return;
    239        1.1       uwe 	}
    240        1.1       uwe 
    241       1.35  jmcneill 	ad1848_init_locks(&sc->sc_ad1848, IPL_SCHED);
    242       1.35  jmcneill 
    243        1.1       uwe 	/* establish interrupt channels */
    244        1.1       uwe 	for (i = 0; i < ea->ea_nintr; ++i)
    245        1.1       uwe 		bus_intr_establish(ea->ea_bustag,
    246       1.24        ad 				   ea->ea_intr[i], IPL_SCHED,
    247        1.1       uwe 				   cs4231_ebus_intr, ebsc);
    248        1.1       uwe 
    249       1.34  christos 	cs4231_common_attach(sc, self, bh);
    250        1.1       uwe 	printf("\n");
    251        1.1       uwe 
    252        1.1       uwe 	/* XXX: todo: move to cs4231_common_attach, pass hw_if as arg? */
    253       1.34  christos 	audio_attach_mi(&audiocs_ebus_hw_if, sc, sc->sc_ad1848.sc_dev);
    254        1.1       uwe }
    255        1.1       uwe 
    256        1.1       uwe 
    257       1.13       uwe static int
    258       1.17      kent cs4231_ebus_round_blocksize(void *addr, int blk, int mode,
    259       1.17      kent 			    const audio_params_t *param)
    260       1.13       uwe {
    261       1.36    martin 	int sz;
    262       1.13       uwe 
    263       1.13       uwe 	/* we want to use DMA burst size of 16 words */
    264       1.36    martin 	sz = blk & -64;
    265       1.36    martin 	if (sz == 0)
    266       1.36    martin 		sz = 64;	/* zero is not a good blocksize */
    267       1.36    martin 	return sz;
    268       1.13       uwe }
    269       1.13       uwe 
    270       1.13       uwe 
    271        1.1       uwe #ifdef AUDIO_DEBUG
    272        1.1       uwe static void
    273       1.37    martin cs4231_ebus_regdump(const char *label, struct cs4231_ebus_softc *ebsc)
    274        1.1       uwe {
    275        1.1       uwe 	/* char bits[128]; */
    276        1.1       uwe 
    277        1.1       uwe 	printf("cs4231regdump(%s): regs:", label);
    278       1.11       wiz 	/* XXX: dump ebus DMA and aux registers */
    279        1.1       uwe 	ad1848_dump_regs(&ebsc->sc_cs4231.sc_ad1848);
    280        1.1       uwe }
    281        1.1       uwe #endif /* AUDIO_DEBUG */
    282        1.1       uwe 
    283        1.1       uwe 
    284        1.1       uwe /* XXX: nothing CS4231-specific in this code... */
    285        1.1       uwe static int
    286       1.17      kent cs4231_ebus_dma_reset(bus_space_tag_t dt, bus_space_handle_t dh)
    287        1.1       uwe {
    288        1.3       uwe 	u_int32_t csr;
    289        1.1       uwe 	int timo;
    290        1.1       uwe 
    291        1.3       uwe 	/* reset, also clear TC, just in case */
    292        1.3       uwe 	bus_space_write_4(dt, dh, EBUS_DMAC_DCSR, EBDMA_RESET | EBDMA_TC);
    293        1.1       uwe 
    294        1.3       uwe 	for (timo = 50000; timo != 0; --timo) {
    295        1.3       uwe 		csr = bus_space_read_4(dt, dh, EBUS_DMAC_DCSR);
    296        1.3       uwe 		if ((csr & (EBDMA_CYC_PEND | EBDMA_DRAIN)) == 0)
    297        1.1       uwe 			break;
    298        1.3       uwe 	}
    299        1.1       uwe 
    300        1.1       uwe 	if (timo == 0) {
    301        1.3       uwe 		char bits[128];
    302       1.28  christos 		snprintb(bits, sizeof(bits), EBUS_DCSR_BITS, csr);
    303       1.28  christos 		printf("cs4231_ebus_dma_reset: timed out: csr=%s\n", bits);
    304       1.17      kent 		return ETIMEDOUT;
    305        1.1       uwe 	}
    306        1.1       uwe 
    307        1.3       uwe 	bus_space_write_4(dt, dh, EBUS_DMAC_DCSR, csr & ~EBDMA_RESET);
    308       1.17      kent 	return 0;
    309        1.1       uwe }
    310        1.1       uwe 
    311        1.1       uwe 
    312        1.1       uwe static void
    313       1.17      kent cs4231_ebus_dma_advance(struct cs_transfer *t, bus_space_tag_t dt,
    314       1.17      kent 			bus_space_handle_t dh)
    315        1.1       uwe {
    316        1.1       uwe 	bus_addr_t dmaaddr;
    317        1.1       uwe 	bus_size_t dmasize;
    318        1.1       uwe 
    319        1.1       uwe 	cs4231_transfer_advance(t, &dmaaddr, &dmasize);
    320        1.3       uwe 
    321        1.3       uwe 	bus_space_write_4(dt, dh, EBUS_DMAC_DNBR, (u_int32_t)dmasize);
    322        1.3       uwe 	bus_space_write_4(dt, dh, EBUS_DMAC_DNAR, (u_int32_t)dmaaddr);
    323        1.1       uwe }
    324        1.1       uwe 
    325        1.1       uwe 
    326        1.1       uwe /*
    327       1.13       uwe  * Trigger transfer "t" using DMA controller at "dt"/"dh".
    328        1.1       uwe  * "iswrite" defines direction of the transfer.
    329        1.1       uwe  */
    330        1.1       uwe static int
    331       1.17      kent cs4231_ebus_trigger_transfer(
    332       1.17      kent 	struct cs4231_softc *sc,
    333       1.17      kent 	struct cs_transfer *t,
    334       1.17      kent 	bus_space_tag_t dt,
    335       1.17      kent 	bus_space_handle_t dh,
    336       1.17      kent 	int iswrite,
    337       1.17      kent 	void *start, void *end,
    338       1.17      kent 	int blksize,
    339       1.17      kent 	void (*intr)(void *),
    340       1.17      kent 	void *arg,
    341       1.17      kent 	const audio_params_t *param)
    342        1.1       uwe {
    343       1.17      kent 	uint32_t csr;
    344        1.1       uwe 	bus_addr_t dmaaddr;
    345        1.1       uwe 	bus_size_t dmasize;
    346        1.1       uwe 	int ret;
    347        1.1       uwe 
    348        1.1       uwe 	ret = cs4231_transfer_init(sc, t, &dmaaddr, &dmasize,
    349        1.1       uwe 				   start, end, blksize, intr, arg);
    350        1.1       uwe 	if (ret != 0)
    351       1.17      kent 		return ret;
    352        1.1       uwe 
    353        1.3       uwe 	ret = cs4231_ebus_dma_reset(dt, dh);
    354        1.1       uwe 	if (ret != 0)
    355       1.17      kent 		return ret;
    356        1.1       uwe 
    357        1.5    martin 	csr = bus_space_read_4(dt, dh, EBUS_DMAC_DCSR);
    358        1.5    martin 	bus_space_write_4(dt, dh, EBUS_DMAC_DCSR,
    359        1.3       uwe 			  csr | EBDMA_EN_NEXT | (iswrite ? EBDMA_WRITE : 0)
    360       1.13       uwe 			  | EBDMA_EN_DMA | EBDMA_EN_CNT | EBDMA_INT_EN
    361       1.13       uwe 			  | EBDMA_BURST_SIZE_16);
    362        1.3       uwe 
    363        1.3       uwe 	/* first load: propagated to DACR/DBCR */
    364       1.17      kent 	bus_space_write_4(dt, dh, EBUS_DMAC_DNBR, (uint32_t)dmasize);
    365       1.17      kent 	bus_space_write_4(dt, dh, EBUS_DMAC_DNAR, (uint32_t)dmaaddr);
    366        1.1       uwe 
    367        1.1       uwe 	/* next load: goes to DNAR/DNBR */
    368        1.3       uwe 	cs4231_ebus_dma_advance(t, dt, dh);
    369        1.1       uwe 
    370       1.17      kent 	return 0;
    371        1.1       uwe }
    372        1.1       uwe 
    373        1.1       uwe 
    374        1.1       uwe static int
    375       1.17      kent cs4231_ebus_trigger_output(void *addr, void *start, void *end, int blksize,
    376       1.17      kent 			   void (*intr)(void *), void *arg,
    377       1.17      kent 			   const audio_params_t *param)
    378        1.1       uwe {
    379       1.17      kent 	struct cs4231_ebus_softc *ebsc;
    380       1.17      kent 	struct cs4231_softc *sc;
    381        1.3       uwe 	int cfg, ret;
    382        1.1       uwe 
    383       1.17      kent 	ebsc = addr;
    384       1.17      kent 	sc = &ebsc->sc_cs4231;
    385        1.3       uwe 	ret = cs4231_ebus_trigger_transfer(sc, &sc->sc_playback,
    386        1.3       uwe 					   ebsc->sc_bt, ebsc->sc_pdmareg,
    387        1.3       uwe 					   0, /* iswrite */
    388        1.1       uwe 					   start, end, blksize,
    389        1.3       uwe 					   intr, arg, param);
    390        1.1       uwe 	if (ret != 0)
    391       1.17      kent 		return ret;
    392        1.1       uwe 
    393        1.1       uwe 	ad_write(&sc->sc_ad1848, SP_LOWER_BASE_COUNT, 0xff);
    394        1.1       uwe 	ad_write(&sc->sc_ad1848, SP_UPPER_BASE_COUNT, 0xff);
    395        1.1       uwe 
    396        1.1       uwe 	cfg = ad_read(&sc->sc_ad1848, SP_INTERFACE_CONFIG);
    397        1.3       uwe 	ad_write(&sc->sc_ad1848, SP_INTERFACE_CONFIG, cfg | PLAYBACK_ENABLE);
    398        1.1       uwe 
    399       1.17      kent 	return 0;
    400        1.1       uwe }
    401        1.1       uwe 
    402        1.1       uwe 
    403        1.1       uwe static int
    404       1.17      kent cs4231_ebus_trigger_input(void *addr, void *start, void *end, int blksize,
    405       1.17      kent 			  void (*intr)(void *), void *arg,
    406       1.17      kent 			  const audio_params_t *param)
    407        1.1       uwe {
    408       1.17      kent 	struct cs4231_ebus_softc *ebsc;
    409       1.17      kent 	struct cs4231_softc *sc;
    410        1.3       uwe 	int cfg, ret;
    411        1.1       uwe 
    412       1.17      kent 	ebsc = addr;
    413       1.17      kent 	sc = &ebsc->sc_cs4231;
    414        1.3       uwe 	ret = cs4231_ebus_trigger_transfer(sc, &sc->sc_capture,
    415        1.3       uwe 					   ebsc->sc_bt, ebsc->sc_cdmareg,
    416        1.3       uwe 					   1, /* iswrite */
    417        1.1       uwe 					   start, end, blksize,
    418        1.3       uwe 					   intr, arg, param);
    419        1.1       uwe 	if (ret != 0)
    420       1.17      kent 		return ret;
    421        1.1       uwe 
    422        1.1       uwe 	ad_write(&sc->sc_ad1848, CS_LOWER_REC_CNT, 0xff);
    423        1.1       uwe 	ad_write(&sc->sc_ad1848, CS_UPPER_REC_CNT, 0xff);
    424        1.1       uwe 
    425        1.1       uwe 	cfg = ad_read(&sc->sc_ad1848, SP_INTERFACE_CONFIG);
    426        1.3       uwe 	ad_write(&sc->sc_ad1848, SP_INTERFACE_CONFIG, cfg | CAPTURE_ENABLE);
    427        1.1       uwe 
    428       1.17      kent 	return 0;
    429        1.1       uwe }
    430        1.1       uwe 
    431        1.1       uwe 
    432        1.1       uwe static int
    433       1.17      kent cs4231_ebus_halt_output(void *addr)
    434        1.1       uwe {
    435       1.17      kent 	struct cs4231_ebus_softc *ebsc;
    436       1.17      kent 	struct cs4231_softc *sc;
    437        1.3       uwe 	u_int32_t csr;
    438        1.1       uwe 	int cfg;
    439        1.1       uwe 
    440       1.17      kent 	ebsc = addr;
    441       1.17      kent 	sc = &ebsc->sc_cs4231;
    442        1.1       uwe 	sc->sc_playback.t_active = 0;
    443        1.3       uwe 
    444        1.3       uwe 	csr = bus_space_read_4(ebsc->sc_bt, ebsc->sc_pdmareg, EBUS_DMAC_DCSR);
    445        1.3       uwe 	bus_space_write_4(ebsc->sc_bt, ebsc->sc_pdmareg, EBUS_DMAC_DCSR,
    446        1.3       uwe 			  csr & ~EBDMA_EN_DMA);
    447        1.1       uwe 
    448        1.1       uwe 	cfg = ad_read(&sc->sc_ad1848, SP_INTERFACE_CONFIG);
    449        1.3       uwe 	ad_write(&sc->sc_ad1848, SP_INTERFACE_CONFIG,
    450        1.3       uwe 		 cfg & ~PLAYBACK_ENABLE);
    451        1.1       uwe 
    452       1.17      kent 	return 0;
    453        1.1       uwe }
    454        1.1       uwe 
    455        1.1       uwe 
    456        1.1       uwe static int
    457       1.17      kent cs4231_ebus_halt_input(void *addr)
    458        1.1       uwe {
    459       1.17      kent 	struct cs4231_ebus_softc *ebsc;
    460       1.17      kent 	struct cs4231_softc *sc;
    461       1.17      kent 	uint32_t csr;
    462        1.1       uwe 	int cfg;
    463        1.1       uwe 
    464       1.17      kent 	ebsc = addr;
    465       1.17      kent 	sc = &ebsc->sc_cs4231;
    466        1.1       uwe 	sc->sc_capture.t_active = 0;
    467        1.3       uwe 
    468        1.3       uwe 	csr = bus_space_read_4(ebsc->sc_bt, ebsc->sc_cdmareg, EBUS_DMAC_DCSR);
    469        1.3       uwe 	bus_space_write_4(ebsc->sc_bt, ebsc->sc_cdmareg, EBUS_DMAC_DCSR,
    470        1.3       uwe 			  csr & ~EBDMA_EN_DMA);
    471        1.1       uwe 
    472        1.1       uwe 	cfg = ad_read(&sc->sc_ad1848, SP_INTERFACE_CONFIG);
    473        1.3       uwe 	ad_write(&sc->sc_ad1848, SP_INTERFACE_CONFIG,
    474        1.3       uwe 		 cfg & ~CAPTURE_ENABLE);
    475        1.1       uwe 
    476       1.17      kent 	return 0;
    477        1.1       uwe }
    478        1.1       uwe 
    479        1.1       uwe 
    480        1.1       uwe static int
    481       1.17      kent cs4231_ebus_dma_intr(struct cs_transfer *t, bus_space_tag_t dt,
    482       1.24        ad 		     bus_space_handle_t dh, void *sih)
    483        1.1       uwe {
    484       1.17      kent 	uint32_t csr;
    485        1.1       uwe #ifdef AUDIO_DEBUG
    486        1.1       uwe 	char bits[128];
    487        1.1       uwe #endif
    488        1.1       uwe 
    489        1.1       uwe 	/* read DMA status, clear TC bit by writing it back */
    490        1.3       uwe 	csr = bus_space_read_4(dt, dh, EBUS_DMAC_DCSR);
    491        1.3       uwe 	bus_space_write_4(dt, dh, EBUS_DMAC_DCSR, csr);
    492       1.28  christos #ifdef AUDIO_DEBUG
    493       1.28  christos 	snprintb(bits, sizeof(bits), EBUS_DCSR_BITS, csr);
    494       1.28  christos 	DPRINTF(("audiocs: %s dcsr=%s\n", t->t_name, bits));
    495       1.29    cegger #endif
    496        1.1       uwe 
    497        1.1       uwe 	if (csr & EBDMA_ERR_PEND) {
    498        1.1       uwe 		++t->t_ierrcnt.ev_count;
    499        1.1       uwe 		printf("audiocs: %s DMA error, resetting\n", t->t_name);
    500        1.3       uwe 		cs4231_ebus_dma_reset(dt, dh);
    501        1.1       uwe 		/* how to notify audio(9)??? */
    502       1.17      kent 		return 1;
    503        1.1       uwe 	}
    504        1.1       uwe 
    505        1.1       uwe 	if ((csr & EBDMA_INT_PEND) == 0)
    506       1.17      kent 		return 0;
    507        1.1       uwe 
    508        1.1       uwe 	++t->t_intrcnt.ev_count;
    509        1.1       uwe 
    510        1.1       uwe 	if ((csr & EBDMA_TC) == 0) { /* can this happen? */
    511        1.1       uwe 		printf("audiocs: %s INT_PEND but !TC\n", t->t_name);
    512       1.17      kent 		return 1;
    513        1.1       uwe 	}
    514        1.1       uwe 
    515        1.1       uwe 	if (!t->t_active)
    516       1.17      kent 		return 1;
    517        1.1       uwe 
    518        1.3       uwe 	cs4231_ebus_dma_advance(t, dt, dh);
    519        1.1       uwe 
    520       1.11       wiz 	/* call audio(9) framework while DMA is chugging along */
    521        1.1       uwe 	if (t->t_intr != NULL)
    522       1.26        ad 		sparc_softintr_schedule(sih);
    523       1.17      kent 	return 1;
    524        1.1       uwe }
    525        1.1       uwe 
    526        1.1       uwe 
    527        1.1       uwe static int
    528       1.17      kent cs4231_ebus_intr(void *arg)
    529        1.1       uwe {
    530       1.17      kent 	struct cs4231_ebus_softc *ebsc;
    531       1.17      kent 	struct cs4231_softc *sc;
    532        1.1       uwe 	int status;
    533        1.1       uwe 	int ret;
    534        1.1       uwe #ifdef AUDIO_DEBUG
    535        1.1       uwe 	char bits[128];
    536        1.1       uwe #endif
    537        1.1       uwe 
    538       1.17      kent 	ebsc = arg;
    539       1.17      kent 	sc = &ebsc->sc_cs4231;
    540       1.35  jmcneill 	mutex_spin_enter(&sc->sc_ad1848.sc_intr_lock);
    541       1.35  jmcneill 
    542        1.1       uwe 	status = ADREAD(&sc->sc_ad1848, AD1848_STATUS);
    543        1.1       uwe 
    544        1.1       uwe #ifdef AUDIO_DEBUG
    545        1.1       uwe 	if (cs4231_ebus_debug > 1)
    546        1.1       uwe 		cs4231_ebus_regdump("audiointr", ebsc);
    547        1.1       uwe 
    548       1.28  christos 	snprintb(bits, sizeof(bits), AD_R2_BITS, status);
    549       1.34  christos 	DPRINTF(("%s: status: %s\n", device_xname(sc->sc_ad1848.sc_dev),
    550       1.28  christos 	    bits));
    551        1.1       uwe #endif
    552        1.1       uwe 
    553        1.1       uwe 	if (status & INTERRUPT_STATUS) {
    554        1.1       uwe #ifdef AUDIO_DEBUG
    555        1.2       uwe 		int reason;
    556        1.1       uwe 
    557        1.1       uwe 		reason = ad_read(&sc->sc_ad1848, CS_IRQ_STATUS);
    558       1.28  christos 	        snprintb(bits, sizeof(bits), CS_I24_BITS, reason);
    559       1.34  christos 		DPRINTF(("%s: i24: %s\n", device_xname(sc->sc_ad1848.sc_dev),
    560       1.28  christos 		    bits));
    561        1.1       uwe #endif
    562        1.1       uwe 		/* clear interrupt from ad1848 */
    563        1.1       uwe 		ADWRITE(&sc->sc_ad1848, AD1848_STATUS, 0);
    564        1.1       uwe 	}
    565        1.1       uwe 
    566        1.1       uwe 	ret = 0;
    567        1.1       uwe 
    568       1.24        ad 	if (cs4231_ebus_dma_intr(&sc->sc_capture, ebsc->sc_bt,
    569       1.24        ad 	    ebsc->sc_cdmareg, ebsc->sc_rint) != 0)
    570        1.3       uwe 	{
    571        1.2       uwe 		++sc->sc_intrcnt.ev_count;
    572        1.2       uwe 		ret = 1;
    573        1.1       uwe 	}
    574        1.1       uwe 
    575       1.24        ad 	if (cs4231_ebus_dma_intr(&sc->sc_playback, ebsc->sc_bt,
    576       1.24        ad 	    ebsc->sc_pdmareg, ebsc->sc_pint) != 0)
    577        1.3       uwe 	{
    578        1.2       uwe 		++sc->sc_intrcnt.ev_count;
    579        1.2       uwe 		ret = 1;
    580        1.1       uwe 	}
    581        1.1       uwe 
    582       1.35  jmcneill 	mutex_spin_exit(&sc->sc_ad1848.sc_intr_lock);
    583       1.26        ad 
    584       1.17      kent 	return ret;
    585        1.1       uwe }
    586       1.24        ad 
    587       1.26        ad static int
    588       1.24        ad cs4231_ebus_pint(void *cookie)
    589       1.24        ad {
    590       1.24        ad 	struct cs4231_softc *sc = cookie;
    591       1.24        ad 	struct cs_transfer *t = &sc->sc_playback;
    592       1.24        ad 
    593       1.35  jmcneill 	mutex_spin_enter(&sc->sc_ad1848.sc_intr_lock);
    594       1.24        ad 	if (t->t_intr != NULL)
    595       1.24        ad 		(*t->t_intr)(t->t_arg);
    596       1.35  jmcneill 	mutex_spin_exit(&sc->sc_ad1848.sc_intr_lock);
    597       1.26        ad 	return 0;
    598       1.24        ad }
    599       1.24        ad 
    600       1.26        ad static int
    601       1.24        ad cs4231_ebus_rint(void *cookie)
    602       1.24        ad {
    603       1.24        ad 	struct cs4231_softc *sc = cookie;
    604       1.24        ad 	struct cs_transfer *t = &sc->sc_capture;
    605       1.24        ad 
    606       1.35  jmcneill 	mutex_spin_enter(&sc->sc_ad1848.sc_intr_lock);
    607       1.24        ad 	if (t->t_intr != NULL)
    608       1.24        ad 		(*t->t_intr)(t->t_arg);
    609       1.35  jmcneill 	mutex_spin_exit(&sc->sc_ad1848.sc_intr_lock);
    610       1.26        ad 	return 0;
    611       1.24        ad }
    612