cs4231_ebus.c revision 1.27
1 /* $NetBSD: cs4231_ebus.c,v 1.27 2008/12/11 07:09:00 mrg Exp $ */ 2 3 /* 4 * Copyright (c) 2002 Valeriy E. Ushakov 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The name of the author may not be used to endorse or promote products 16 * derived from this software without specific prior written permission 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 */ 29 30 #include <sys/cdefs.h> 31 __KERNEL_RCSID(0, "$NetBSD: cs4231_ebus.c,v 1.27 2008/12/11 07:09:00 mrg Exp $"); 32 33 #include <sys/param.h> 34 #include <sys/systm.h> 35 #include <sys/errno.h> 36 #include <sys/device.h> 37 #include <sys/malloc.h> 38 #include <sys/cpu.h> 39 40 #include <machine/autoconf.h> 41 42 #include <dev/ebus/ebusreg.h> 43 #include <dev/ebus/ebusvar.h> 44 45 #include <sys/audioio.h> 46 #include <dev/audio_if.h> 47 48 #include <dev/ic/ad1848reg.h> 49 #include <dev/ic/cs4231reg.h> 50 #include <dev/ic/ad1848var.h> 51 #include <dev/ic/cs4231var.h> 52 53 #ifdef AUDIO_DEBUG 54 int cs4231_ebus_debug = 0; 55 #define DPRINTF(x) if (cs4231_ebus_debug) printf x 56 #else 57 #define DPRINTF(x) 58 #endif 59 60 61 struct cs4231_ebus_softc { 62 struct cs4231_softc sc_cs4231; 63 64 void *sc_pint; 65 void *sc_rint; 66 bus_space_tag_t sc_bt; 67 bus_space_handle_t sc_pdmareg; /* playback DMA */ 68 bus_space_handle_t sc_cdmareg; /* record DMA */ 69 }; 70 71 72 void cs4231_ebus_attach(struct device *, struct device *, void *); 73 int cs4231_ebus_match(struct device *, struct cfdata *, void *); 74 75 static int cs4231_ebus_pint(void *); 76 static int cs4231_ebus_rint(void *); 77 78 CFATTACH_DECL(audiocs_ebus, sizeof(struct cs4231_ebus_softc), 79 cs4231_ebus_match, cs4231_ebus_attach, NULL, NULL); 80 81 /* audio_hw_if methods specific to ebus DMA */ 82 static int cs4231_ebus_round_blocksize(void *, int, int, 83 const audio_params_t *); 84 static int cs4231_ebus_trigger_output(void *, void *, void *, int, 85 void (*)(void *), void *, 86 const audio_params_t *); 87 static int cs4231_ebus_trigger_input(void *, void *, void *, int, 88 void (*)(void *), void *, 89 const audio_params_t *); 90 static int cs4231_ebus_halt_output(void *); 91 static int cs4231_ebus_halt_input(void *); 92 93 const struct audio_hw_if audiocs_ebus_hw_if = { 94 cs4231_open, 95 cs4231_close, 96 NULL, /* drain */ 97 ad1848_query_encoding, 98 ad1848_set_params, 99 cs4231_ebus_round_blocksize, 100 ad1848_commit_settings, 101 NULL, /* init_output */ 102 NULL, /* init_input */ 103 NULL, /* start_output */ 104 NULL, /* start_input */ 105 cs4231_ebus_halt_output, 106 cs4231_ebus_halt_input, 107 NULL, /* speaker_ctl */ 108 cs4231_getdev, 109 NULL, /* setfd */ 110 cs4231_set_port, 111 cs4231_get_port, 112 cs4231_query_devinfo, 113 cs4231_malloc, 114 cs4231_free, 115 NULL, /* round_buffersize */ 116 NULL, /* mappage */ 117 cs4231_get_props, 118 cs4231_ebus_trigger_output, 119 cs4231_ebus_trigger_input, 120 NULL, /* dev_ioctl */ 121 NULL, /* powerstate */ 122 }; 123 124 #ifdef AUDIO_DEBUG 125 static void cs4231_ebus_regdump(char *, struct cs4231_ebus_softc *); 126 #endif 127 128 static int cs4231_ebus_dma_reset(bus_space_tag_t, bus_space_handle_t); 129 static int cs4231_ebus_trigger_transfer(struct cs4231_softc *, 130 struct cs_transfer *, 131 bus_space_tag_t, bus_space_handle_t, 132 int, void *, void *, int, void (*)(void *), void *, 133 const audio_params_t *); 134 static void cs4231_ebus_dma_advance(struct cs_transfer *, 135 bus_space_tag_t, bus_space_handle_t); 136 static int cs4231_ebus_dma_intr(struct cs_transfer *, 137 bus_space_tag_t, bus_space_handle_t, 138 void *); 139 static int cs4231_ebus_intr(void *); 140 141 142 int 143 cs4231_ebus_match(struct device *parent, struct cfdata *cf, void *aux) 144 { 145 struct ebus_attach_args *ea; 146 char *compat; 147 148 ea = aux; 149 if (strcmp(ea->ea_name, AUDIOCS_PROM_NAME) == 0) 150 return 1; 151 #ifdef __sparc__ /* XXX: Krups */ 152 if (strcmp(ea->ea_name, "sound") == 0) 153 return 1; 154 #endif 155 156 compat = prom_getpropstring(ea->ea_node, "compatible"); 157 if (compat && strcmp(compat, AUDIOCS_PROM_NAME) == 0) 158 return 1; 159 160 return 0; 161 } 162 163 164 void 165 cs4231_ebus_attach(struct device *parent, struct device *self, void *aux) 166 { 167 struct cs4231_ebus_softc *ebsc; 168 struct cs4231_softc *sc; 169 struct ebus_attach_args *ea; 170 bus_space_handle_t bh; 171 int i; 172 173 ebsc = device_private(self); 174 sc = &ebsc->sc_cs4231; 175 ea = aux; 176 sc->sc_bustag = ebsc->sc_bt = ea->ea_bustag; 177 sc->sc_dmatag = ea->ea_dmatag; 178 179 ebsc->sc_pint = sparc_softintr_establish(IPL_VM, 180 (void *)cs4231_ebus_pint, sc); 181 ebsc->sc_rint = sparc_softintr_establish(IPL_VM, 182 (void *)cs4231_ebus_rint, sc); 183 184 /* 185 * These are the register we get from the prom: 186 * - CS4231 registers 187 * - Playback EBus DMA controller 188 * - Capture EBus DMA controller 189 * - AUXIO audio register (codec powerdown) 190 * 191 * Map my registers in, if they aren't already in virtual 192 * address space. 193 */ 194 if (bus_space_map(ea->ea_bustag, EBUS_ADDR_FROM_REG(&ea->ea_reg[0]), 195 ea->ea_reg[0].size, 0, &bh) != 0) { 196 printf(": unable to map registers\n"); 197 return; 198 } 199 200 /* XXX: map playback DMA registers (we just know where they are) */ 201 if (bus_space_map(ea->ea_bustag, 202 BUS_ADDR(0x14, 0x702000), /* XXX: magic num */ 203 EBUS_DMAC_SIZE, 204 0, &ebsc->sc_pdmareg) != 0) 205 { 206 printf(": unable to map playback DMA registers\n"); 207 return; 208 } 209 210 /* XXX: map capture DMA registers (we just know where they are) */ 211 if (bus_space_map(ea->ea_bustag, 212 BUS_ADDR(0x14, 0x704000), /* XXX: magic num */ 213 EBUS_DMAC_SIZE, 214 0, &ebsc->sc_cdmareg) != 0) 215 { 216 printf(": unable to map capture DMA registers\n"); 217 return; 218 } 219 220 /* establish interrupt channels */ 221 for (i = 0; i < ea->ea_nintr; ++i) 222 bus_intr_establish(ea->ea_bustag, 223 ea->ea_intr[i], IPL_SCHED, 224 cs4231_ebus_intr, ebsc); 225 226 cs4231_common_attach(sc, bh); 227 printf("\n"); 228 229 /* XXX: todo: move to cs4231_common_attach, pass hw_if as arg? */ 230 audio_attach_mi(&audiocs_ebus_hw_if, sc, &sc->sc_ad1848.sc_dev); 231 } 232 233 234 static int 235 cs4231_ebus_round_blocksize(void *addr, int blk, int mode, 236 const audio_params_t *param) 237 { 238 239 /* we want to use DMA burst size of 16 words */ 240 return blk & -64; 241 } 242 243 244 #ifdef AUDIO_DEBUG 245 static void 246 cs4231_ebus_regdump(char *label, struct cs4231_ebus_softc *ebsc) 247 { 248 /* char bits[128]; */ 249 250 printf("cs4231regdump(%s): regs:", label); 251 /* XXX: dump ebus DMA and aux registers */ 252 ad1848_dump_regs(&ebsc->sc_cs4231.sc_ad1848); 253 } 254 #endif /* AUDIO_DEBUG */ 255 256 257 /* XXX: nothing CS4231-specific in this code... */ 258 static int 259 cs4231_ebus_dma_reset(bus_space_tag_t dt, bus_space_handle_t dh) 260 { 261 u_int32_t csr; 262 int timo; 263 264 /* reset, also clear TC, just in case */ 265 bus_space_write_4(dt, dh, EBUS_DMAC_DCSR, EBDMA_RESET | EBDMA_TC); 266 267 for (timo = 50000; timo != 0; --timo) { 268 csr = bus_space_read_4(dt, dh, EBUS_DMAC_DCSR); 269 if ((csr & (EBDMA_CYC_PEND | EBDMA_DRAIN)) == 0) 270 break; 271 } 272 273 if (timo == 0) { 274 char bits[128]; 275 276 printf("cs4231_ebus_dma_reset: timed out: csr=%s\n", 277 bitmask_snprintf(csr, EBUS_DCSR_BITS, 278 bits, sizeof(bits))); 279 return ETIMEDOUT; 280 } 281 282 bus_space_write_4(dt, dh, EBUS_DMAC_DCSR, csr & ~EBDMA_RESET); 283 return 0; 284 } 285 286 287 static void 288 cs4231_ebus_dma_advance(struct cs_transfer *t, bus_space_tag_t dt, 289 bus_space_handle_t dh) 290 { 291 bus_addr_t dmaaddr; 292 bus_size_t dmasize; 293 294 cs4231_transfer_advance(t, &dmaaddr, &dmasize); 295 296 bus_space_write_4(dt, dh, EBUS_DMAC_DNBR, (u_int32_t)dmasize); 297 bus_space_write_4(dt, dh, EBUS_DMAC_DNAR, (u_int32_t)dmaaddr); 298 } 299 300 301 /* 302 * Trigger transfer "t" using DMA controller at "dt"/"dh". 303 * "iswrite" defines direction of the transfer. 304 */ 305 static int 306 cs4231_ebus_trigger_transfer( 307 struct cs4231_softc *sc, 308 struct cs_transfer *t, 309 bus_space_tag_t dt, 310 bus_space_handle_t dh, 311 int iswrite, 312 void *start, void *end, 313 int blksize, 314 void (*intr)(void *), 315 void *arg, 316 const audio_params_t *param) 317 { 318 uint32_t csr; 319 bus_addr_t dmaaddr; 320 bus_size_t dmasize; 321 int ret; 322 323 ret = cs4231_transfer_init(sc, t, &dmaaddr, &dmasize, 324 start, end, blksize, intr, arg); 325 if (ret != 0) 326 return ret; 327 328 ret = cs4231_ebus_dma_reset(dt, dh); 329 if (ret != 0) 330 return ret; 331 332 csr = bus_space_read_4(dt, dh, EBUS_DMAC_DCSR); 333 bus_space_write_4(dt, dh, EBUS_DMAC_DCSR, 334 csr | EBDMA_EN_NEXT | (iswrite ? EBDMA_WRITE : 0) 335 | EBDMA_EN_DMA | EBDMA_EN_CNT | EBDMA_INT_EN 336 | EBDMA_BURST_SIZE_16); 337 338 /* first load: propagated to DACR/DBCR */ 339 bus_space_write_4(dt, dh, EBUS_DMAC_DNBR, (uint32_t)dmasize); 340 bus_space_write_4(dt, dh, EBUS_DMAC_DNAR, (uint32_t)dmaaddr); 341 342 /* next load: goes to DNAR/DNBR */ 343 cs4231_ebus_dma_advance(t, dt, dh); 344 345 return 0; 346 } 347 348 349 static int 350 cs4231_ebus_trigger_output(void *addr, void *start, void *end, int blksize, 351 void (*intr)(void *), void *arg, 352 const audio_params_t *param) 353 { 354 struct cs4231_ebus_softc *ebsc; 355 struct cs4231_softc *sc; 356 int cfg, ret; 357 358 ebsc = addr; 359 sc = &ebsc->sc_cs4231; 360 ret = cs4231_ebus_trigger_transfer(sc, &sc->sc_playback, 361 ebsc->sc_bt, ebsc->sc_pdmareg, 362 0, /* iswrite */ 363 start, end, blksize, 364 intr, arg, param); 365 if (ret != 0) 366 return ret; 367 368 ad_write(&sc->sc_ad1848, SP_LOWER_BASE_COUNT, 0xff); 369 ad_write(&sc->sc_ad1848, SP_UPPER_BASE_COUNT, 0xff); 370 371 cfg = ad_read(&sc->sc_ad1848, SP_INTERFACE_CONFIG); 372 ad_write(&sc->sc_ad1848, SP_INTERFACE_CONFIG, cfg | PLAYBACK_ENABLE); 373 374 return 0; 375 } 376 377 378 static int 379 cs4231_ebus_trigger_input(void *addr, void *start, void *end, int blksize, 380 void (*intr)(void *), void *arg, 381 const audio_params_t *param) 382 { 383 struct cs4231_ebus_softc *ebsc; 384 struct cs4231_softc *sc; 385 int cfg, ret; 386 387 ebsc = addr; 388 sc = &ebsc->sc_cs4231; 389 ret = cs4231_ebus_trigger_transfer(sc, &sc->sc_capture, 390 ebsc->sc_bt, ebsc->sc_cdmareg, 391 1, /* iswrite */ 392 start, end, blksize, 393 intr, arg, param); 394 if (ret != 0) 395 return ret; 396 397 ad_write(&sc->sc_ad1848, CS_LOWER_REC_CNT, 0xff); 398 ad_write(&sc->sc_ad1848, CS_UPPER_REC_CNT, 0xff); 399 400 cfg = ad_read(&sc->sc_ad1848, SP_INTERFACE_CONFIG); 401 ad_write(&sc->sc_ad1848, SP_INTERFACE_CONFIG, cfg | CAPTURE_ENABLE); 402 403 return 0; 404 } 405 406 407 static int 408 cs4231_ebus_halt_output(void *addr) 409 { 410 struct cs4231_ebus_softc *ebsc; 411 struct cs4231_softc *sc; 412 u_int32_t csr; 413 int cfg; 414 415 ebsc = addr; 416 sc = &ebsc->sc_cs4231; 417 sc->sc_playback.t_active = 0; 418 419 csr = bus_space_read_4(ebsc->sc_bt, ebsc->sc_pdmareg, EBUS_DMAC_DCSR); 420 bus_space_write_4(ebsc->sc_bt, ebsc->sc_pdmareg, EBUS_DMAC_DCSR, 421 csr & ~EBDMA_EN_DMA); 422 423 cfg = ad_read(&sc->sc_ad1848, SP_INTERFACE_CONFIG); 424 ad_write(&sc->sc_ad1848, SP_INTERFACE_CONFIG, 425 cfg & ~PLAYBACK_ENABLE); 426 427 return 0; 428 } 429 430 431 static int 432 cs4231_ebus_halt_input(void *addr) 433 { 434 struct cs4231_ebus_softc *ebsc; 435 struct cs4231_softc *sc; 436 uint32_t csr; 437 int cfg; 438 439 ebsc = addr; 440 sc = &ebsc->sc_cs4231; 441 sc->sc_capture.t_active = 0; 442 443 csr = bus_space_read_4(ebsc->sc_bt, ebsc->sc_cdmareg, EBUS_DMAC_DCSR); 444 bus_space_write_4(ebsc->sc_bt, ebsc->sc_cdmareg, EBUS_DMAC_DCSR, 445 csr & ~EBDMA_EN_DMA); 446 447 cfg = ad_read(&sc->sc_ad1848, SP_INTERFACE_CONFIG); 448 ad_write(&sc->sc_ad1848, SP_INTERFACE_CONFIG, 449 cfg & ~CAPTURE_ENABLE); 450 451 return 0; 452 } 453 454 455 static int 456 cs4231_ebus_dma_intr(struct cs_transfer *t, bus_space_tag_t dt, 457 bus_space_handle_t dh, void *sih) 458 { 459 uint32_t csr; 460 #ifdef AUDIO_DEBUG 461 char bits[128]; 462 #endif 463 464 /* read DMA status, clear TC bit by writing it back */ 465 csr = bus_space_read_4(dt, dh, EBUS_DMAC_DCSR); 466 bus_space_write_4(dt, dh, EBUS_DMAC_DCSR, csr); 467 DPRINTF(("audiocs: %s dcsr=%s\n", t->t_name, 468 bitmask_snprintf(csr, EBUS_DCSR_BITS, bits, sizeof(bits)))); 469 470 if (csr & EBDMA_ERR_PEND) { 471 ++t->t_ierrcnt.ev_count; 472 printf("audiocs: %s DMA error, resetting\n", t->t_name); 473 cs4231_ebus_dma_reset(dt, dh); 474 /* how to notify audio(9)??? */ 475 return 1; 476 } 477 478 if ((csr & EBDMA_INT_PEND) == 0) 479 return 0; 480 481 ++t->t_intrcnt.ev_count; 482 483 if ((csr & EBDMA_TC) == 0) { /* can this happen? */ 484 printf("audiocs: %s INT_PEND but !TC\n", t->t_name); 485 return 1; 486 } 487 488 if (!t->t_active) 489 return 1; 490 491 cs4231_ebus_dma_advance(t, dt, dh); 492 493 /* call audio(9) framework while DMA is chugging along */ 494 if (t->t_intr != NULL) 495 sparc_softintr_schedule(sih); 496 return 1; 497 } 498 499 500 static int 501 cs4231_ebus_intr(void *arg) 502 { 503 struct cs4231_ebus_softc *ebsc; 504 struct cs4231_softc *sc; 505 int status; 506 int ret; 507 #ifdef AUDIO_DEBUG 508 char bits[128]; 509 #endif 510 511 ebsc = arg; 512 sc = &ebsc->sc_cs4231; 513 status = ADREAD(&sc->sc_ad1848, AD1848_STATUS); 514 515 #ifdef AUDIO_DEBUG 516 if (cs4231_ebus_debug > 1) 517 cs4231_ebus_regdump("audiointr", ebsc); 518 519 DPRINTF(("%s: status: %s\n", device_xname(&sc->sc_ad1848.sc_dev), 520 bitmask_snprintf(status, AD_R2_BITS, bits, sizeof(bits)))); 521 #endif 522 523 if (status & INTERRUPT_STATUS) { 524 #ifdef AUDIO_DEBUG 525 int reason; 526 527 reason = ad_read(&sc->sc_ad1848, CS_IRQ_STATUS); 528 DPRINTF(("%s: i24: %s\n", device_xname(&sc->sc_ad1848.sc_dev), 529 bitmask_snprintf(reason, CS_I24_BITS, bits, sizeof(bits)))); 530 #endif 531 /* clear interrupt from ad1848 */ 532 ADWRITE(&sc->sc_ad1848, AD1848_STATUS, 0); 533 } 534 535 ret = 0; 536 537 if (cs4231_ebus_dma_intr(&sc->sc_capture, ebsc->sc_bt, 538 ebsc->sc_cdmareg, ebsc->sc_rint) != 0) 539 { 540 ++sc->sc_intrcnt.ev_count; 541 ret = 1; 542 } 543 544 if (cs4231_ebus_dma_intr(&sc->sc_playback, ebsc->sc_bt, 545 ebsc->sc_pdmareg, ebsc->sc_pint) != 0) 546 { 547 ++sc->sc_intrcnt.ev_count; 548 ret = 1; 549 } 550 551 552 return ret; 553 } 554 555 static int 556 cs4231_ebus_pint(void *cookie) 557 { 558 struct cs4231_softc *sc = cookie; 559 struct cs_transfer *t = &sc->sc_playback; 560 561 KERNEL_LOCK(1, NULL); 562 if (t->t_intr != NULL) 563 (*t->t_intr)(t->t_arg); 564 KERNEL_UNLOCK_ONE(NULL); 565 return 0; 566 } 567 568 static int 569 cs4231_ebus_rint(void *cookie) 570 { 571 struct cs4231_softc *sc = cookie; 572 struct cs_transfer *t = &sc->sc_capture; 573 574 KERNEL_LOCK(1, NULL); 575 if (t->t_intr != NULL) 576 (*t->t_intr)(t->t_arg); 577 KERNEL_UNLOCK_ONE(NULL); 578 return 0; 579 } 580
Indexes created Wed Sep 24 05:09:52 GMT 2025