cs4231_ebus.c revision 1.34.4.1 1 /* $NetBSD: cs4231_ebus.c,v 1.34.4.1 2011/11/20 09:40:19 mrg Exp $ */
2
3 /*
4 * Copyright (c) 2002 Valeriy E. Ushakov
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. The name of the author may not be used to endorse or promote products
16 * derived from this software without specific prior written permission
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 */
29
30 #include <sys/cdefs.h>
31 __KERNEL_RCSID(0, "$NetBSD: cs4231_ebus.c,v 1.34.4.1 2011/11/20 09:40:19 mrg Exp $");
32
33 #ifdef _KERNEL_OPT
34 #include "opt_sparc_arch.h"
35 #endif
36
37 #include <sys/param.h>
38 #include <sys/systm.h>
39 #include <sys/errno.h>
40 #include <sys/device.h>
41 #include <sys/cpu.h>
42 #include <sys/kmem.h>
43 #include <sys/malloc.h>
44
45 #include <machine/autoconf.h>
46
47 #include <dev/ebus/ebusreg.h>
48 #include <dev/ebus/ebusvar.h>
49
50 #include <sys/audioio.h>
51 #include <dev/audio_if.h>
52
53 #include <dev/ic/ad1848reg.h>
54 #include <dev/ic/cs4231reg.h>
55 #include <dev/ic/ad1848var.h>
56 #include <dev/ic/cs4231var.h>
57
58 #ifdef AUDIO_DEBUG
59 int cs4231_ebus_debug = 0;
60 #define DPRINTF(x) if (cs4231_ebus_debug) printf x
61 #else
62 #define DPRINTF(x)
63 #endif
64
65
66 struct cs4231_ebus_softc {
67 struct cs4231_softc sc_cs4231;
68
69 void *sc_pint;
70 void *sc_rint;
71 bus_space_tag_t sc_bt;
72 bus_space_handle_t sc_pdmareg; /* playback DMA */
73 bus_space_handle_t sc_cdmareg; /* record DMA */
74 };
75
76
77 void cs4231_ebus_attach(device_t, device_t, void *);
78 int cs4231_ebus_match(device_t, cfdata_t, void *);
79
80 static int cs4231_ebus_pint(void *);
81 static int cs4231_ebus_rint(void *);
82
83 CFATTACH_DECL_NEW(audiocs_ebus, sizeof(struct cs4231_ebus_softc),
84 cs4231_ebus_match, cs4231_ebus_attach, NULL, NULL);
85
86 /* audio_hw_if methods specific to ebus DMA */
87 static int cs4231_ebus_round_blocksize(void *, int, int,
88 const audio_params_t *);
89 static int cs4231_ebus_trigger_output(void *, void *, void *, int,
90 void (*)(void *), void *,
91 const audio_params_t *);
92 static int cs4231_ebus_trigger_input(void *, void *, void *, int,
93 void (*)(void *), void *,
94 const audio_params_t *);
95 static int cs4231_ebus_halt_output(void *);
96 static int cs4231_ebus_halt_input(void *);
97
98 const struct audio_hw_if audiocs_ebus_hw_if = {
99 cs4231_open,
100 cs4231_close,
101 NULL, /* drain */
102 ad1848_query_encoding,
103 ad1848_set_params,
104 cs4231_ebus_round_blocksize,
105 ad1848_commit_settings,
106 NULL, /* init_output */
107 NULL, /* init_input */
108 NULL, /* start_output */
109 NULL, /* start_input */
110 cs4231_ebus_halt_output,
111 cs4231_ebus_halt_input,
112 NULL, /* speaker_ctl */
113 cs4231_getdev,
114 NULL, /* setfd */
115 cs4231_set_port,
116 cs4231_get_port,
117 cs4231_query_devinfo,
118 cs4231_malloc,
119 cs4231_free,
120 NULL, /* round_buffersize */
121 NULL, /* mappage */
122 cs4231_get_props,
123 cs4231_ebus_trigger_output,
124 cs4231_ebus_trigger_input,
125 NULL, /* dev_ioctl */
126 NULL, /* powerstate */
127 ad1848_get_locks,
128 };
129
130 #ifdef AUDIO_DEBUG
131 static void cs4231_ebus_regdump(char *, struct cs4231_ebus_softc *);
132 #endif
133
134 static int cs4231_ebus_dma_reset(bus_space_tag_t, bus_space_handle_t);
135 static int cs4231_ebus_trigger_transfer(struct cs4231_softc *,
136 struct cs_transfer *,
137 bus_space_tag_t, bus_space_handle_t,
138 int, void *, void *, int, void (*)(void *), void *,
139 const audio_params_t *);
140 static void cs4231_ebus_dma_advance(struct cs_transfer *,
141 bus_space_tag_t, bus_space_handle_t);
142 static int cs4231_ebus_dma_intr(struct cs_transfer *,
143 bus_space_tag_t, bus_space_handle_t,
144 void *);
145 static int cs4231_ebus_intr(void *);
146
147
148 int
149 cs4231_ebus_match(device_t parent, cfdata_t cf, void *aux)
150 {
151 struct ebus_attach_args *ea;
152 char *compat;
153 int len, total_size;
154
155 ea = aux;
156 if (strcmp(ea->ea_name, AUDIOCS_PROM_NAME) == 0)
157 return 1;
158
159 compat = NULL;
160 if (prom_getprop(ea->ea_node, "compatible", 1, &total_size, &compat) == 0) {
161 do {
162 if (strcmp(compat, AUDIOCS_PROM_NAME) == 0)
163 return 1;
164 #ifdef __sparc__
165 /* on KRUPS compatible lists: "cs4231", "ad1848",
166 * "mwave", and "pnpPNP,b007" */
167 if (strcmp(compat, "cs4231") == 0)
168 return 1;
169 #endif
170 len = strlen(compat) + 1;
171 total_size -= len;
172 compat += len;
173 } while (total_size > 0);
174 }
175
176 return 0;
177 }
178
179
180 void
181 cs4231_ebus_attach(device_t parent, device_t self, void *aux)
182 {
183 struct cs4231_ebus_softc *ebsc;
184 struct cs4231_softc *sc;
185 struct ebus_attach_args *ea;
186 bus_space_handle_t bh;
187 int i;
188
189 ebsc = device_private(self);
190 sc = &ebsc->sc_cs4231;
191 ea = aux;
192 sc->sc_bustag = ebsc->sc_bt = ea->ea_bustag;
193 sc->sc_dmatag = ea->ea_dmatag;
194
195 ebsc->sc_pint = sparc_softintr_establish(IPL_VM,
196 (void *)cs4231_ebus_pint, sc);
197 ebsc->sc_rint = sparc_softintr_establish(IPL_VM,
198 (void *)cs4231_ebus_rint, sc);
199
200 /*
201 * These are the register we get from the prom:
202 * - CS4231 registers
203 * - Playback EBus DMA controller
204 * - Capture EBus DMA controller
205 * - AUXIO audio register (codec powerdown)
206 *
207 * Map my registers in, if they aren't already in virtual
208 * address space.
209 */
210 if (bus_space_map(ea->ea_bustag, EBUS_ADDR_FROM_REG(&ea->ea_reg[0]),
211 ea->ea_reg[0].size, 0, &bh) != 0) {
212 printf(": unable to map registers\n");
213 return;
214 }
215
216 if (bus_space_map(ea->ea_bustag,
217 #ifdef MSIIEP /* XXX: Krups */
218 /*
219 * XXX: map playback DMA registers
220 * (we just know where they are)
221 */
222 BUS_ADDR(0x14, 0x702000), /* XXX: magic num */
223 EBUS_DMAC_SIZE,
224 #else
225 EBUS_ADDR_FROM_REG(&ea->ea_reg[1]),
226 ea->ea_reg[1].size,
227 #endif
228 0, &ebsc->sc_pdmareg) != 0)
229 {
230 printf(": unable to map playback DMA registers\n");
231 return;
232 }
233
234 if (bus_space_map(ea->ea_bustag,
235 #ifdef MSIIEP /* XXX: Krups */
236 /*
237 * XXX: map capture DMA registers
238 * (we just know where they are)
239 */
240 BUS_ADDR(0x14, 0x704000), /* XXX: magic num */
241 EBUS_DMAC_SIZE,
242 #else
243 EBUS_ADDR_FROM_REG(&ea->ea_reg[2]),
244 ea->ea_reg[2].size,
245 #endif
246 0, &ebsc->sc_cdmareg) != 0)
247 {
248 printf(": unable to map capture DMA registers\n");
249 return;
250 }
251
252 /* establish interrupt channels */
253 for (i = 0; i < ea->ea_nintr; ++i)
254 bus_intr_establish(ea->ea_bustag,
255 ea->ea_intr[i], IPL_SCHED,
256 cs4231_ebus_intr, ebsc);
257
258 cs4231_common_attach(sc, self, bh);
259 printf("\n");
260
261 /* XXX: todo: move to cs4231_common_attach, pass hw_if as arg? */
262 audio_attach_mi(&audiocs_ebus_hw_if, sc, sc->sc_ad1848.sc_dev);
263 }
264
265
266 static int
267 cs4231_ebus_round_blocksize(void *addr, int blk, int mode,
268 const audio_params_t *param)
269 {
270
271 /* we want to use DMA burst size of 16 words */
272 return blk & -64;
273 }
274
275
276 #ifdef AUDIO_DEBUG
277 static void
278 cs4231_ebus_regdump(char *label, struct cs4231_ebus_softc *ebsc)
279 {
280 /* char bits[128]; */
281
282 printf("cs4231regdump(%s): regs:", label);
283 /* XXX: dump ebus DMA and aux registers */
284 ad1848_dump_regs(&ebsc->sc_cs4231.sc_ad1848);
285 }
286 #endif /* AUDIO_DEBUG */
287
288
289 /* XXX: nothing CS4231-specific in this code... */
290 static int
291 cs4231_ebus_dma_reset(bus_space_tag_t dt, bus_space_handle_t dh)
292 {
293 u_int32_t csr;
294 int timo;
295
296 /* reset, also clear TC, just in case */
297 bus_space_write_4(dt, dh, EBUS_DMAC_DCSR, EBDMA_RESET | EBDMA_TC);
298
299 for (timo = 50000; timo != 0; --timo) {
300 csr = bus_space_read_4(dt, dh, EBUS_DMAC_DCSR);
301 if ((csr & (EBDMA_CYC_PEND | EBDMA_DRAIN)) == 0)
302 break;
303 }
304
305 if (timo == 0) {
306 char bits[128];
307 snprintb(bits, sizeof(bits), EBUS_DCSR_BITS, csr);
308 printf("cs4231_ebus_dma_reset: timed out: csr=%s\n", bits);
309 return ETIMEDOUT;
310 }
311
312 bus_space_write_4(dt, dh, EBUS_DMAC_DCSR, csr & ~EBDMA_RESET);
313 return 0;
314 }
315
316
317 static void
318 cs4231_ebus_dma_advance(struct cs_transfer *t, bus_space_tag_t dt,
319 bus_space_handle_t dh)
320 {
321 bus_addr_t dmaaddr;
322 bus_size_t dmasize;
323
324 cs4231_transfer_advance(t, &dmaaddr, &dmasize);
325
326 bus_space_write_4(dt, dh, EBUS_DMAC_DNBR, (u_int32_t)dmasize);
327 bus_space_write_4(dt, dh, EBUS_DMAC_DNAR, (u_int32_t)dmaaddr);
328 }
329
330
331 /*
332 * Trigger transfer "t" using DMA controller at "dt"/"dh".
333 * "iswrite" defines direction of the transfer.
334 */
335 static int
336 cs4231_ebus_trigger_transfer(
337 struct cs4231_softc *sc,
338 struct cs_transfer *t,
339 bus_space_tag_t dt,
340 bus_space_handle_t dh,
341 int iswrite,
342 void *start, void *end,
343 int blksize,
344 void (*intr)(void *),
345 void *arg,
346 const audio_params_t *param)
347 {
348 uint32_t csr;
349 bus_addr_t dmaaddr;
350 bus_size_t dmasize;
351 int ret;
352
353 ret = cs4231_transfer_init(sc, t, &dmaaddr, &dmasize,
354 start, end, blksize, intr, arg);
355 if (ret != 0)
356 return ret;
357
358 ret = cs4231_ebus_dma_reset(dt, dh);
359 if (ret != 0)
360 return ret;
361
362 csr = bus_space_read_4(dt, dh, EBUS_DMAC_DCSR);
363 bus_space_write_4(dt, dh, EBUS_DMAC_DCSR,
364 csr | EBDMA_EN_NEXT | (iswrite ? EBDMA_WRITE : 0)
365 | EBDMA_EN_DMA | EBDMA_EN_CNT | EBDMA_INT_EN
366 | EBDMA_BURST_SIZE_16);
367
368 /* first load: propagated to DACR/DBCR */
369 bus_space_write_4(dt, dh, EBUS_DMAC_DNBR, (uint32_t)dmasize);
370 bus_space_write_4(dt, dh, EBUS_DMAC_DNAR, (uint32_t)dmaaddr);
371
372 /* next load: goes to DNAR/DNBR */
373 cs4231_ebus_dma_advance(t, dt, dh);
374
375 return 0;
376 }
377
378
379 static int
380 cs4231_ebus_trigger_output(void *addr, void *start, void *end, int blksize,
381 void (*intr)(void *), void *arg,
382 const audio_params_t *param)
383 {
384 struct cs4231_ebus_softc *ebsc;
385 struct cs4231_softc *sc;
386 int cfg, ret;
387
388 ebsc = addr;
389 sc = &ebsc->sc_cs4231;
390 ret = cs4231_ebus_trigger_transfer(sc, &sc->sc_playback,
391 ebsc->sc_bt, ebsc->sc_pdmareg,
392 0, /* iswrite */
393 start, end, blksize,
394 intr, arg, param);
395 if (ret != 0)
396 return ret;
397
398 ad_write(&sc->sc_ad1848, SP_LOWER_BASE_COUNT, 0xff);
399 ad_write(&sc->sc_ad1848, SP_UPPER_BASE_COUNT, 0xff);
400
401 cfg = ad_read(&sc->sc_ad1848, SP_INTERFACE_CONFIG);
402 ad_write(&sc->sc_ad1848, SP_INTERFACE_CONFIG, cfg | PLAYBACK_ENABLE);
403
404 return 0;
405 }
406
407
408 static int
409 cs4231_ebus_trigger_input(void *addr, void *start, void *end, int blksize,
410 void (*intr)(void *), void *arg,
411 const audio_params_t *param)
412 {
413 struct cs4231_ebus_softc *ebsc;
414 struct cs4231_softc *sc;
415 int cfg, ret;
416
417 ebsc = addr;
418 sc = &ebsc->sc_cs4231;
419 ret = cs4231_ebus_trigger_transfer(sc, &sc->sc_capture,
420 ebsc->sc_bt, ebsc->sc_cdmareg,
421 1, /* iswrite */
422 start, end, blksize,
423 intr, arg, param);
424 if (ret != 0)
425 return ret;
426
427 ad_write(&sc->sc_ad1848, CS_LOWER_REC_CNT, 0xff);
428 ad_write(&sc->sc_ad1848, CS_UPPER_REC_CNT, 0xff);
429
430 cfg = ad_read(&sc->sc_ad1848, SP_INTERFACE_CONFIG);
431 ad_write(&sc->sc_ad1848, SP_INTERFACE_CONFIG, cfg | CAPTURE_ENABLE);
432
433 return 0;
434 }
435
436
437 static int
438 cs4231_ebus_halt_output(void *addr)
439 {
440 struct cs4231_ebus_softc *ebsc;
441 struct cs4231_softc *sc;
442 u_int32_t csr;
443 int cfg;
444
445 ebsc = addr;
446 sc = &ebsc->sc_cs4231;
447 sc->sc_playback.t_active = 0;
448
449 csr = bus_space_read_4(ebsc->sc_bt, ebsc->sc_pdmareg, EBUS_DMAC_DCSR);
450 bus_space_write_4(ebsc->sc_bt, ebsc->sc_pdmareg, EBUS_DMAC_DCSR,
451 csr & ~EBDMA_EN_DMA);
452
453 cfg = ad_read(&sc->sc_ad1848, SP_INTERFACE_CONFIG);
454 ad_write(&sc->sc_ad1848, SP_INTERFACE_CONFIG,
455 cfg & ~PLAYBACK_ENABLE);
456
457 return 0;
458 }
459
460
461 static int
462 cs4231_ebus_halt_input(void *addr)
463 {
464 struct cs4231_ebus_softc *ebsc;
465 struct cs4231_softc *sc;
466 uint32_t csr;
467 int cfg;
468
469 ebsc = addr;
470 sc = &ebsc->sc_cs4231;
471 sc->sc_capture.t_active = 0;
472
473 csr = bus_space_read_4(ebsc->sc_bt, ebsc->sc_cdmareg, EBUS_DMAC_DCSR);
474 bus_space_write_4(ebsc->sc_bt, ebsc->sc_cdmareg, EBUS_DMAC_DCSR,
475 csr & ~EBDMA_EN_DMA);
476
477 cfg = ad_read(&sc->sc_ad1848, SP_INTERFACE_CONFIG);
478 ad_write(&sc->sc_ad1848, SP_INTERFACE_CONFIG,
479 cfg & ~CAPTURE_ENABLE);
480
481 return 0;
482 }
483
484
485 static int
486 cs4231_ebus_dma_intr(struct cs_transfer *t, bus_space_tag_t dt,
487 bus_space_handle_t dh, void *sih)
488 {
489 uint32_t csr;
490 #ifdef AUDIO_DEBUG
491 char bits[128];
492 #endif
493
494 /* read DMA status, clear TC bit by writing it back */
495 csr = bus_space_read_4(dt, dh, EBUS_DMAC_DCSR);
496 bus_space_write_4(dt, dh, EBUS_DMAC_DCSR, csr);
497 #ifdef AUDIO_DEBUG
498 snprintb(bits, sizeof(bits), EBUS_DCSR_BITS, csr);
499 DPRINTF(("audiocs: %s dcsr=%s\n", t->t_name, bits));
500 #endif
501
502 if (csr & EBDMA_ERR_PEND) {
503 ++t->t_ierrcnt.ev_count;
504 printf("audiocs: %s DMA error, resetting\n", t->t_name);
505 cs4231_ebus_dma_reset(dt, dh);
506 /* how to notify audio(9)??? */
507 return 1;
508 }
509
510 if ((csr & EBDMA_INT_PEND) == 0)
511 return 0;
512
513 ++t->t_intrcnt.ev_count;
514
515 if ((csr & EBDMA_TC) == 0) { /* can this happen? */
516 printf("audiocs: %s INT_PEND but !TC\n", t->t_name);
517 return 1;
518 }
519
520 if (!t->t_active)
521 return 1;
522
523 cs4231_ebus_dma_advance(t, dt, dh);
524
525 /* call audio(9) framework while DMA is chugging along */
526 if (t->t_intr != NULL)
527 sparc_softintr_schedule(sih);
528 return 1;
529 }
530
531
532 static int
533 cs4231_ebus_intr(void *arg)
534 {
535 struct cs4231_ebus_softc *ebsc;
536 struct cs4231_softc *sc;
537 int status;
538 int ret;
539 #ifdef AUDIO_DEBUG
540 char bits[128];
541 #endif
542
543 ebsc = arg;
544 sc = &ebsc->sc_cs4231;
545 status = ADREAD(&sc->sc_ad1848, AD1848_STATUS);
546
547 #ifdef AUDIO_DEBUG
548 if (cs4231_ebus_debug > 1)
549 cs4231_ebus_regdump("audiointr", ebsc);
550
551 snprintb(bits, sizeof(bits), AD_R2_BITS, status);
552 DPRINTF(("%s: status: %s\n", device_xname(sc->sc_ad1848.sc_dev),
553 bits));
554 #endif
555
556 if (status & INTERRUPT_STATUS) {
557 #ifdef AUDIO_DEBUG
558 int reason;
559
560 reason = ad_read(&sc->sc_ad1848, CS_IRQ_STATUS);
561 snprintb(bits, sizeof(bits), CS_I24_BITS, reason);
562 DPRINTF(("%s: i24: %s\n", device_xname(sc->sc_ad1848.sc_dev),
563 bits));
564 #endif
565 /* clear interrupt from ad1848 */
566 ADWRITE(&sc->sc_ad1848, AD1848_STATUS, 0);
567 }
568
569 ret = 0;
570
571 if (cs4231_ebus_dma_intr(&sc->sc_capture, ebsc->sc_bt,
572 ebsc->sc_cdmareg, ebsc->sc_rint) != 0)
573 {
574 ++sc->sc_intrcnt.ev_count;
575 ret = 1;
576 }
577
578 if (cs4231_ebus_dma_intr(&sc->sc_playback, ebsc->sc_bt,
579 ebsc->sc_pdmareg, ebsc->sc_pint) != 0)
580 {
581 ++sc->sc_intrcnt.ev_count;
582 ret = 1;
583 }
584
585
586 return ret;
587 }
588
589 static int
590 cs4231_ebus_pint(void *cookie)
591 {
592 struct cs4231_softc *sc = cookie;
593 struct cs_transfer *t = &sc->sc_playback;
594
595 KERNEL_LOCK(1, NULL);
596 if (t->t_intr != NULL)
597 (*t->t_intr)(t->t_arg);
598 KERNEL_UNLOCK_ONE(NULL);
599 return 0;
600 }
601
602 static int
603 cs4231_ebus_rint(void *cookie)
604 {
605 struct cs4231_softc *sc = cookie;
606 struct cs_transfer *t = &sc->sc_capture;
607
608 KERNEL_LOCK(1, NULL);
609 if (t->t_intr != NULL)
610 (*t->t_intr)(t->t_arg);
611 KERNEL_UNLOCK_ONE(NULL);
612 return 0;
613 }
614