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cs4231_ebus.c revision 1.34.4.3
      1 /*	$NetBSD: cs4231_ebus.c,v 1.34.4.3 2011/11/22 22:47:05 jmcneill Exp $ */
      2 
      3 /*
      4  * Copyright (c) 2002 Valeriy E. Ushakov
      5  * All rights reserved.
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  * 1. Redistributions of source code must retain the above copyright
     11  *    notice, this list of conditions and the following disclaimer.
     12  * 2. Redistributions in binary form must reproduce the above copyright
     13  *    notice, this list of conditions and the following disclaimer in the
     14  *    documentation and/or other materials provided with the distribution.
     15  * 3. The name of the author may not be used to endorse or promote products
     16  *    derived from this software without specific prior written permission
     17  *
     18  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     19  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     20  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     21  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     22  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     23  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     24  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     25  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     26  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     27  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     28  */
     29 
     30 #include <sys/cdefs.h>
     31 __KERNEL_RCSID(0, "$NetBSD: cs4231_ebus.c,v 1.34.4.3 2011/11/22 22:47:05 jmcneill Exp $");
     32 
     33 #ifdef _KERNEL_OPT
     34 #include "opt_sparc_arch.h"
     35 #endif
     36 
     37 #include <sys/param.h>
     38 #include <sys/systm.h>
     39 #include <sys/errno.h>
     40 #include <sys/device.h>
     41 #include <sys/cpu.h>
     42 #include <sys/kmem.h>
     43 #include <sys/malloc.h>
     44 
     45 #include <machine/autoconf.h>
     46 
     47 #include <dev/ebus/ebusreg.h>
     48 #include <dev/ebus/ebusvar.h>
     49 
     50 #include <sys/audioio.h>
     51 #include <dev/audio_if.h>
     52 
     53 #include <dev/ic/ad1848reg.h>
     54 #include <dev/ic/cs4231reg.h>
     55 #include <dev/ic/ad1848var.h>
     56 #include <dev/ic/cs4231var.h>
     57 
     58 #ifdef AUDIO_DEBUG
     59 int cs4231_ebus_debug = 0;
     60 #define DPRINTF(x)	if (cs4231_ebus_debug) printf x
     61 #else
     62 #define DPRINTF(x)
     63 #endif
     64 
     65 
     66 struct cs4231_ebus_softc {
     67 	struct cs4231_softc sc_cs4231;
     68 
     69 	void *sc_pint;
     70 	void *sc_rint;
     71 	bus_space_tag_t sc_bt;
     72 	bus_space_handle_t sc_pdmareg; /* playback DMA */
     73 	bus_space_handle_t sc_cdmareg; /* record DMA */
     74 };
     75 
     76 
     77 void	cs4231_ebus_attach(device_t, device_t, void *);
     78 int	cs4231_ebus_match(device_t, cfdata_t, void *);
     79 
     80 static int	cs4231_ebus_pint(void *);
     81 static int	cs4231_ebus_rint(void *);
     82 
     83 CFATTACH_DECL_NEW(audiocs_ebus, sizeof(struct cs4231_ebus_softc),
     84     cs4231_ebus_match, cs4231_ebus_attach, NULL, NULL);
     85 
     86 /* audio_hw_if methods specific to ebus DMA */
     87 static int	cs4231_ebus_round_blocksize(void *, int, int,
     88 					    const audio_params_t *);
     89 static int	cs4231_ebus_trigger_output(void *, void *, void *, int,
     90 					   void (*)(void *), void *,
     91 					   const audio_params_t *);
     92 static int	cs4231_ebus_trigger_input(void *, void *, void *, int,
     93 					  void (*)(void *), void *,
     94 					  const audio_params_t *);
     95 static int	cs4231_ebus_halt_output(void *);
     96 static int	cs4231_ebus_halt_input(void *);
     97 
     98 const struct audio_hw_if audiocs_ebus_hw_if = {
     99 	cs4231_open,
    100 	cs4231_close,
    101 	NULL,			/* drain */
    102 	ad1848_query_encoding,
    103 	ad1848_set_params,
    104 	cs4231_ebus_round_blocksize,
    105 	ad1848_commit_settings,
    106 	NULL,			/* init_output */
    107 	NULL,			/* init_input */
    108 	NULL,			/* start_output */
    109 	NULL,			/* start_input */
    110 	cs4231_ebus_halt_output,
    111 	cs4231_ebus_halt_input,
    112 	NULL,			/* speaker_ctl */
    113 	cs4231_getdev,
    114 	NULL,			/* setfd */
    115 	cs4231_set_port,
    116 	cs4231_get_port,
    117 	cs4231_query_devinfo,
    118 	cs4231_malloc,
    119 	cs4231_free,
    120 	NULL,			/* round_buffersize */
    121 	NULL,			/* mappage */
    122 	cs4231_get_props,
    123 	cs4231_ebus_trigger_output,
    124 	cs4231_ebus_trigger_input,
    125 	NULL,			/* dev_ioctl */
    126 	ad1848_get_locks,
    127 };
    128 
    129 #ifdef AUDIO_DEBUG
    130 static void	cs4231_ebus_regdump(char *, struct cs4231_ebus_softc *);
    131 #endif
    132 
    133 static int	cs4231_ebus_dma_reset(bus_space_tag_t, bus_space_handle_t);
    134 static int	cs4231_ebus_trigger_transfer(struct cs4231_softc *,
    135 			struct cs_transfer *,
    136 			bus_space_tag_t, bus_space_handle_t,
    137 			int, void *, void *, int, void (*)(void *), void *,
    138 			const audio_params_t *);
    139 static void	cs4231_ebus_dma_advance(struct cs_transfer *,
    140 					bus_space_tag_t, bus_space_handle_t);
    141 static int	cs4231_ebus_dma_intr(struct cs_transfer *,
    142 				     bus_space_tag_t, bus_space_handle_t,
    143 				     void *);
    144 static int	cs4231_ebus_intr(void *);
    145 
    146 
    147 int
    148 cs4231_ebus_match(device_t parent, cfdata_t cf, void *aux)
    149 {
    150 	struct ebus_attach_args *ea;
    151 	char *compat;
    152 	int len, total_size;
    153 
    154 	ea = aux;
    155 	if (strcmp(ea->ea_name, AUDIOCS_PROM_NAME) == 0)
    156 		return 1;
    157 
    158 	compat = NULL;
    159 	if (prom_getprop(ea->ea_node, "compatible", 1, &total_size, &compat) == 0) {
    160 		do {
    161 			if (strcmp(compat, AUDIOCS_PROM_NAME) == 0)
    162 				return 1;
    163 #ifdef __sparc__
    164 			/* on KRUPS compatible lists: "cs4231", "ad1848",
    165 			 * "mwave", and "pnpPNP,b007" */
    166 			if (strcmp(compat, "cs4231") == 0)
    167 				return 1;
    168 #endif
    169 			len = strlen(compat) + 1;
    170 			total_size -= len;
    171 			compat += len;
    172 		} while (total_size > 0);
    173 	}
    174 
    175 	return 0;
    176 }
    177 
    178 
    179 void
    180 cs4231_ebus_attach(device_t parent, device_t self, void *aux)
    181 {
    182 	struct cs4231_ebus_softc *ebsc;
    183 	struct cs4231_softc *sc;
    184 	struct ebus_attach_args *ea;
    185 	bus_space_handle_t bh;
    186 	int i;
    187 
    188 	ebsc = device_private(self);
    189 	sc = &ebsc->sc_cs4231;
    190 	ea = aux;
    191 	sc->sc_bustag = ebsc->sc_bt = ea->ea_bustag;
    192 	sc->sc_dmatag = ea->ea_dmatag;
    193 
    194 	ebsc->sc_pint = sparc_softintr_establish(IPL_VM,
    195 	    (void *)cs4231_ebus_pint, sc);
    196 	ebsc->sc_rint = sparc_softintr_establish(IPL_VM,
    197 	    (void *)cs4231_ebus_rint, sc);
    198 
    199 	/*
    200 	 * These are the register we get from the prom:
    201 	 *	- CS4231 registers
    202 	 *	- Playback EBus DMA controller
    203 	 *	- Capture EBus DMA controller
    204 	 *	- AUXIO audio register (codec powerdown)
    205 	 *
    206 	 * Map my registers in, if they aren't already in virtual
    207 	 * address space.
    208 	 */
    209 	if (bus_space_map(ea->ea_bustag, EBUS_ADDR_FROM_REG(&ea->ea_reg[0]),
    210 		ea->ea_reg[0].size, 0, &bh) != 0) {
    211 		printf(": unable to map registers\n");
    212 		return;
    213 	}
    214 
    215 	if (bus_space_map(ea->ea_bustag,
    216 #ifdef MSIIEP		/* XXX: Krups */
    217 			  /*
    218 			   * XXX: map playback DMA registers
    219 			   * (we just know where they are)
    220 			   */
    221 			  BUS_ADDR(0x14, 0x702000), /* XXX: magic num */
    222 			  EBUS_DMAC_SIZE,
    223 #else
    224 			  EBUS_ADDR_FROM_REG(&ea->ea_reg[1]),
    225 			  ea->ea_reg[1].size,
    226 #endif
    227 			  0, &ebsc->sc_pdmareg) != 0)
    228 	{
    229 		printf(": unable to map playback DMA registers\n");
    230 		return;
    231 	}
    232 
    233 	if (bus_space_map(ea->ea_bustag,
    234 #ifdef MSIIEP		/* XXX: Krups */
    235 			  /*
    236 			   * XXX: map capture DMA registers
    237 			   * (we just know where they are)
    238 			   */
    239 			  BUS_ADDR(0x14, 0x704000), /* XXX: magic num */
    240 			  EBUS_DMAC_SIZE,
    241 #else
    242 			  EBUS_ADDR_FROM_REG(&ea->ea_reg[2]),
    243 			  ea->ea_reg[2].size,
    244 #endif
    245 			  0, &ebsc->sc_cdmareg) != 0)
    246 	{
    247 		printf(": unable to map capture DMA registers\n");
    248 		return;
    249 	}
    250 
    251 	/* establish interrupt channels */
    252 	for (i = 0; i < ea->ea_nintr; ++i)
    253 		bus_intr_establish(ea->ea_bustag,
    254 				   ea->ea_intr[i], IPL_SCHED,
    255 				   cs4231_ebus_intr, ebsc);
    256 
    257 	cs4231_common_attach(sc, self, bh);
    258 	printf("\n");
    259 
    260 	/* XXX: todo: move to cs4231_common_attach, pass hw_if as arg? */
    261 	audio_attach_mi(&audiocs_ebus_hw_if, sc, sc->sc_ad1848.sc_dev);
    262 }
    263 
    264 
    265 static int
    266 cs4231_ebus_round_blocksize(void *addr, int blk, int mode,
    267 			    const audio_params_t *param)
    268 {
    269 
    270 	/* we want to use DMA burst size of 16 words */
    271 	return blk & -64;
    272 }
    273 
    274 
    275 #ifdef AUDIO_DEBUG
    276 static void
    277 cs4231_ebus_regdump(char *label, struct cs4231_ebus_softc *ebsc)
    278 {
    279 	/* char bits[128]; */
    280 
    281 	printf("cs4231regdump(%s): regs:", label);
    282 	/* XXX: dump ebus DMA and aux registers */
    283 	ad1848_dump_regs(&ebsc->sc_cs4231.sc_ad1848);
    284 }
    285 #endif /* AUDIO_DEBUG */
    286 
    287 
    288 /* XXX: nothing CS4231-specific in this code... */
    289 static int
    290 cs4231_ebus_dma_reset(bus_space_tag_t dt, bus_space_handle_t dh)
    291 {
    292 	u_int32_t csr;
    293 	int timo;
    294 
    295 	/* reset, also clear TC, just in case */
    296 	bus_space_write_4(dt, dh, EBUS_DMAC_DCSR, EBDMA_RESET | EBDMA_TC);
    297 
    298 	for (timo = 50000; timo != 0; --timo) {
    299 		csr = bus_space_read_4(dt, dh, EBUS_DMAC_DCSR);
    300 		if ((csr & (EBDMA_CYC_PEND | EBDMA_DRAIN)) == 0)
    301 			break;
    302 	}
    303 
    304 	if (timo == 0) {
    305 		char bits[128];
    306 		snprintb(bits, sizeof(bits), EBUS_DCSR_BITS, csr);
    307 		printf("cs4231_ebus_dma_reset: timed out: csr=%s\n", bits);
    308 		return ETIMEDOUT;
    309 	}
    310 
    311 	bus_space_write_4(dt, dh, EBUS_DMAC_DCSR, csr & ~EBDMA_RESET);
    312 	return 0;
    313 }
    314 
    315 
    316 static void
    317 cs4231_ebus_dma_advance(struct cs_transfer *t, bus_space_tag_t dt,
    318 			bus_space_handle_t dh)
    319 {
    320 	bus_addr_t dmaaddr;
    321 	bus_size_t dmasize;
    322 
    323 	cs4231_transfer_advance(t, &dmaaddr, &dmasize);
    324 
    325 	bus_space_write_4(dt, dh, EBUS_DMAC_DNBR, (u_int32_t)dmasize);
    326 	bus_space_write_4(dt, dh, EBUS_DMAC_DNAR, (u_int32_t)dmaaddr);
    327 }
    328 
    329 
    330 /*
    331  * Trigger transfer "t" using DMA controller at "dt"/"dh".
    332  * "iswrite" defines direction of the transfer.
    333  */
    334 static int
    335 cs4231_ebus_trigger_transfer(
    336 	struct cs4231_softc *sc,
    337 	struct cs_transfer *t,
    338 	bus_space_tag_t dt,
    339 	bus_space_handle_t dh,
    340 	int iswrite,
    341 	void *start, void *end,
    342 	int blksize,
    343 	void (*intr)(void *),
    344 	void *arg,
    345 	const audio_params_t *param)
    346 {
    347 	uint32_t csr;
    348 	bus_addr_t dmaaddr;
    349 	bus_size_t dmasize;
    350 	int ret;
    351 
    352 	ret = cs4231_transfer_init(sc, t, &dmaaddr, &dmasize,
    353 				   start, end, blksize, intr, arg);
    354 	if (ret != 0)
    355 		return ret;
    356 
    357 	ret = cs4231_ebus_dma_reset(dt, dh);
    358 	if (ret != 0)
    359 		return ret;
    360 
    361 	csr = bus_space_read_4(dt, dh, EBUS_DMAC_DCSR);
    362 	bus_space_write_4(dt, dh, EBUS_DMAC_DCSR,
    363 			  csr | EBDMA_EN_NEXT | (iswrite ? EBDMA_WRITE : 0)
    364 			  | EBDMA_EN_DMA | EBDMA_EN_CNT | EBDMA_INT_EN
    365 			  | EBDMA_BURST_SIZE_16);
    366 
    367 	/* first load: propagated to DACR/DBCR */
    368 	bus_space_write_4(dt, dh, EBUS_DMAC_DNBR, (uint32_t)dmasize);
    369 	bus_space_write_4(dt, dh, EBUS_DMAC_DNAR, (uint32_t)dmaaddr);
    370 
    371 	/* next load: goes to DNAR/DNBR */
    372 	cs4231_ebus_dma_advance(t, dt, dh);
    373 
    374 	return 0;
    375 }
    376 
    377 
    378 static int
    379 cs4231_ebus_trigger_output(void *addr, void *start, void *end, int blksize,
    380 			   void (*intr)(void *), void *arg,
    381 			   const audio_params_t *param)
    382 {
    383 	struct cs4231_ebus_softc *ebsc;
    384 	struct cs4231_softc *sc;
    385 	int cfg, ret;
    386 
    387 	ebsc = addr;
    388 	sc = &ebsc->sc_cs4231;
    389 	ret = cs4231_ebus_trigger_transfer(sc, &sc->sc_playback,
    390 					   ebsc->sc_bt, ebsc->sc_pdmareg,
    391 					   0, /* iswrite */
    392 					   start, end, blksize,
    393 					   intr, arg, param);
    394 	if (ret != 0)
    395 		return ret;
    396 
    397 	ad_write(&sc->sc_ad1848, SP_LOWER_BASE_COUNT, 0xff);
    398 	ad_write(&sc->sc_ad1848, SP_UPPER_BASE_COUNT, 0xff);
    399 
    400 	cfg = ad_read(&sc->sc_ad1848, SP_INTERFACE_CONFIG);
    401 	ad_write(&sc->sc_ad1848, SP_INTERFACE_CONFIG, cfg | PLAYBACK_ENABLE);
    402 
    403 	return 0;
    404 }
    405 
    406 
    407 static int
    408 cs4231_ebus_trigger_input(void *addr, void *start, void *end, int blksize,
    409 			  void (*intr)(void *), void *arg,
    410 			  const audio_params_t *param)
    411 {
    412 	struct cs4231_ebus_softc *ebsc;
    413 	struct cs4231_softc *sc;
    414 	int cfg, ret;
    415 
    416 	ebsc = addr;
    417 	sc = &ebsc->sc_cs4231;
    418 	ret = cs4231_ebus_trigger_transfer(sc, &sc->sc_capture,
    419 					   ebsc->sc_bt, ebsc->sc_cdmareg,
    420 					   1, /* iswrite */
    421 					   start, end, blksize,
    422 					   intr, arg, param);
    423 	if (ret != 0)
    424 		return ret;
    425 
    426 	ad_write(&sc->sc_ad1848, CS_LOWER_REC_CNT, 0xff);
    427 	ad_write(&sc->sc_ad1848, CS_UPPER_REC_CNT, 0xff);
    428 
    429 	cfg = ad_read(&sc->sc_ad1848, SP_INTERFACE_CONFIG);
    430 	ad_write(&sc->sc_ad1848, SP_INTERFACE_CONFIG, cfg | CAPTURE_ENABLE);
    431 
    432 	return 0;
    433 }
    434 
    435 
    436 static int
    437 cs4231_ebus_halt_output(void *addr)
    438 {
    439 	struct cs4231_ebus_softc *ebsc;
    440 	struct cs4231_softc *sc;
    441 	u_int32_t csr;
    442 	int cfg;
    443 
    444 	ebsc = addr;
    445 	sc = &ebsc->sc_cs4231;
    446 	sc->sc_playback.t_active = 0;
    447 
    448 	csr = bus_space_read_4(ebsc->sc_bt, ebsc->sc_pdmareg, EBUS_DMAC_DCSR);
    449 	bus_space_write_4(ebsc->sc_bt, ebsc->sc_pdmareg, EBUS_DMAC_DCSR,
    450 			  csr & ~EBDMA_EN_DMA);
    451 
    452 	cfg = ad_read(&sc->sc_ad1848, SP_INTERFACE_CONFIG);
    453 	ad_write(&sc->sc_ad1848, SP_INTERFACE_CONFIG,
    454 		 cfg & ~PLAYBACK_ENABLE);
    455 
    456 	return 0;
    457 }
    458 
    459 
    460 static int
    461 cs4231_ebus_halt_input(void *addr)
    462 {
    463 	struct cs4231_ebus_softc *ebsc;
    464 	struct cs4231_softc *sc;
    465 	uint32_t csr;
    466 	int cfg;
    467 
    468 	ebsc = addr;
    469 	sc = &ebsc->sc_cs4231;
    470 	sc->sc_capture.t_active = 0;
    471 
    472 	csr = bus_space_read_4(ebsc->sc_bt, ebsc->sc_cdmareg, EBUS_DMAC_DCSR);
    473 	bus_space_write_4(ebsc->sc_bt, ebsc->sc_cdmareg, EBUS_DMAC_DCSR,
    474 			  csr & ~EBDMA_EN_DMA);
    475 
    476 	cfg = ad_read(&sc->sc_ad1848, SP_INTERFACE_CONFIG);
    477 	ad_write(&sc->sc_ad1848, SP_INTERFACE_CONFIG,
    478 		 cfg & ~CAPTURE_ENABLE);
    479 
    480 	return 0;
    481 }
    482 
    483 
    484 static int
    485 cs4231_ebus_dma_intr(struct cs_transfer *t, bus_space_tag_t dt,
    486 		     bus_space_handle_t dh, void *sih)
    487 {
    488 	uint32_t csr;
    489 #ifdef AUDIO_DEBUG
    490 	char bits[128];
    491 #endif
    492 
    493 	/* read DMA status, clear TC bit by writing it back */
    494 	csr = bus_space_read_4(dt, dh, EBUS_DMAC_DCSR);
    495 	bus_space_write_4(dt, dh, EBUS_DMAC_DCSR, csr);
    496 #ifdef AUDIO_DEBUG
    497 	snprintb(bits, sizeof(bits), EBUS_DCSR_BITS, csr);
    498 	DPRINTF(("audiocs: %s dcsr=%s\n", t->t_name, bits));
    499 #endif
    500 
    501 	if (csr & EBDMA_ERR_PEND) {
    502 		++t->t_ierrcnt.ev_count;
    503 		printf("audiocs: %s DMA error, resetting\n", t->t_name);
    504 		cs4231_ebus_dma_reset(dt, dh);
    505 		/* how to notify audio(9)??? */
    506 		return 1;
    507 	}
    508 
    509 	if ((csr & EBDMA_INT_PEND) == 0)
    510 		return 0;
    511 
    512 	++t->t_intrcnt.ev_count;
    513 
    514 	if ((csr & EBDMA_TC) == 0) { /* can this happen? */
    515 		printf("audiocs: %s INT_PEND but !TC\n", t->t_name);
    516 		return 1;
    517 	}
    518 
    519 	if (!t->t_active)
    520 		return 1;
    521 
    522 	cs4231_ebus_dma_advance(t, dt, dh);
    523 
    524 	/* call audio(9) framework while DMA is chugging along */
    525 	if (t->t_intr != NULL)
    526 		sparc_softintr_schedule(sih);
    527 	return 1;
    528 }
    529 
    530 
    531 static int
    532 cs4231_ebus_intr(void *arg)
    533 {
    534 	struct cs4231_ebus_softc *ebsc;
    535 	struct cs4231_softc *sc;
    536 	int status;
    537 	int ret;
    538 #ifdef AUDIO_DEBUG
    539 	char bits[128];
    540 #endif
    541 
    542 	ebsc = arg;
    543 	sc = &ebsc->sc_cs4231;
    544 	mutex_spin_enter(&sc->sc_ad1848.sc_intr_lock);
    545 
    546 	status = ADREAD(&sc->sc_ad1848, AD1848_STATUS);
    547 
    548 #ifdef AUDIO_DEBUG
    549 	if (cs4231_ebus_debug > 1)
    550 		cs4231_ebus_regdump("audiointr", ebsc);
    551 
    552 	snprintb(bits, sizeof(bits), AD_R2_BITS, status);
    553 	DPRINTF(("%s: status: %s\n", device_xname(sc->sc_ad1848.sc_dev),
    554 	    bits));
    555 #endif
    556 
    557 	if (status & INTERRUPT_STATUS) {
    558 #ifdef AUDIO_DEBUG
    559 		int reason;
    560 
    561 		reason = ad_read(&sc->sc_ad1848, CS_IRQ_STATUS);
    562 	        snprintb(bits, sizeof(bits), CS_I24_BITS, reason);
    563 		DPRINTF(("%s: i24: %s\n", device_xname(sc->sc_ad1848.sc_dev),
    564 		    bits));
    565 #endif
    566 		/* clear interrupt from ad1848 */
    567 		ADWRITE(&sc->sc_ad1848, AD1848_STATUS, 0);
    568 	}
    569 
    570 	ret = 0;
    571 
    572 	if (cs4231_ebus_dma_intr(&sc->sc_capture, ebsc->sc_bt,
    573 	    ebsc->sc_cdmareg, ebsc->sc_rint) != 0)
    574 	{
    575 		++sc->sc_intrcnt.ev_count;
    576 		ret = 1;
    577 	}
    578 
    579 	if (cs4231_ebus_dma_intr(&sc->sc_playback, ebsc->sc_bt,
    580 	    ebsc->sc_pdmareg, ebsc->sc_pint) != 0)
    581 	{
    582 		++sc->sc_intrcnt.ev_count;
    583 		ret = 1;
    584 	}
    585 
    586 	mutex_spin_exit(&sc->sc_ad1848.sc_intr_lock);
    587 
    588 	return ret;
    589 }
    590 
    591 static int
    592 cs4231_ebus_pint(void *cookie)
    593 {
    594 	struct cs4231_softc *sc = cookie;
    595 	struct cs_transfer *t = &sc->sc_playback;
    596 
    597 	mutex_spin_enter(&sc->sc_ad1848.sc_intr_lock);
    598 	if (t->t_intr != NULL)
    599 		(*t->t_intr)(t->t_arg);
    600 	mutex_spin_exit(&sc->sc_ad1848.sc_intr_lock);
    601 	return 0;
    602 }
    603 
    604 static int
    605 cs4231_ebus_rint(void *cookie)
    606 {
    607 	struct cs4231_softc *sc = cookie;
    608 	struct cs_transfer *t = &sc->sc_capture;
    609 
    610 	mutex_spin_enter(&sc->sc_ad1848.sc_intr_lock);
    611 	if (t->t_intr != NULL)
    612 		(*t->t_intr)(t->t_arg);
    613 	mutex_spin_exit(&sc->sc_ad1848.sc_intr_lock);
    614 	return 0;
    615 }
    616