ahb.c revision 1.11
1 /* $NetBSD: ahb.c,v 1.11 1997/10/29 00:18:21 thorpej Exp $ */ 2 3 #undef AHBDEBUG 4 #ifdef DDB 5 #define integrate 6 #else 7 #define integrate static inline 8 #endif 9 10 /*- 11 * Copyright (c) 1997 The NetBSD Foundation, Inc. 12 * All rights reserved. 13 * 14 * This code is derived from software contributed to The NetBSD Foundation 15 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 16 * NASA Ames Research Center. 17 * 18 * Redistribution and use in source and binary forms, with or without 19 * modification, are permitted provided that the following conditions 20 * are met: 21 * 1. Redistributions of source code must retain the above copyright 22 * notice, this list of conditions and the following disclaimer. 23 * 2. Redistributions in binary form must reproduce the above copyright 24 * notice, this list of conditions and the following disclaimer in the 25 * documentation and/or other materials provided with the distribution. 26 * 3. All advertising materials mentioning features or use of this software 27 * must display the following acknowledgement: 28 * This product includes software developed by the NetBSD 29 * Foundation, Inc. and its contributors. 30 * 4. Neither the name of The NetBSD Foundation nor the names of its 31 * contributors may be used to endorse or promote products derived 32 * from this software without specific prior written permission. 33 * 34 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 35 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 36 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 37 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 38 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 39 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 40 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 41 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 42 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 43 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 44 * POSSIBILITY OF SUCH DAMAGE. 45 */ 46 47 /* 48 * Copyright (c) 1994, 1996, 1997 Charles M. Hannum. All rights reserved. 49 * 50 * Redistribution and use in source and binary forms, with or without 51 * modification, are permitted provided that the following conditions 52 * are met: 53 * 1. Redistributions of source code must retain the above copyright 54 * notice, this list of conditions and the following disclaimer. 55 * 2. Redistributions in binary form must reproduce the above copyright 56 * notice, this list of conditions and the following disclaimer in the 57 * documentation and/or other materials provided with the distribution. 58 * 3. All advertising materials mentioning features or use of this software 59 * must display the following acknowledgement: 60 * This product includes software developed by Charles M. Hannum. 61 * 4. The name of the author may not be used to endorse or promote products 62 * derived from this software without specific prior written permission. 63 * 64 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 65 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 66 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 67 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 68 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 69 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 70 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 71 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 72 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 73 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 74 */ 75 76 /* 77 * Originally written by Julian Elischer (julian (at) tfs.com) 78 * for TRW Financial Systems for use under the MACH(2.5) operating system. 79 * 80 * TRW Financial Systems, in accordance with their agreement with Carnegie 81 * Mellon University, makes this software available to CMU to distribute 82 * or use in any manner that they see fit as long as this message is kept with 83 * the software. For this reason TFS also grants any other persons or 84 * organisations permission to use or modify this software. 85 * 86 * TFS supplies this software to be publicly redistributed 87 * on the understanding that TFS is not responsible for the correct 88 * functioning of this software in any circumstances. 89 */ 90 91 #include <sys/types.h> 92 #include <sys/param.h> 93 #include <sys/systm.h> 94 #include <sys/kernel.h> 95 #include <sys/errno.h> 96 #include <sys/ioctl.h> 97 #include <sys/device.h> 98 #include <sys/malloc.h> 99 #include <sys/buf.h> 100 #include <sys/proc.h> 101 #include <sys/user.h> 102 103 #include <machine/bus.h> 104 #include <machine/intr.h> 105 106 #include <dev/scsipi/scsi_all.h> 107 #include <dev/scsipi/scsipi_all.h> 108 #include <dev/scsipi/scsiconf.h> 109 110 #include <dev/eisa/eisareg.h> 111 #include <dev/eisa/eisavar.h> 112 #include <dev/eisa/eisadevs.h> 113 #include <dev/eisa/ahbreg.h> 114 115 #ifndef DDB 116 #define Debugger() panic("should call debugger here (aha1742.c)") 117 #endif /* ! DDB */ 118 119 #define AHB_ECB_MAX 32 /* store up to 32 ECBs at one time */ 120 #define ECB_HASH_SIZE 32 /* hash table size for phystokv */ 121 #define ECB_HASH_SHIFT 9 122 #define ECB_HASH(x) ((((long)(x))>>ECB_HASH_SHIFT) & (ECB_HASH_SIZE - 1)) 123 124 #define AHB_MAXXFER ((AHB_NSEG - 1) << PGSHIFT) 125 126 struct ahb_softc { 127 struct device sc_dev; 128 129 bus_space_tag_t sc_iot; 130 bus_space_handle_t sc_ioh; 131 bus_dma_tag_t sc_dmat; 132 void *sc_ih; 133 134 struct ahb_ecb *sc_ecbhash[ECB_HASH_SIZE]; 135 TAILQ_HEAD(, ahb_ecb) sc_free_ecb; 136 struct ahb_ecb *sc_immed_ecb; /* an outstanding immediete command */ 137 int sc_numecbs; 138 struct scsipi_link sc_link; 139 }; 140 141 struct ahb_probe_data { 142 int sc_irq; 143 int sc_scsi_dev; 144 }; 145 146 void ahb_send_mbox __P((struct ahb_softc *, int, struct ahb_ecb *)); 147 void ahb_send_immed __P((struct ahb_softc *, u_long, struct ahb_ecb *)); 148 int ahbintr __P((void *)); 149 void ahb_free_ecb __P((struct ahb_softc *, struct ahb_ecb *)); 150 struct ahb_ecb *ahb_get_ecb __P((struct ahb_softc *, int)); 151 struct ahb_ecb *ahb_ecb_phys_kv __P((struct ahb_softc *, physaddr)); 152 void ahb_done __P((struct ahb_softc *, struct ahb_ecb *)); 153 int ahb_find __P((bus_space_tag_t, bus_space_handle_t, struct ahb_probe_data *)); 154 void ahb_init __P((struct ahb_softc *)); 155 void ahbminphys __P((struct buf *)); 156 int ahb_scsi_cmd __P((struct scsipi_xfer *)); 157 int ahb_poll __P((struct ahb_softc *, struct scsipi_xfer *, int)); 158 void ahb_timeout __P((void *)); 159 int ahb_create_ecbs __P((struct ahb_softc *)); 160 161 integrate void ahb_reset_ecb __P((struct ahb_softc *, struct ahb_ecb *)); 162 integrate int ahb_init_ecb __P((struct ahb_softc *, struct ahb_ecb *)); 163 164 struct scsipi_adapter ahb_switch = { 165 ahb_scsi_cmd, 166 ahbminphys, 167 0, 168 0, 169 }; 170 171 /* the below structure is so we have a default dev struct for our link struct */ 172 struct scsipi_device ahb_dev = { 173 NULL, /* Use default error handler */ 174 NULL, /* have a queue, served by this */ 175 NULL, /* have no async handler */ 176 NULL, /* Use default 'done' routine */ 177 }; 178 179 #ifdef __BROKEN_INDIRECT_CONFIG 180 int ahbmatch __P((struct device *, void *, void *)); 181 #else 182 int ahbmatch __P((struct device *, struct cfdata *, void *)); 183 #endif 184 void ahbattach __P((struct device *, struct device *, void *)); 185 186 struct cfattach ahb_ca = { 187 sizeof(struct ahb_softc), ahbmatch, ahbattach 188 }; 189 190 struct cfdriver ahb_cd = { 191 NULL, "ahb", DV_DULL 192 }; 193 194 #define AHB_ABORT_TIMEOUT 2000 /* time to wait for abort (mSec) */ 195 196 /* XXX Should put this in a better place. */ 197 #define offsetof(type, member) ((size_t)(&((type *)0)->member)) 198 199 /* 200 * Check the slots looking for a board we recognise 201 * If we find one, note it's address (slot) and call 202 * the actual probe routine to check it out. 203 */ 204 int 205 ahbmatch(parent, match, aux) 206 struct device *parent; 207 #ifdef __BROKEN_INDIRECT_CONFIG 208 void *match; 209 #else 210 struct cfdata *match; 211 #endif 212 void *aux; 213 { 214 struct eisa_attach_args *ea = aux; 215 bus_space_tag_t iot = ea->ea_iot; 216 bus_space_handle_t ioh; 217 int rv; 218 219 /* must match one of our known ID strings */ 220 if (strcmp(ea->ea_idstring, "ADP0000") && 221 strcmp(ea->ea_idstring, "ADP0001") && 222 strcmp(ea->ea_idstring, "ADP0002") && 223 strcmp(ea->ea_idstring, "ADP0400")) 224 return (0); 225 226 if (bus_space_map(iot, EISA_SLOT_ADDR(ea->ea_slot), 227 EISA_SLOT_SIZE, 0, &ioh)) 228 return (0); 229 230 rv = !ahb_find(iot, ioh, NULL); 231 232 bus_space_unmap(iot, ioh, EISA_SLOT_SIZE); 233 234 return (rv); 235 } 236 237 /* 238 * Attach all the sub-devices we can find 239 */ 240 void 241 ahbattach(parent, self, aux) 242 struct device *parent, *self; 243 void *aux; 244 { 245 struct eisa_attach_args *ea = aux; 246 struct ahb_softc *sc = (void *)self; 247 bus_space_tag_t iot = ea->ea_iot; 248 bus_space_handle_t ioh; 249 eisa_chipset_tag_t ec = ea->ea_ec; 250 eisa_intr_handle_t ih; 251 const char *model, *intrstr; 252 struct ahb_probe_data apd; 253 254 if (!strcmp(ea->ea_idstring, "ADP0000")) 255 model = EISA_PRODUCT_ADP0000; 256 else if (!strcmp(ea->ea_idstring, "ADP0001")) 257 model = EISA_PRODUCT_ADP0001; 258 else if (!strcmp(ea->ea_idstring, "ADP0002")) 259 model = EISA_PRODUCT_ADP0002; 260 else if (!strcmp(ea->ea_idstring, "ADP0400")) 261 model = EISA_PRODUCT_ADP0400; 262 else 263 model = "unknown model!"; 264 printf(": %s\n", model); 265 266 if (bus_space_map(iot, EISA_SLOT_ADDR(ea->ea_slot), 267 EISA_SLOT_SIZE, 0, &ioh)) 268 panic("ahbattach: could not map I/O addresses"); 269 270 sc->sc_iot = iot; 271 sc->sc_ioh = ioh; 272 sc->sc_dmat = ea->ea_dmat; 273 if (ahb_find(iot, ioh, &apd)) 274 panic("ahbattach: ahb_find failed!"); 275 276 ahb_init(sc); 277 TAILQ_INIT(&sc->sc_free_ecb); 278 279 /* 280 * fill in the prototype scsipi_link. 281 */ 282 sc->sc_link.scsipi_scsi.channel = SCSI_CHANNEL_ONLY_ONE; 283 sc->sc_link.adapter_softc = sc; 284 sc->sc_link.scsipi_scsi.adapter_target = apd.sc_scsi_dev; 285 sc->sc_link.adapter = &ahb_switch; 286 sc->sc_link.device = &ahb_dev; 287 sc->sc_link.openings = 4; 288 sc->sc_link.scsipi_scsi.max_target = 7; 289 sc->sc_link.type = BUS_SCSI; 290 291 if (eisa_intr_map(ec, apd.sc_irq, &ih)) { 292 printf("%s: couldn't map interrupt (%d)\n", 293 sc->sc_dev.dv_xname, apd.sc_irq); 294 return; 295 } 296 intrstr = eisa_intr_string(ec, ih); 297 sc->sc_ih = eisa_intr_establish(ec, ih, IST_LEVEL, IPL_BIO, 298 ahbintr, sc); 299 if (sc->sc_ih == NULL) { 300 printf("%s: couldn't establish interrupt", 301 sc->sc_dev.dv_xname); 302 if (intrstr != NULL) 303 printf(" at %s", intrstr); 304 printf("\n"); 305 return; 306 } 307 if (intrstr != NULL) 308 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, 309 intrstr); 310 311 /* 312 * ask the adapter what subunits are present 313 */ 314 config_found(self, &sc->sc_link, scsiprint); 315 } 316 317 /* 318 * Function to send a command out through a mailbox 319 */ 320 void 321 ahb_send_mbox(sc, opcode, ecb) 322 struct ahb_softc *sc; 323 int opcode; 324 struct ahb_ecb *ecb; 325 { 326 bus_space_tag_t iot = sc->sc_iot; 327 bus_space_handle_t ioh = sc->sc_ioh; 328 int wait = 300; /* 1ms should be enough */ 329 330 while (--wait) { 331 if ((bus_space_read_1(iot, ioh, G2STAT) & (G2STAT_BUSY | G2STAT_MBOX_EMPTY)) 332 == (G2STAT_MBOX_EMPTY)) 333 break; 334 delay(10); 335 } 336 if (!wait) { 337 printf("%s: board not responding\n", sc->sc_dev.dv_xname); 338 Debugger(); 339 } 340 341 /* 342 * don't know if this will work. 343 * XXX WHAT DOES THIS COMMENT MEAN?! --thorpej 344 */ 345 bus_space_write_4(iot, ioh, MBOXOUT0, 346 ecb->dmamap_self->dm_segs[0].ds_addr); 347 bus_space_write_1(iot, ioh, ATTN, opcode | 348 ecb->xs->sc_link->scsipi_scsi.target); 349 350 if ((ecb->xs->flags & SCSI_POLL) == 0) 351 timeout(ahb_timeout, ecb, (ecb->timeout * hz) / 1000); 352 } 353 354 /* 355 * Function to send an immediate type command to the adapter 356 */ 357 void 358 ahb_send_immed(sc, cmd, ecb) 359 struct ahb_softc *sc; 360 u_long cmd; 361 struct ahb_ecb *ecb; 362 { 363 bus_space_tag_t iot = sc->sc_iot; 364 bus_space_handle_t ioh = sc->sc_ioh; 365 int wait = 100; /* 1 ms enough? */ 366 367 while (--wait) { 368 if ((bus_space_read_1(iot, ioh, G2STAT) & (G2STAT_BUSY | G2STAT_MBOX_EMPTY)) 369 == (G2STAT_MBOX_EMPTY)) 370 break; 371 delay(10); 372 } 373 if (!wait) { 374 printf("%s: board not responding\n", sc->sc_dev.dv_xname); 375 Debugger(); 376 } 377 378 bus_space_write_4(iot, ioh, MBOXOUT0, cmd); /* don't know this will work */ 379 bus_space_write_1(iot, ioh, G2CNTRL, G2CNTRL_SET_HOST_READY); 380 bus_space_write_1(iot, ioh, ATTN, OP_IMMED | 381 ecb->xs->sc_link->scsipi_scsi.target); 382 383 if ((ecb->xs->flags & SCSI_POLL) == 0) 384 timeout(ahb_timeout, ecb, (ecb->timeout * hz) / 1000); 385 } 386 387 /* 388 * Catch an interrupt from the adaptor 389 */ 390 int 391 ahbintr(arg) 392 void *arg; 393 { 394 struct ahb_softc *sc = arg; 395 bus_space_tag_t iot = sc->sc_iot; 396 bus_space_handle_t ioh = sc->sc_ioh; 397 struct ahb_ecb *ecb; 398 u_char ahbstat; 399 u_long mboxval; 400 401 #ifdef AHBDEBUG 402 printf("%s: ahbintr ", sc->sc_dev.dv_xname); 403 #endif /* AHBDEBUG */ 404 405 if ((bus_space_read_1(iot, ioh, G2STAT) & G2STAT_INT_PEND) == 0) 406 return 0; 407 408 for (;;) { 409 /* 410 * First get all the information and then 411 * acknowlege the interrupt 412 */ 413 ahbstat = bus_space_read_1(iot, ioh, G2INTST); 414 mboxval = bus_space_read_4(iot, ioh, MBOXIN0); 415 bus_space_write_1(iot, ioh, G2CNTRL, G2CNTRL_CLEAR_EISA_INT); 416 417 #ifdef AHBDEBUG 418 printf("status = 0x%x ", ahbstat); 419 #endif /* AHBDEBUG */ 420 421 /* 422 * Process the completed operation 423 */ 424 switch (ahbstat & G2INTST_INT_STAT) { 425 case AHB_ECB_OK: 426 case AHB_ECB_RECOVERED: 427 case AHB_ECB_ERR: 428 ecb = ahb_ecb_phys_kv(sc, mboxval); 429 if (!ecb) { 430 printf("%s: BAD ECB RETURNED!\n", 431 sc->sc_dev.dv_xname); 432 goto next; /* whatever it was, it'll timeout */ 433 } 434 break; 435 436 case AHB_IMMED_ERR: 437 ecb = sc->sc_immed_ecb; 438 sc->sc_immed_ecb = 0; 439 ecb->flags |= ECB_IMMED_FAIL; 440 break; 441 442 case AHB_IMMED_OK: 443 ecb = sc->sc_immed_ecb; 444 sc->sc_immed_ecb = 0; 445 break; 446 447 default: 448 printf("%s: unexpected interrupt %x\n", 449 sc->sc_dev.dv_xname, ahbstat); 450 goto next; 451 } 452 453 untimeout(ahb_timeout, ecb); 454 ahb_done(sc, ecb); 455 456 next: 457 if ((bus_space_read_1(iot, ioh, G2STAT) & G2STAT_INT_PEND) == 0) 458 return 1; 459 } 460 } 461 462 integrate void 463 ahb_reset_ecb(sc, ecb) 464 struct ahb_softc *sc; 465 struct ahb_ecb *ecb; 466 { 467 468 ecb->flags = 0; 469 } 470 471 /* 472 * A ecb (and hence a mbx-out is put onto the 473 * free list. 474 */ 475 void 476 ahb_free_ecb(sc, ecb) 477 struct ahb_softc *sc; 478 struct ahb_ecb *ecb; 479 { 480 int s; 481 482 s = splbio(); 483 484 ahb_reset_ecb(sc, ecb); 485 TAILQ_INSERT_HEAD(&sc->sc_free_ecb, ecb, chain); 486 487 /* 488 * If there were none, wake anybody waiting for one to come free, 489 * starting with queued entries. 490 */ 491 if (ecb->chain.tqe_next == 0) 492 wakeup(&sc->sc_free_ecb); 493 494 splx(s); 495 } 496 497 /* 498 * Create a set of ecbs and add them to the free list. 499 */ 500 integrate int 501 ahb_init_ecb(sc, ecb) 502 struct ahb_softc *sc; 503 struct ahb_ecb *ecb; 504 { 505 bus_dma_tag_t dmat = sc->sc_dmat; 506 int hashnum, error; 507 508 /* 509 * XXX Should we put a DIAGNOSTIC check for multiple 510 * XXX ECB inits here? 511 */ 512 513 bzero(ecb, sizeof(struct ahb_ecb)); 514 515 /* 516 * Create the DMA maps for this ECB. 517 */ 518 error = bus_dmamap_create(dmat, sizeof(struct ahb_ecb), 1, 519 sizeof(struct ahb_ecb), 0, BUS_DMA_NOWAIT, &ecb->dmamap_self); 520 if (error) { 521 printf("%s: can't create ecb dmamap_self\n", 522 sc->sc_dev.dv_xname); 523 return (error); 524 } 525 526 error = bus_dmamap_create(dmat, AHB_MAXXFER, AHB_NSEG, AHB_MAXXFER, 527 0, BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW, &ecb->dmamap_xfer); 528 if (error) { 529 printf("%s: can't create ecb dmamap_xfer\n", 530 sc->sc_dev.dv_xname); 531 return (error); 532 } 533 534 /* 535 * Load the permanent DMA maps. 536 */ 537 error = bus_dmamap_load(dmat, ecb->dmamap_self, ecb, 538 sizeof(struct ahb_ecb), NULL, BUS_DMA_NOWAIT); 539 if (error) { 540 printf("%s: can't load ecb dmamap_self\n", 541 sc->sc_dev.dv_xname); 542 bus_dmamap_destroy(dmat, ecb->dmamap_self); 543 bus_dmamap_destroy(dmat, ecb->dmamap_xfer); 544 return (error); 545 } 546 547 /* 548 * put in the phystokv hash table 549 * Never gets taken out. 550 */ 551 ecb->hashkey = ecb->dmamap_self->dm_segs[0].ds_addr; 552 hashnum = ECB_HASH(ecb->hashkey); 553 ecb->nexthash = sc->sc_ecbhash[hashnum]; 554 sc->sc_ecbhash[hashnum] = ecb; 555 ahb_reset_ecb(sc, ecb); 556 return (0); 557 } 558 559 int 560 ahb_create_ecbs(sc) 561 struct ahb_softc *sc; 562 { 563 bus_dma_segment_t seg; 564 bus_size_t size; 565 struct ahb_ecb *ecb; 566 int rseg, error; 567 568 size = NBPG; 569 error = bus_dmamem_alloc(sc->sc_dmat, size, NBPG, 0, &seg, 1, &rseg, 570 BUS_DMA_NOWAIT); 571 if (error) { 572 printf("%s: can't allocate memory for ecbs\n", 573 sc->sc_dev.dv_xname); 574 return (error); 575 } 576 577 error = bus_dmamem_map(sc->sc_dmat, &seg, rseg, size, 578 (caddr_t *)&ecb, BUS_DMA_NOWAIT|BUS_DMAMEM_NOSYNC); 579 if (error) { 580 printf("%s: can't map memory for ecbs\n", 581 sc->sc_dev.dv_xname); 582 bus_dmamem_free(sc->sc_dmat, &seg, rseg); 583 return (error); 584 } 585 586 bzero(ecb, size); 587 while (size > sizeof(struct ahb_ecb)) { 588 error = ahb_init_ecb(sc, ecb); 589 if (error) { 590 printf("%s: can't initialize ecb\n", 591 sc->sc_dev.dv_xname); 592 return (error); 593 } 594 TAILQ_INSERT_TAIL(&sc->sc_free_ecb, ecb, chain); 595 (caddr_t)ecb += ALIGN(sizeof(struct ahb_ecb)); 596 size -= ALIGN(sizeof(struct ahb_ecb)); 597 sc->sc_numecbs++; 598 } 599 600 return (0); 601 } 602 603 /* 604 * Get a free ecb 605 * 606 * If there are none, see if we can allocate a new one. If so, put it in the 607 * hash table too otherwise either return an error or sleep. 608 */ 609 struct ahb_ecb * 610 ahb_get_ecb(sc, flags) 611 struct ahb_softc *sc; 612 int flags; 613 { 614 struct ahb_ecb *ecb; 615 int s; 616 617 s = splbio(); 618 619 /* 620 * If we can and have to, sleep waiting for one to come free 621 * but only if we can't allocate a new one. 622 */ 623 for (;;) { 624 ecb = sc->sc_free_ecb.tqh_first; 625 if (ecb) { 626 TAILQ_REMOVE(&sc->sc_free_ecb, ecb, chain); 627 break; 628 } 629 if (sc->sc_numecbs < AHB_ECB_MAX) { 630 /* 631 * ahb_create_ecbs() might have managed to create 632 * one before it failed. If so, don't abort, 633 * just grab it and continue to hobble along. 634 */ 635 if (ahb_create_ecbs(sc) != 0 && 636 sc->sc_free_ecb.tqh_first == NULL) { 637 printf("%s: can't allocate ecbs\n", 638 sc->sc_dev.dv_xname); 639 goto out; 640 } 641 continue; 642 } 643 if ((flags & SCSI_NOSLEEP) != 0) 644 goto out; 645 tsleep(&sc->sc_free_ecb, PRIBIO, "ahbecb", 0); 646 } 647 648 ecb->flags |= ECB_ALLOC; 649 650 out: 651 splx(s); 652 return ecb; 653 } 654 655 /* 656 * given a physical address, find the ecb that it corresponds to. 657 */ 658 struct ahb_ecb * 659 ahb_ecb_phys_kv(sc, ecb_phys) 660 struct ahb_softc *sc; 661 physaddr ecb_phys; 662 { 663 int hashnum = ECB_HASH(ecb_phys); 664 struct ahb_ecb *ecb = sc->sc_ecbhash[hashnum]; 665 666 while (ecb) { 667 if (ecb->hashkey == ecb_phys) 668 break; 669 ecb = ecb->nexthash; 670 } 671 return ecb; 672 } 673 674 /* 675 * We have a ecb which has been processed by the adaptor, now we look to see 676 * how the operation went. 677 */ 678 void 679 ahb_done(sc, ecb) 680 struct ahb_softc *sc; 681 struct ahb_ecb *ecb; 682 { 683 bus_dma_tag_t dmat = sc->sc_dmat; 684 struct scsipi_sense_data *s1, *s2; 685 struct scsipi_xfer *xs = ecb->xs; 686 687 SC_DEBUG(xs->sc_link, SDEV_DB2, ("ahb_done\n")); 688 689 /* 690 * If we were a data transfer, unload the map that described 691 * the data buffer. 692 */ 693 if (xs->datalen) { 694 bus_dmamap_sync(dmat, ecb->dmamap_xfer, 695 (xs->flags & SCSI_DATA_IN) ? BUS_DMASYNC_POSTREAD : 696 BUS_DMASYNC_POSTWRITE); 697 bus_dmamap_unload(dmat, ecb->dmamap_xfer); 698 } 699 700 /* 701 * Otherwise, put the results of the operation 702 * into the xfer and call whoever started it 703 */ 704 if ((ecb->flags & ECB_ALLOC) == 0) { 705 printf("%s: exiting ecb not allocated!\n", sc->sc_dev.dv_xname); 706 Debugger(); 707 } 708 if (ecb->flags & ECB_IMMED) { 709 if (ecb->flags & ECB_IMMED_FAIL) 710 xs->error = XS_DRIVER_STUFFUP; 711 goto done; 712 } 713 if (xs->error == XS_NOERROR) { 714 if (ecb->ecb_status.host_stat != HS_OK) { 715 switch (ecb->ecb_status.host_stat) { 716 case HS_TIMED_OUT: /* No response */ 717 xs->error = XS_SELTIMEOUT; 718 break; 719 default: /* Other scsi protocol messes */ 720 printf("%s: host_stat %x\n", 721 sc->sc_dev.dv_xname, ecb->ecb_status.host_stat); 722 xs->error = XS_DRIVER_STUFFUP; 723 } 724 } else if (ecb->ecb_status.target_stat != SCSI_OK) { 725 switch (ecb->ecb_status.target_stat) { 726 case SCSI_CHECK: 727 s1 = &ecb->ecb_sense; 728 s2 = &xs->sense.scsi_sense; 729 *s2 = *s1; 730 xs->error = XS_SENSE; 731 break; 732 case SCSI_BUSY: 733 xs->error = XS_BUSY; 734 break; 735 default: 736 printf("%s: target_stat %x\n", 737 sc->sc_dev.dv_xname, ecb->ecb_status.target_stat); 738 xs->error = XS_DRIVER_STUFFUP; 739 } 740 } else 741 xs->resid = 0; 742 } 743 done: 744 ahb_free_ecb(sc, ecb); 745 xs->flags |= ITSDONE; 746 scsipi_done(xs); 747 } 748 749 /* 750 * Start the board, ready for normal operation 751 */ 752 int 753 ahb_find(iot, ioh, sc) 754 bus_space_tag_t iot; 755 bus_space_handle_t ioh; 756 struct ahb_probe_data *sc; 757 { 758 u_char intdef; 759 int i, irq, busid; 760 int wait = 1000; /* 1 sec enough? */ 761 762 bus_space_write_1(iot, ioh, PORTADDR, PORTADDR_ENHANCED); 763 764 #define NO_NO 1 765 #ifdef NO_NO 766 /* 767 * reset board, If it doesn't respond, assume 768 * that it's not there.. good for the probe 769 */ 770 bus_space_write_1(iot, ioh, G2CNTRL, G2CNTRL_HARD_RESET); 771 delay(1000); 772 bus_space_write_1(iot, ioh, G2CNTRL, 0); 773 delay(10000); 774 while (--wait) { 775 if ((bus_space_read_1(iot, ioh, G2STAT) & G2STAT_BUSY) == 0) 776 break; 777 delay(1000); 778 } 779 if (!wait) { 780 #ifdef AHBDEBUG 781 printf("ahb_find: No answer from aha1742 board\n"); 782 #endif /* AHBDEBUG */ 783 return ENXIO; 784 } 785 i = bus_space_read_1(iot, ioh, MBOXIN0); 786 if (i) { 787 printf("self test failed, val = 0x%x\n", i); 788 return EIO; 789 } 790 791 /* Set it again, just to be sure. */ 792 bus_space_write_1(iot, ioh, PORTADDR, PORTADDR_ENHANCED); 793 #endif 794 795 while (bus_space_read_1(iot, ioh, G2STAT) & G2STAT_INT_PEND) { 796 printf("."); 797 bus_space_write_1(iot, ioh, G2CNTRL, G2CNTRL_CLEAR_EISA_INT); 798 delay(10000); 799 } 800 801 intdef = bus_space_read_1(iot, ioh, INTDEF); 802 switch (intdef & 0x07) { 803 case INT9: 804 irq = 9; 805 break; 806 case INT10: 807 irq = 10; 808 break; 809 case INT11: 810 irq = 11; 811 break; 812 case INT12: 813 irq = 12; 814 break; 815 case INT14: 816 irq = 14; 817 break; 818 case INT15: 819 irq = 15; 820 break; 821 default: 822 printf("illegal int setting %x\n", intdef); 823 return EIO; 824 } 825 826 bus_space_write_1(iot, ioh, INTDEF, (intdef | INTEN)); /* make sure we can interrupt */ 827 828 /* who are we on the scsi bus? */ 829 busid = (bus_space_read_1(iot, ioh, SCSIDEF) & HSCSIID); 830 831 /* if we want to return data, do so now */ 832 if (sc) { 833 sc->sc_irq = irq; 834 sc->sc_scsi_dev = busid; 835 } 836 837 /* 838 * Note that we are going and return (to probe) 839 */ 840 return 0; 841 } 842 843 void 844 ahb_init(sc) 845 struct ahb_softc *sc; 846 { 847 848 } 849 850 void 851 ahbminphys(bp) 852 struct buf *bp; 853 { 854 855 if (bp->b_bcount > AHB_MAXXFER) 856 bp->b_bcount = AHB_MAXXFER; 857 minphys(bp); 858 } 859 860 /* 861 * start a scsi operation given the command and the data address. Also needs 862 * the unit, target and lu. 863 */ 864 int 865 ahb_scsi_cmd(xs) 866 struct scsipi_xfer *xs; 867 { 868 struct scsipi_link *sc_link = xs->sc_link; 869 struct ahb_softc *sc = sc_link->adapter_softc; 870 bus_dma_tag_t dmat = sc->sc_dmat; 871 struct ahb_ecb *ecb; 872 int error, seg, flags, s; 873 874 SC_DEBUG(sc_link, SDEV_DB2, ("ahb_scsi_cmd\n")); 875 876 /* 877 * get a ecb (mbox-out) to use. If the transfer 878 * is from a buf (possibly from interrupt time) 879 * then we can't allow it to sleep 880 */ 881 flags = xs->flags; 882 if ((ecb = ahb_get_ecb(sc, flags)) == NULL) { 883 xs->error = XS_DRIVER_STUFFUP; 884 return TRY_AGAIN_LATER; 885 } 886 ecb->xs = xs; 887 ecb->timeout = xs->timeout; 888 889 /* 890 * If it's a reset, we need to do an 'immediate' 891 * command, and store its ecb for later 892 * if there is already an immediate waiting, 893 * then WE must wait 894 */ 895 if (flags & SCSI_RESET) { 896 ecb->flags |= ECB_IMMED; 897 if (sc->sc_immed_ecb) 898 return TRY_AGAIN_LATER; 899 sc->sc_immed_ecb = ecb; 900 901 s = splbio(); 902 ahb_send_immed(sc, AHB_TARG_RESET, ecb); 903 splx(s); 904 905 if ((flags & SCSI_POLL) == 0) 906 return SUCCESSFULLY_QUEUED; 907 908 /* 909 * If we can't use interrupts, poll on completion 910 */ 911 if (ahb_poll(sc, xs, ecb->timeout)) 912 ahb_timeout(ecb); 913 return COMPLETE; 914 } 915 916 /* 917 * Put all the arguments for the xfer in the ecb 918 */ 919 ecb->opcode = ECB_SCSI_OP; 920 ecb->opt1 = ECB_SES /*| ECB_DSB*/ | ECB_ARS; 921 ecb->opt2 = sc_link->scsipi_scsi.lun | ECB_NRB; 922 bcopy(xs->cmd, &ecb->scsi_cmd, ecb->scsi_cmd_length = xs->cmdlen); 923 ecb->sense_ptr = ecb->dmamap_self->dm_segs[0].ds_addr + 924 offsetof(struct ahb_ecb, ecb_sense); 925 ecb->req_sense_length = sizeof(ecb->ecb_sense); 926 ecb->status = ecb->dmamap_self->dm_segs[0].ds_addr + 927 offsetof(struct ahb_ecb, ecb_status); 928 ecb->ecb_status.host_stat = 0x00; 929 ecb->ecb_status.target_stat = 0x00; 930 931 if (xs->datalen) { 932 /* 933 * Map the DMA transfer. 934 */ 935 #ifdef TFS 936 if (flags & SCSI_DATA_UIO) { 937 error = bus_dmamap_load_uio(sc->sc_dmat, 938 ecb->dmamap_xfer, (struct uio *)xs->data, 939 (flags & SCSI_NOSLEEP) ? BUS_DMA_NOWAIT : 940 BUS_DMA_WAITOK); 941 } else 942 #endif /* TFS */ 943 { 944 error = bus_dmamap_load(sc->sc_dmat, 945 ecb->dmamap_xfer, xs->data, xs->datalen, NULL, 946 (flags & SCSI_NOSLEEP) ? BUS_DMA_NOWAIT : 947 BUS_DMA_WAITOK); 948 } 949 950 if (error) { 951 if (error == EFBIG) { 952 printf("%s: ahb_scsi_cmd, more than %d" 953 " dma segments\n", 954 sc->sc_dev.dv_xname, AHB_NSEG); 955 } else { 956 printf("%s: ahb_scsi_cmd, error %d loading" 957 " dma map\n", 958 sc->sc_dev.dv_xname, error); 959 } 960 goto bad; 961 } 962 963 bus_dmamap_sync(dmat, ecb->dmamap_xfer, 964 (flags & SCSI_DATA_IN) ? BUS_DMASYNC_PREREAD : 965 BUS_DMASYNC_PREWRITE); 966 967 /* 968 * Load the hardware scatter/gather map with the 969 * contents of the DMA map. 970 */ 971 for (seg = 0; seg < ecb->dmamap_xfer->dm_nsegs; seg++) { 972 ecb->ahb_dma[seg].seg_addr = 973 ecb->dmamap_xfer->dm_segs[seg].ds_addr; 974 ecb->ahb_dma[seg].seg_len = 975 ecb->dmamap_xfer->dm_segs[seg].ds_len; 976 } 977 978 ecb->data_addr = ecb->dmamap_self->dm_segs[0].ds_addr + 979 offsetof(struct ahb_ecb, ahb_dma); 980 ecb->data_length = ecb->dmamap_xfer->dm_nsegs * 981 sizeof(struct ahb_dma_seg); 982 ecb->opt1 |= ECB_S_G; 983 } else { /* No data xfer, use non S/G values */ 984 ecb->data_addr = (physaddr)0; 985 ecb->data_length = 0; 986 } 987 ecb->link_addr = (physaddr)0; 988 989 s = splbio(); 990 ahb_send_mbox(sc, OP_START_ECB, ecb); 991 splx(s); 992 993 /* 994 * Usually return SUCCESSFULLY QUEUED 995 */ 996 if ((flags & SCSI_POLL) == 0) 997 return SUCCESSFULLY_QUEUED; 998 999 /* 1000 * If we can't use interrupts, poll on completion 1001 */ 1002 if (ahb_poll(sc, xs, ecb->timeout)) { 1003 ahb_timeout(ecb); 1004 if (ahb_poll(sc, xs, ecb->timeout)) 1005 ahb_timeout(ecb); 1006 } 1007 return COMPLETE; 1008 1009 bad: 1010 xs->error = XS_DRIVER_STUFFUP; 1011 ahb_free_ecb(sc, ecb); 1012 return COMPLETE; 1013 } 1014 1015 /* 1016 * Function to poll for command completion when in poll mode 1017 */ 1018 int 1019 ahb_poll(sc, xs, count) 1020 struct ahb_softc *sc; 1021 struct scsipi_xfer *xs; 1022 int count; 1023 { /* in msec */ 1024 bus_space_tag_t iot = sc->sc_iot; 1025 bus_space_handle_t ioh = sc->sc_ioh; 1026 1027 while (count) { 1028 /* 1029 * If we had interrupts enabled, would we 1030 * have got an interrupt? 1031 */ 1032 if (bus_space_read_1(iot, ioh, G2STAT) & G2STAT_INT_PEND) 1033 ahbintr(sc); 1034 if (xs->flags & ITSDONE) 1035 return 0; 1036 delay(1000); 1037 count--; 1038 } 1039 return 1; 1040 } 1041 1042 void 1043 ahb_timeout(arg) 1044 void *arg; 1045 { 1046 struct ahb_ecb *ecb = arg; 1047 struct scsipi_xfer *xs = ecb->xs; 1048 struct scsipi_link *sc_link = xs->sc_link; 1049 struct ahb_softc *sc = sc_link->adapter_softc; 1050 int s; 1051 1052 scsi_print_addr(sc_link); 1053 printf("timed out"); 1054 1055 s = splbio(); 1056 1057 if (ecb->flags & ECB_IMMED) { 1058 printf("\n"); 1059 ecb->flags |= ECB_IMMED_FAIL; 1060 /* XXX Must reset! */ 1061 } else 1062 1063 /* 1064 * If it has been through before, then 1065 * a previous abort has failed, don't 1066 * try abort again 1067 */ 1068 if (ecb->flags & ECB_ABORT) { 1069 /* abort timed out */ 1070 printf(" AGAIN\n"); 1071 /* XXX Must reset! */ 1072 } else { 1073 /* abort the operation that has timed out */ 1074 printf("\n"); 1075 ecb->xs->error = XS_TIMEOUT; 1076 ecb->timeout = AHB_ABORT_TIMEOUT; 1077 ecb->flags |= ECB_ABORT; 1078 ahb_send_mbox(sc, OP_ABORT_ECB, ecb); 1079 } 1080 1081 splx(s); 1082 } 1083
Indexes created Mon Sep 29 21:09:56 GMT 2025