ahb.c revision 1.18 1 /* $NetBSD: ahb.c,v 1.18 1998/02/17 03:02:30 thorpej Exp $ */
2
3 #undef AHBDEBUG
4 #ifdef DDB
5 #define integrate
6 #else
7 #define integrate static inline
8 #endif
9
10 /*-
11 * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
12 * All rights reserved.
13 *
14 * This code is derived from software contributed to The NetBSD Foundation
15 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
16 * NASA Ames Research Center.
17 *
18 * Redistribution and use in source and binary forms, with or without
19 * modification, are permitted provided that the following conditions
20 * are met:
21 * 1. Redistributions of source code must retain the above copyright
22 * notice, this list of conditions and the following disclaimer.
23 * 2. Redistributions in binary form must reproduce the above copyright
24 * notice, this list of conditions and the following disclaimer in the
25 * documentation and/or other materials provided with the distribution.
26 * 3. All advertising materials mentioning features or use of this software
27 * must display the following acknowledgement:
28 * This product includes software developed by the NetBSD
29 * Foundation, Inc. and its contributors.
30 * 4. Neither the name of The NetBSD Foundation nor the names of its
31 * contributors may be used to endorse or promote products derived
32 * from this software without specific prior written permission.
33 *
34 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
35 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
36 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
37 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
38 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
39 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
40 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
41 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
42 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
43 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
44 * POSSIBILITY OF SUCH DAMAGE.
45 */
46
47 /*
48 * Copyright (c) 1994, 1996, 1997 Charles M. Hannum. All rights reserved.
49 *
50 * Redistribution and use in source and binary forms, with or without
51 * modification, are permitted provided that the following conditions
52 * are met:
53 * 1. Redistributions of source code must retain the above copyright
54 * notice, this list of conditions and the following disclaimer.
55 * 2. Redistributions in binary form must reproduce the above copyright
56 * notice, this list of conditions and the following disclaimer in the
57 * documentation and/or other materials provided with the distribution.
58 * 3. All advertising materials mentioning features or use of this software
59 * must display the following acknowledgement:
60 * This product includes software developed by Charles M. Hannum.
61 * 4. The name of the author may not be used to endorse or promote products
62 * derived from this software without specific prior written permission.
63 *
64 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
65 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
66 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
67 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
68 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
69 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
70 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
71 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
72 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
73 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
74 */
75
76 /*
77 * Originally written by Julian Elischer (julian (at) tfs.com)
78 * for TRW Financial Systems for use under the MACH(2.5) operating system.
79 *
80 * TRW Financial Systems, in accordance with their agreement with Carnegie
81 * Mellon University, makes this software available to CMU to distribute
82 * or use in any manner that they see fit as long as this message is kept with
83 * the software. For this reason TFS also grants any other persons or
84 * organisations permission to use or modify this software.
85 *
86 * TFS supplies this software to be publicly redistributed
87 * on the understanding that TFS is not responsible for the correct
88 * functioning of this software in any circumstances.
89 */
90
91 #include <sys/types.h>
92 #include <sys/param.h>
93 #include <sys/systm.h>
94 #include <sys/kernel.h>
95 #include <sys/errno.h>
96 #include <sys/ioctl.h>
97 #include <sys/device.h>
98 #include <sys/malloc.h>
99 #include <sys/buf.h>
100 #include <sys/proc.h>
101 #include <sys/user.h>
102
103 #include <machine/bus.h>
104 #include <machine/intr.h>
105
106 #include <dev/scsipi/scsi_all.h>
107 #include <dev/scsipi/scsipi_all.h>
108 #include <dev/scsipi/scsiconf.h>
109
110 #include <dev/eisa/eisareg.h>
111 #include <dev/eisa/eisavar.h>
112 #include <dev/eisa/eisadevs.h>
113 #include <dev/eisa/ahbreg.h>
114
115 #ifndef DDB
116 #define Debugger() panic("should call debugger here (aha1742.c)")
117 #endif /* ! DDB */
118
119 #define AHB_ECB_MAX 32 /* store up to 32 ECBs at one time */
120 #define ECB_HASH_SIZE 32 /* hash table size for phystokv */
121 #define ECB_HASH_SHIFT 9
122 #define ECB_HASH(x) ((((long)(x))>>ECB_HASH_SHIFT) & (ECB_HASH_SIZE - 1))
123
124 #define AHB_MAXXFER ((AHB_NSEG - 1) << PGSHIFT)
125
126 struct ahb_softc {
127 struct device sc_dev;
128
129 bus_space_tag_t sc_iot;
130 bus_space_handle_t sc_ioh;
131 bus_dma_tag_t sc_dmat;
132 void *sc_ih;
133
134 bus_dmamap_t sc_dmamap_ecb; /* maps the ecbs */
135 struct ahb_ecb *sc_ecbs; /* all our ecbs */
136
137 struct ahb_ecb *sc_ecbhash[ECB_HASH_SIZE];
138 TAILQ_HEAD(, ahb_ecb) sc_free_ecb;
139 struct ahb_ecb *sc_immed_ecb; /* an outstanding immediete command */
140 int sc_numecbs;
141 struct scsipi_link sc_link;
142
143 LIST_HEAD(, scsipi_xfer) sc_queue;
144 struct scsipi_xfer *sc_queuelast;
145 };
146
147 /*
148 * Offset of an ECB from the beginning of the ECB DMA mapping.
149 */
150 #define AHB_ECB_OFF(e) (((u_long)(e)) - ((u_long)&sc->sc_ecbs[0]))
151
152 struct ahb_probe_data {
153 int sc_irq;
154 int sc_scsi_dev;
155 };
156
157 void ahb_send_mbox __P((struct ahb_softc *, int, struct ahb_ecb *));
158 void ahb_send_immed __P((struct ahb_softc *, u_long, struct ahb_ecb *));
159 int ahbintr __P((void *));
160 void ahb_free_ecb __P((struct ahb_softc *, struct ahb_ecb *));
161 struct ahb_ecb *ahb_get_ecb __P((struct ahb_softc *, int));
162 struct ahb_ecb *ahb_ecb_phys_kv __P((struct ahb_softc *, physaddr));
163 void ahb_done __P((struct ahb_softc *, struct ahb_ecb *));
164 int ahb_find __P((bus_space_tag_t, bus_space_handle_t, struct ahb_probe_data *));
165 int ahb_init __P((struct ahb_softc *));
166 void ahbminphys __P((struct buf *));
167 int ahb_scsi_cmd __P((struct scsipi_xfer *));
168 int ahb_poll __P((struct ahb_softc *, struct scsipi_xfer *, int));
169 void ahb_timeout __P((void *));
170 int ahb_create_ecbs __P((struct ahb_softc *, struct ahb_ecb *, int));
171 void ahb_enqueue __P((struct ahb_softc *, struct scsipi_xfer *, int));
172 struct scsipi_xfer *ahb_dequeue __P((struct ahb_softc *));
173
174 integrate void ahb_reset_ecb __P((struct ahb_softc *, struct ahb_ecb *));
175 integrate int ahb_init_ecb __P((struct ahb_softc *, struct ahb_ecb *));
176
177 struct scsipi_adapter ahb_switch = {
178 ahb_scsi_cmd,
179 ahbminphys,
180 0,
181 0,
182 };
183
184 /* the below structure is so we have a default dev struct for our link struct */
185 struct scsipi_device ahb_dev = {
186 NULL, /* Use default error handler */
187 NULL, /* have a queue, served by this */
188 NULL, /* have no async handler */
189 NULL, /* Use default 'done' routine */
190 };
191
192 #ifdef __BROKEN_INDIRECT_CONFIG
193 int ahbmatch __P((struct device *, void *, void *));
194 #else
195 int ahbmatch __P((struct device *, struct cfdata *, void *));
196 #endif
197 void ahbattach __P((struct device *, struct device *, void *));
198
199 struct cfattach ahb_ca = {
200 sizeof(struct ahb_softc), ahbmatch, ahbattach
201 };
202
203 #define AHB_ABORT_TIMEOUT 2000 /* time to wait for abort (mSec) */
204
205 /*
206 * Check the slots looking for a board we recognise
207 * If we find one, note it's address (slot) and call
208 * the actual probe routine to check it out.
209 */
210 int
211 ahbmatch(parent, match, aux)
212 struct device *parent;
213 #ifdef __BROKEN_INDIRECT_CONFIG
214 void *match;
215 #else
216 struct cfdata *match;
217 #endif
218 void *aux;
219 {
220 struct eisa_attach_args *ea = aux;
221 bus_space_tag_t iot = ea->ea_iot;
222 bus_space_handle_t ioh;
223 int rv;
224
225 /* must match one of our known ID strings */
226 if (strcmp(ea->ea_idstring, "ADP0000") &&
227 strcmp(ea->ea_idstring, "ADP0001") &&
228 strcmp(ea->ea_idstring, "ADP0002") &&
229 strcmp(ea->ea_idstring, "ADP0400"))
230 return (0);
231
232 if (bus_space_map(iot, EISA_SLOT_ADDR(ea->ea_slot),
233 EISA_SLOT_SIZE, 0, &ioh))
234 return (0);
235
236 rv = !ahb_find(iot, ioh, NULL);
237
238 bus_space_unmap(iot, ioh, EISA_SLOT_SIZE);
239
240 return (rv);
241 }
242
243 /*
244 * Attach all the sub-devices we can find
245 */
246 void
247 ahbattach(parent, self, aux)
248 struct device *parent, *self;
249 void *aux;
250 {
251 struct eisa_attach_args *ea = aux;
252 struct ahb_softc *sc = (void *)self;
253 bus_space_tag_t iot = ea->ea_iot;
254 bus_space_handle_t ioh;
255 eisa_chipset_tag_t ec = ea->ea_ec;
256 eisa_intr_handle_t ih;
257 const char *model, *intrstr;
258 struct ahb_probe_data apd;
259
260 if (!strcmp(ea->ea_idstring, "ADP0000"))
261 model = EISA_PRODUCT_ADP0000;
262 else if (!strcmp(ea->ea_idstring, "ADP0001"))
263 model = EISA_PRODUCT_ADP0001;
264 else if (!strcmp(ea->ea_idstring, "ADP0002"))
265 model = EISA_PRODUCT_ADP0002;
266 else if (!strcmp(ea->ea_idstring, "ADP0400"))
267 model = EISA_PRODUCT_ADP0400;
268 else
269 model = "unknown model!";
270 printf(": %s\n", model);
271
272 if (bus_space_map(iot, EISA_SLOT_ADDR(ea->ea_slot),
273 EISA_SLOT_SIZE, 0, &ioh))
274 panic("ahbattach: could not map I/O addresses");
275
276 sc->sc_iot = iot;
277 sc->sc_ioh = ioh;
278 sc->sc_dmat = ea->ea_dmat;
279 if (ahb_find(iot, ioh, &apd))
280 panic("ahbattach: ahb_find failed!");
281
282 TAILQ_INIT(&sc->sc_free_ecb);
283 LIST_INIT(&sc->sc_queue);
284
285 if (ahb_init(sc) != 0) {
286 /* Error during initialization! */
287 return;
288 }
289
290 /*
291 * fill in the prototype scsipi_link.
292 */
293 sc->sc_link.scsipi_scsi.channel = SCSI_CHANNEL_ONLY_ONE;
294 sc->sc_link.adapter_softc = sc;
295 sc->sc_link.scsipi_scsi.adapter_target = apd.sc_scsi_dev;
296 sc->sc_link.adapter = &ahb_switch;
297 sc->sc_link.device = &ahb_dev;
298 sc->sc_link.openings = 4;
299 sc->sc_link.scsipi_scsi.max_target = 7;
300 sc->sc_link.type = BUS_SCSI;
301
302 if (eisa_intr_map(ec, apd.sc_irq, &ih)) {
303 printf("%s: couldn't map interrupt (%d)\n",
304 sc->sc_dev.dv_xname, apd.sc_irq);
305 return;
306 }
307 intrstr = eisa_intr_string(ec, ih);
308 sc->sc_ih = eisa_intr_establish(ec, ih, IST_LEVEL, IPL_BIO,
309 ahbintr, sc);
310 if (sc->sc_ih == NULL) {
311 printf("%s: couldn't establish interrupt",
312 sc->sc_dev.dv_xname);
313 if (intrstr != NULL)
314 printf(" at %s", intrstr);
315 printf("\n");
316 return;
317 }
318 if (intrstr != NULL)
319 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname,
320 intrstr);
321
322 /*
323 * ask the adapter what subunits are present
324 */
325 config_found(self, &sc->sc_link, scsiprint);
326 }
327
328 /*
329 * Insert a scsipi_xfer into the software queue. We overload xs->free_list
330 * to avoid having to allocate additional resources (since we're used
331 * only during resource shortages anyhow.
332 */
333 void
334 ahb_enqueue(sc, xs, infront)
335 struct ahb_softc *sc;
336 struct scsipi_xfer *xs;
337 int infront;
338 {
339
340 if (infront || sc->sc_queue.lh_first == NULL) {
341 if (sc->sc_queue.lh_first == NULL)
342 sc->sc_queuelast = xs;
343 LIST_INSERT_HEAD(&sc->sc_queue, xs, free_list);
344 return;
345 }
346
347 LIST_INSERT_AFTER(sc->sc_queuelast, xs, free_list);
348 sc->sc_queuelast = xs;
349 }
350
351 /*
352 * Pull a scsipi_xfer off the front of the software queue.
353 */
354 struct scsipi_xfer *
355 ahb_dequeue(sc)
356 struct ahb_softc *sc;
357 {
358 struct scsipi_xfer *xs;
359
360 xs = sc->sc_queue.lh_first;
361 LIST_REMOVE(xs, free_list);
362
363 if (sc->sc_queue.lh_first == NULL)
364 sc->sc_queuelast = NULL;
365
366 return (xs);
367 }
368
369 /*
370 * Function to send a command out through a mailbox
371 */
372 void
373 ahb_send_mbox(sc, opcode, ecb)
374 struct ahb_softc *sc;
375 int opcode;
376 struct ahb_ecb *ecb;
377 {
378 bus_space_tag_t iot = sc->sc_iot;
379 bus_space_handle_t ioh = sc->sc_ioh;
380 int wait = 300; /* 1ms should be enough */
381
382 while (--wait) {
383 if ((bus_space_read_1(iot, ioh, G2STAT) & (G2STAT_BUSY | G2STAT_MBOX_EMPTY))
384 == (G2STAT_MBOX_EMPTY))
385 break;
386 delay(10);
387 }
388 if (!wait) {
389 printf("%s: board not responding\n", sc->sc_dev.dv_xname);
390 Debugger();
391 }
392
393 /*
394 * don't know if this will work.
395 * XXX WHAT DOES THIS COMMENT MEAN?! --thorpej
396 */
397 bus_space_write_4(iot, ioh, MBOXOUT0,
398 sc->sc_dmamap_ecb->dm_segs[0].ds_addr + AHB_ECB_OFF(ecb));
399 bus_space_write_1(iot, ioh, ATTN, opcode |
400 ecb->xs->sc_link->scsipi_scsi.target);
401
402 if ((ecb->xs->flags & SCSI_POLL) == 0)
403 timeout(ahb_timeout, ecb, (ecb->timeout * hz) / 1000);
404 }
405
406 /*
407 * Function to send an immediate type command to the adapter
408 */
409 void
410 ahb_send_immed(sc, cmd, ecb)
411 struct ahb_softc *sc;
412 u_long cmd;
413 struct ahb_ecb *ecb;
414 {
415 bus_space_tag_t iot = sc->sc_iot;
416 bus_space_handle_t ioh = sc->sc_ioh;
417 int wait = 100; /* 1 ms enough? */
418
419 while (--wait) {
420 if ((bus_space_read_1(iot, ioh, G2STAT) & (G2STAT_BUSY | G2STAT_MBOX_EMPTY))
421 == (G2STAT_MBOX_EMPTY))
422 break;
423 delay(10);
424 }
425 if (!wait) {
426 printf("%s: board not responding\n", sc->sc_dev.dv_xname);
427 Debugger();
428 }
429
430 bus_space_write_4(iot, ioh, MBOXOUT0, cmd); /* don't know this will work */
431 bus_space_write_1(iot, ioh, G2CNTRL, G2CNTRL_SET_HOST_READY);
432 bus_space_write_1(iot, ioh, ATTN, OP_IMMED |
433 ecb->xs->sc_link->scsipi_scsi.target);
434
435 if ((ecb->xs->flags & SCSI_POLL) == 0)
436 timeout(ahb_timeout, ecb, (ecb->timeout * hz) / 1000);
437 }
438
439 /*
440 * Catch an interrupt from the adaptor
441 */
442 int
443 ahbintr(arg)
444 void *arg;
445 {
446 struct ahb_softc *sc = arg;
447 bus_space_tag_t iot = sc->sc_iot;
448 bus_space_handle_t ioh = sc->sc_ioh;
449 struct ahb_ecb *ecb;
450 u_char ahbstat;
451 u_long mboxval;
452
453 #ifdef AHBDEBUG
454 printf("%s: ahbintr ", sc->sc_dev.dv_xname);
455 #endif /* AHBDEBUG */
456
457 if ((bus_space_read_1(iot, ioh, G2STAT) & G2STAT_INT_PEND) == 0)
458 return 0;
459
460 for (;;) {
461 /*
462 * First get all the information and then
463 * acknowlege the interrupt
464 */
465 ahbstat = bus_space_read_1(iot, ioh, G2INTST);
466 mboxval = bus_space_read_4(iot, ioh, MBOXIN0);
467 bus_space_write_1(iot, ioh, G2CNTRL, G2CNTRL_CLEAR_EISA_INT);
468
469 #ifdef AHBDEBUG
470 printf("status = 0x%x ", ahbstat);
471 #endif /* AHBDEBUG */
472
473 /*
474 * Process the completed operation
475 */
476 switch (ahbstat & G2INTST_INT_STAT) {
477 case AHB_ECB_OK:
478 case AHB_ECB_RECOVERED:
479 case AHB_ECB_ERR:
480 ecb = ahb_ecb_phys_kv(sc, mboxval);
481 if (!ecb) {
482 printf("%s: BAD ECB RETURNED!\n",
483 sc->sc_dev.dv_xname);
484 goto next; /* whatever it was, it'll timeout */
485 }
486 break;
487
488 case AHB_IMMED_ERR:
489 ecb = sc->sc_immed_ecb;
490 sc->sc_immed_ecb = 0;
491 ecb->flags |= ECB_IMMED_FAIL;
492 break;
493
494 case AHB_IMMED_OK:
495 ecb = sc->sc_immed_ecb;
496 sc->sc_immed_ecb = 0;
497 break;
498
499 default:
500 printf("%s: unexpected interrupt %x\n",
501 sc->sc_dev.dv_xname, ahbstat);
502 goto next;
503 }
504
505 untimeout(ahb_timeout, ecb);
506 ahb_done(sc, ecb);
507
508 next:
509 if ((bus_space_read_1(iot, ioh, G2STAT) & G2STAT_INT_PEND) == 0)
510 return 1;
511 }
512 }
513
514 integrate void
515 ahb_reset_ecb(sc, ecb)
516 struct ahb_softc *sc;
517 struct ahb_ecb *ecb;
518 {
519
520 ecb->flags = 0;
521 }
522
523 /*
524 * A ecb (and hence a mbx-out is put onto the
525 * free list.
526 */
527 void
528 ahb_free_ecb(sc, ecb)
529 struct ahb_softc *sc;
530 struct ahb_ecb *ecb;
531 {
532 int s;
533
534 s = splbio();
535
536 ahb_reset_ecb(sc, ecb);
537 TAILQ_INSERT_HEAD(&sc->sc_free_ecb, ecb, chain);
538
539 /*
540 * If there were none, wake anybody waiting for one to come free,
541 * starting with queued entries.
542 */
543 if (ecb->chain.tqe_next == 0)
544 wakeup(&sc->sc_free_ecb);
545
546 splx(s);
547 }
548
549 /*
550 * Create a set of ecbs and add them to the free list.
551 */
552 integrate int
553 ahb_init_ecb(sc, ecb)
554 struct ahb_softc *sc;
555 struct ahb_ecb *ecb;
556 {
557 bus_dma_tag_t dmat = sc->sc_dmat;
558 int hashnum, error;
559
560 /*
561 * Create the DMA map for this ECB.
562 */
563 error = bus_dmamap_create(dmat, AHB_MAXXFER, AHB_NSEG, AHB_MAXXFER,
564 0, BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW, &ecb->dmamap_xfer);
565 if (error) {
566 printf("%s: can't create ecb dmamap_xfer\n",
567 sc->sc_dev.dv_xname);
568 return (error);
569 }
570
571 /*
572 * put in the phystokv hash table
573 * Never gets taken out.
574 */
575 ecb->hashkey = sc->sc_dmamap_ecb->dm_segs[0].ds_addr +
576 AHB_ECB_OFF(ecb);
577 hashnum = ECB_HASH(ecb->hashkey);
578 ecb->nexthash = sc->sc_ecbhash[hashnum];
579 sc->sc_ecbhash[hashnum] = ecb;
580 ahb_reset_ecb(sc, ecb);
581 return (0);
582 }
583
584 int
585 ahb_create_ecbs(sc, ecbstore, count)
586 struct ahb_softc *sc;
587 struct ahb_ecb *ecbstore;
588 int count;
589 {
590 struct ahb_ecb *ecb;
591 int i, error;
592
593 bzero(ecbstore, sizeof(struct ahb_ecb) * count);
594 for (i = 0; i < count; i++) {
595 ecb = &ecbstore[i];
596 if ((error = ahb_init_ecb(sc, ecb)) != 0) {
597 printf("%s: unable to initialize ecb, error = %d\n",
598 sc->sc_dev.dv_xname, error);
599 goto out;
600 }
601 TAILQ_INSERT_TAIL(&sc->sc_free_ecb, ecb, chain);
602 }
603 out:
604 return (i);
605 }
606
607 /*
608 * Get a free ecb
609 *
610 * If there are none, see if we can allocate a new one. If so, put it in the
611 * hash table too otherwise either return an error or sleep.
612 */
613 struct ahb_ecb *
614 ahb_get_ecb(sc, flags)
615 struct ahb_softc *sc;
616 int flags;
617 {
618 struct ahb_ecb *ecb;
619 int s;
620
621 s = splbio();
622
623 /*
624 * If we can and have to, sleep waiting for one to come free
625 * but only if we can't allocate a new one.
626 */
627 for (;;) {
628 ecb = sc->sc_free_ecb.tqh_first;
629 if (ecb) {
630 TAILQ_REMOVE(&sc->sc_free_ecb, ecb, chain);
631 break;
632 }
633 if ((flags & SCSI_NOSLEEP) != 0)
634 goto out;
635 tsleep(&sc->sc_free_ecb, PRIBIO, "ahbecb", 0);
636 }
637
638 ecb->flags |= ECB_ALLOC;
639
640 out:
641 splx(s);
642 return ecb;
643 }
644
645 /*
646 * given a physical address, find the ecb that it corresponds to.
647 */
648 struct ahb_ecb *
649 ahb_ecb_phys_kv(sc, ecb_phys)
650 struct ahb_softc *sc;
651 physaddr ecb_phys;
652 {
653 int hashnum = ECB_HASH(ecb_phys);
654 struct ahb_ecb *ecb = sc->sc_ecbhash[hashnum];
655
656 while (ecb) {
657 if (ecb->hashkey == ecb_phys)
658 break;
659 ecb = ecb->nexthash;
660 }
661 return ecb;
662 }
663
664 /*
665 * We have a ecb which has been processed by the adaptor, now we look to see
666 * how the operation went.
667 */
668 void
669 ahb_done(sc, ecb)
670 struct ahb_softc *sc;
671 struct ahb_ecb *ecb;
672 {
673 bus_dma_tag_t dmat = sc->sc_dmat;
674 struct scsipi_sense_data *s1, *s2;
675 struct scsipi_xfer *xs = ecb->xs;
676
677 SC_DEBUG(xs->sc_link, SDEV_DB2, ("ahb_done\n"));
678
679 bus_dmamap_sync(dmat, sc->sc_dmamap_ecb,
680 AHB_ECB_OFF(ecb), sizeof(struct ahb_ecb),
681 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
682
683 /*
684 * If we were a data transfer, unload the map that described
685 * the data buffer.
686 */
687 if (xs->datalen) {
688 bus_dmamap_sync(dmat, ecb->dmamap_xfer, 0,
689 ecb->dmamap_xfer->dm_mapsize,
690 (xs->flags & SCSI_DATA_IN) ? BUS_DMASYNC_POSTREAD :
691 BUS_DMASYNC_POSTWRITE);
692 bus_dmamap_unload(dmat, ecb->dmamap_xfer);
693 }
694
695 /*
696 * Otherwise, put the results of the operation
697 * into the xfer and call whoever started it
698 */
699 if ((ecb->flags & ECB_ALLOC) == 0) {
700 printf("%s: exiting ecb not allocated!\n", sc->sc_dev.dv_xname);
701 Debugger();
702 }
703 if (ecb->flags & ECB_IMMED) {
704 if (ecb->flags & ECB_IMMED_FAIL)
705 xs->error = XS_DRIVER_STUFFUP;
706 goto done;
707 }
708 if (xs->error == XS_NOERROR) {
709 if (ecb->ecb_status.host_stat != HS_OK) {
710 switch (ecb->ecb_status.host_stat) {
711 case HS_TIMED_OUT: /* No response */
712 xs->error = XS_SELTIMEOUT;
713 break;
714 default: /* Other scsi protocol messes */
715 printf("%s: host_stat %x\n",
716 sc->sc_dev.dv_xname, ecb->ecb_status.host_stat);
717 xs->error = XS_DRIVER_STUFFUP;
718 }
719 } else if (ecb->ecb_status.target_stat != SCSI_OK) {
720 switch (ecb->ecb_status.target_stat) {
721 case SCSI_CHECK:
722 s1 = &ecb->ecb_sense;
723 s2 = &xs->sense.scsi_sense;
724 *s2 = *s1;
725 xs->error = XS_SENSE;
726 break;
727 case SCSI_BUSY:
728 xs->error = XS_BUSY;
729 break;
730 default:
731 printf("%s: target_stat %x\n",
732 sc->sc_dev.dv_xname, ecb->ecb_status.target_stat);
733 xs->error = XS_DRIVER_STUFFUP;
734 }
735 } else
736 xs->resid = 0;
737 }
738 done:
739 ahb_free_ecb(sc, ecb);
740 xs->flags |= ITSDONE;
741 scsipi_done(xs);
742
743 /*
744 * If there are queue entries in the software queue, try to
745 * run the first one. We should be more or less guaranteed
746 * to succeed, since we just freed an ECB.
747 *
748 * NOTE: ahb_scsi_cmd() relies on our calling it with
749 * the first entry in the queue.
750 */
751 if ((xs = sc->sc_queue.lh_first) != NULL)
752 (void) ahb_scsi_cmd(xs);
753 }
754
755 /*
756 * Start the board, ready for normal operation
757 */
758 int
759 ahb_find(iot, ioh, sc)
760 bus_space_tag_t iot;
761 bus_space_handle_t ioh;
762 struct ahb_probe_data *sc;
763 {
764 u_char intdef;
765 int i, irq, busid;
766 int wait = 1000; /* 1 sec enough? */
767
768 bus_space_write_1(iot, ioh, PORTADDR, PORTADDR_ENHANCED);
769
770 #define NO_NO 1
771 #ifdef NO_NO
772 /*
773 * reset board, If it doesn't respond, assume
774 * that it's not there.. good for the probe
775 */
776 bus_space_write_1(iot, ioh, G2CNTRL, G2CNTRL_HARD_RESET);
777 delay(1000);
778 bus_space_write_1(iot, ioh, G2CNTRL, 0);
779 delay(10000);
780 while (--wait) {
781 if ((bus_space_read_1(iot, ioh, G2STAT) & G2STAT_BUSY) == 0)
782 break;
783 delay(1000);
784 }
785 if (!wait) {
786 #ifdef AHBDEBUG
787 printf("ahb_find: No answer from aha1742 board\n");
788 #endif /* AHBDEBUG */
789 return ENXIO;
790 }
791 i = bus_space_read_1(iot, ioh, MBOXIN0);
792 if (i) {
793 printf("self test failed, val = 0x%x\n", i);
794 return EIO;
795 }
796
797 /* Set it again, just to be sure. */
798 bus_space_write_1(iot, ioh, PORTADDR, PORTADDR_ENHANCED);
799 #endif
800
801 while (bus_space_read_1(iot, ioh, G2STAT) & G2STAT_INT_PEND) {
802 printf(".");
803 bus_space_write_1(iot, ioh, G2CNTRL, G2CNTRL_CLEAR_EISA_INT);
804 delay(10000);
805 }
806
807 intdef = bus_space_read_1(iot, ioh, INTDEF);
808 switch (intdef & 0x07) {
809 case INT9:
810 irq = 9;
811 break;
812 case INT10:
813 irq = 10;
814 break;
815 case INT11:
816 irq = 11;
817 break;
818 case INT12:
819 irq = 12;
820 break;
821 case INT14:
822 irq = 14;
823 break;
824 case INT15:
825 irq = 15;
826 break;
827 default:
828 printf("illegal int setting %x\n", intdef);
829 return EIO;
830 }
831
832 bus_space_write_1(iot, ioh, INTDEF, (intdef | INTEN)); /* make sure we can interrupt */
833
834 /* who are we on the scsi bus? */
835 busid = (bus_space_read_1(iot, ioh, SCSIDEF) & HSCSIID);
836
837 /* if we want to return data, do so now */
838 if (sc) {
839 sc->sc_irq = irq;
840 sc->sc_scsi_dev = busid;
841 }
842
843 /*
844 * Note that we are going and return (to probe)
845 */
846 return 0;
847 }
848
849 int
850 ahb_init(sc)
851 struct ahb_softc *sc;
852 {
853 bus_dma_segment_t seg;
854 int i, error, rseg;
855
856 #define ECBSIZE (AHB_ECB_MAX * sizeof(struct ahb_ecb))
857
858 /*
859 * Allocate the ECBs.
860 */
861 if ((error = bus_dmamem_alloc(sc->sc_dmat, ECBSIZE,
862 NBPG, 0, &seg, 1, &rseg, BUS_DMA_NOWAIT)) != 0) {
863 printf("%s: unable to allocate ecbs, error = %d\n",
864 sc->sc_dev.dv_xname, error);
865 return (error);
866 }
867 if ((error = bus_dmamem_map(sc->sc_dmat, &seg, rseg,
868 ECBSIZE, (caddr_t *)&sc->sc_ecbs,
869 BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) {
870 printf("%s: unable to map ecbs, error = %d\n",
871 sc->sc_dev.dv_xname, error);
872 return (error);
873 }
874
875 /*
876 * Create and load the DMA map used for the ecbs.
877 */
878 if ((error = bus_dmamap_create(sc->sc_dmat, ECBSIZE,
879 1, ECBSIZE, 0, BUS_DMA_NOWAIT, &sc->sc_dmamap_ecb)) != 0) {
880 printf("%s: unable to create ecb DMA map, error = %d\n",
881 sc->sc_dev.dv_xname, error);
882 return (error);
883 }
884 if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_dmamap_ecb,
885 sc->sc_ecbs, ECBSIZE, NULL, BUS_DMA_NOWAIT)) != 0) {
886 printf("%s: unable to load ecb DMA map, error = %d\n",
887 sc->sc_dev.dv_xname, error);
888 return (error);
889 }
890
891 #undef ECBSIZE
892
893 /*
894 * Initialize the ecbs.
895 */
896 i = ahb_create_ecbs(sc, sc->sc_ecbs, AHB_ECB_MAX);
897 if (i == 0) {
898 printf("%s: unable to create ecbs\n",
899 sc->sc_dev.dv_xname);
900 return (ENOMEM);
901 } else if (i != AHB_ECB_MAX) {
902 printf("%s: WARNING: only %d of %d ecbs created\n",
903 sc->sc_dev.dv_xname, i, AHB_ECB_MAX);
904 }
905
906 return (0);
907 }
908
909 void
910 ahbminphys(bp)
911 struct buf *bp;
912 {
913
914 if (bp->b_bcount > AHB_MAXXFER)
915 bp->b_bcount = AHB_MAXXFER;
916 minphys(bp);
917 }
918
919 /*
920 * start a scsi operation given the command and the data address. Also needs
921 * the unit, target and lu.
922 */
923 int
924 ahb_scsi_cmd(xs)
925 struct scsipi_xfer *xs;
926 {
927 struct scsipi_link *sc_link = xs->sc_link;
928 struct ahb_softc *sc = sc_link->adapter_softc;
929 bus_dma_tag_t dmat = sc->sc_dmat;
930 struct ahb_ecb *ecb;
931 int error, seg, flags, s;
932 int fromqueue = 0, dontqueue = 0;
933
934 SC_DEBUG(sc_link, SDEV_DB2, ("ahb_scsi_cmd\n"));
935
936 s = splbio(); /* protect the queue */
937
938 /*
939 * If we're running the queue from ahb_done(), we've been
940 * called with the first queue entry as our argument.
941 */
942 if (xs == sc->sc_queue.lh_first) {
943 xs = ahb_dequeue(sc);
944 fromqueue = 1;
945 goto get_ecb;
946 }
947
948 /* Polled requests can't be queued for later. */
949 dontqueue = xs->flags & SCSI_POLL;
950
951 /*
952 * If there are jobs in the queue, run them first.
953 */
954 if (sc->sc_queue.lh_first != NULL) {
955 /*
956 * If we can't queue, we have to abort, since
957 * we have to preserve order.
958 */
959 if (dontqueue) {
960 splx(s);
961 xs->error = XS_DRIVER_STUFFUP;
962 return (TRY_AGAIN_LATER);
963 }
964
965 /*
966 * Swap with the first queue entry.
967 */
968 ahb_enqueue(sc, xs, 0);
969 xs = ahb_dequeue(sc);
970 fromqueue = 1;
971 }
972
973 get_ecb:
974 /*
975 * get a ecb (mbox-out) to use. If the transfer
976 * is from a buf (possibly from interrupt time)
977 * then we can't allow it to sleep
978 */
979 flags = xs->flags;
980 if ((ecb = ahb_get_ecb(sc, flags)) == NULL) {
981 /*
982 * If we can't queue, we lose.
983 */
984 if (dontqueue) {
985 splx(s);
986 xs->error = XS_DRIVER_STUFFUP;
987 return (TRY_AGAIN_LATER);
988 }
989
990 /*
991 * Stuff ourselves into the queue, in front
992 * if we came off in the first place.
993 */
994 ahb_enqueue(sc, xs, fromqueue);
995 splx(s);
996 return (SUCCESSFULLY_QUEUED);
997 }
998
999 splx(s); /* done playing with the queue */
1000
1001 ecb->xs = xs;
1002 ecb->timeout = xs->timeout;
1003
1004 /*
1005 * If it's a reset, we need to do an 'immediate'
1006 * command, and store its ecb for later
1007 * if there is already an immediate waiting,
1008 * then WE must wait
1009 */
1010 if (flags & SCSI_RESET) {
1011 ecb->flags |= ECB_IMMED;
1012 if (sc->sc_immed_ecb)
1013 return TRY_AGAIN_LATER;
1014 sc->sc_immed_ecb = ecb;
1015
1016 s = splbio();
1017 ahb_send_immed(sc, AHB_TARG_RESET, ecb);
1018 splx(s);
1019
1020 if ((flags & SCSI_POLL) == 0)
1021 return SUCCESSFULLY_QUEUED;
1022
1023 /*
1024 * If we can't use interrupts, poll on completion
1025 */
1026 if (ahb_poll(sc, xs, ecb->timeout))
1027 ahb_timeout(ecb);
1028 return COMPLETE;
1029 }
1030
1031 /*
1032 * Put all the arguments for the xfer in the ecb
1033 */
1034 ecb->opcode = ECB_SCSI_OP;
1035 ecb->opt1 = ECB_SES /*| ECB_DSB*/ | ECB_ARS;
1036 ecb->opt2 = sc_link->scsipi_scsi.lun | ECB_NRB;
1037 bcopy(xs->cmd, &ecb->scsi_cmd, ecb->scsi_cmd_length = xs->cmdlen);
1038 ecb->sense_ptr = sc->sc_dmamap_ecb->dm_segs[0].ds_addr +
1039 AHB_ECB_OFF(ecb) + offsetof(struct ahb_ecb, ecb_sense);
1040 ecb->req_sense_length = sizeof(ecb->ecb_sense);
1041 ecb->status = sc->sc_dmamap_ecb->dm_segs[0].ds_addr +
1042 AHB_ECB_OFF(ecb) + offsetof(struct ahb_ecb, ecb_status);
1043 ecb->ecb_status.host_stat = 0x00;
1044 ecb->ecb_status.target_stat = 0x00;
1045
1046 if (xs->datalen) {
1047 /*
1048 * Map the DMA transfer.
1049 */
1050 #ifdef TFS
1051 if (flags & SCSI_DATA_UIO) {
1052 error = bus_dmamap_load_uio(sc->sc_dmat,
1053 ecb->dmamap_xfer, (struct uio *)xs->data,
1054 (flags & SCSI_NOSLEEP) ? BUS_DMA_NOWAIT :
1055 BUS_DMA_WAITOK);
1056 } else
1057 #endif /* TFS */
1058 {
1059 error = bus_dmamap_load(sc->sc_dmat,
1060 ecb->dmamap_xfer, xs->data, xs->datalen, NULL,
1061 (flags & SCSI_NOSLEEP) ? BUS_DMA_NOWAIT :
1062 BUS_DMA_WAITOK);
1063 }
1064
1065 if (error) {
1066 if (error == EFBIG) {
1067 printf("%s: ahb_scsi_cmd, more than %d"
1068 " dma segments\n",
1069 sc->sc_dev.dv_xname, AHB_NSEG);
1070 } else {
1071 printf("%s: ahb_scsi_cmd, error %d loading"
1072 " dma map\n",
1073 sc->sc_dev.dv_xname, error);
1074 }
1075 goto bad;
1076 }
1077
1078 bus_dmamap_sync(dmat, ecb->dmamap_xfer, 0,
1079 ecb->dmamap_xfer->dm_mapsize,
1080 (flags & SCSI_DATA_IN) ? BUS_DMASYNC_PREREAD :
1081 BUS_DMASYNC_PREWRITE);
1082
1083 /*
1084 * Load the hardware scatter/gather map with the
1085 * contents of the DMA map.
1086 */
1087 for (seg = 0; seg < ecb->dmamap_xfer->dm_nsegs; seg++) {
1088 ecb->ahb_dma[seg].seg_addr =
1089 ecb->dmamap_xfer->dm_segs[seg].ds_addr;
1090 ecb->ahb_dma[seg].seg_len =
1091 ecb->dmamap_xfer->dm_segs[seg].ds_len;
1092 }
1093
1094 ecb->data_addr = sc->sc_dmamap_ecb->dm_segs[0].ds_addr +
1095 AHB_ECB_OFF(ecb) + offsetof(struct ahb_ecb, ahb_dma);
1096 ecb->data_length = ecb->dmamap_xfer->dm_nsegs *
1097 sizeof(struct ahb_dma_seg);
1098 ecb->opt1 |= ECB_S_G;
1099 } else { /* No data xfer, use non S/G values */
1100 ecb->data_addr = (physaddr)0;
1101 ecb->data_length = 0;
1102 }
1103 ecb->link_addr = (physaddr)0;
1104
1105 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap_ecb,
1106 AHB_ECB_OFF(ecb), sizeof(struct ahb_ecb),
1107 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1108
1109 s = splbio();
1110 ahb_send_mbox(sc, OP_START_ECB, ecb);
1111 splx(s);
1112
1113 /*
1114 * Usually return SUCCESSFULLY QUEUED
1115 */
1116 if ((flags & SCSI_POLL) == 0)
1117 return SUCCESSFULLY_QUEUED;
1118
1119 /*
1120 * If we can't use interrupts, poll on completion
1121 */
1122 if (ahb_poll(sc, xs, ecb->timeout)) {
1123 ahb_timeout(ecb);
1124 if (ahb_poll(sc, xs, ecb->timeout))
1125 ahb_timeout(ecb);
1126 }
1127 return COMPLETE;
1128
1129 bad:
1130 xs->error = XS_DRIVER_STUFFUP;
1131 ahb_free_ecb(sc, ecb);
1132 return COMPLETE;
1133 }
1134
1135 /*
1136 * Function to poll for command completion when in poll mode
1137 */
1138 int
1139 ahb_poll(sc, xs, count)
1140 struct ahb_softc *sc;
1141 struct scsipi_xfer *xs;
1142 int count;
1143 { /* in msec */
1144 bus_space_tag_t iot = sc->sc_iot;
1145 bus_space_handle_t ioh = sc->sc_ioh;
1146
1147 while (count) {
1148 /*
1149 * If we had interrupts enabled, would we
1150 * have got an interrupt?
1151 */
1152 if (bus_space_read_1(iot, ioh, G2STAT) & G2STAT_INT_PEND)
1153 ahbintr(sc);
1154 if (xs->flags & ITSDONE)
1155 return 0;
1156 delay(1000);
1157 count--;
1158 }
1159 return 1;
1160 }
1161
1162 void
1163 ahb_timeout(arg)
1164 void *arg;
1165 {
1166 struct ahb_ecb *ecb = arg;
1167 struct scsipi_xfer *xs = ecb->xs;
1168 struct scsipi_link *sc_link = xs->sc_link;
1169 struct ahb_softc *sc = sc_link->adapter_softc;
1170 int s;
1171
1172 scsi_print_addr(sc_link);
1173 printf("timed out");
1174
1175 s = splbio();
1176
1177 if (ecb->flags & ECB_IMMED) {
1178 printf("\n");
1179 ecb->flags |= ECB_IMMED_FAIL;
1180 /* XXX Must reset! */
1181 } else
1182
1183 /*
1184 * If it has been through before, then
1185 * a previous abort has failed, don't
1186 * try abort again
1187 */
1188 if (ecb->flags & ECB_ABORT) {
1189 /* abort timed out */
1190 printf(" AGAIN\n");
1191 /* XXX Must reset! */
1192 } else {
1193 /* abort the operation that has timed out */
1194 printf("\n");
1195 ecb->xs->error = XS_TIMEOUT;
1196 ecb->timeout = AHB_ABORT_TIMEOUT;
1197 ecb->flags |= ECB_ABORT;
1198 ahb_send_mbox(sc, OP_ABORT_ECB, ecb);
1199 }
1200
1201 splx(s);
1202 }
1203