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ahb.c revision 1.28.2.4
      1 /*	$NetBSD: ahb.c,v 1.28.2.4 1999/11/01 22:54:14 thorpej Exp $	*/
      2 
      3 #include "opt_ddb.h"
      4 
      5 #undef	AHBDEBUG
      6 #ifdef DDB
      7 #define	integrate
      8 #else
      9 #define	integrate	static inline
     10 #endif
     11 
     12 /*-
     13  * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
     14  * All rights reserved.
     15  *
     16  * This code is derived from software contributed to The NetBSD Foundation
     17  * by Charles M. Hannum and by Jason R. Thorpe of the Numerical Aerospace
     18  * Simulation Facility, NASA Ames Research Center.
     19  *
     20  * Redistribution and use in source and binary forms, with or without
     21  * modification, are permitted provided that the following conditions
     22  * are met:
     23  * 1. Redistributions of source code must retain the above copyright
     24  *    notice, this list of conditions and the following disclaimer.
     25  * 2. Redistributions in binary form must reproduce the above copyright
     26  *    notice, this list of conditions and the following disclaimer in the
     27  *    documentation and/or other materials provided with the distribution.
     28  * 3. All advertising materials mentioning features or use of this software
     29  *    must display the following acknowledgement:
     30  *	This product includes software developed by the NetBSD
     31  *	Foundation, Inc. and its contributors.
     32  * 4. Neither the name of The NetBSD Foundation nor the names of its
     33  *    contributors may be used to endorse or promote products derived
     34  *    from this software without specific prior written permission.
     35  *
     36  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     37  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     38  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     39  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     40  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     41  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     42  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     43  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     44  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     45  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     46  * POSSIBILITY OF SUCH DAMAGE.
     47  */
     48 
     49 /*
     50  * Originally written by Julian Elischer (julian (at) tfs.com)
     51  * for TRW Financial Systems for use under the MACH(2.5) operating system.
     52  *
     53  * TRW Financial Systems, in accordance with their agreement with Carnegie
     54  * Mellon University, makes this software available to CMU to distribute
     55  * or use in any manner that they see fit as long as this message is kept with
     56  * the software. For this reason TFS also grants any other persons or
     57  * organisations permission to use or modify this software.
     58  *
     59  * TFS supplies this software to be publicly redistributed
     60  * on the understanding that TFS is not responsible for the correct
     61  * functioning of this software in any circumstances.
     62  */
     63 
     64 #include <sys/types.h>
     65 #include <sys/param.h>
     66 #include <sys/systm.h>
     67 #include <sys/kernel.h>
     68 #include <sys/errno.h>
     69 #include <sys/ioctl.h>
     70 #include <sys/device.h>
     71 #include <sys/malloc.h>
     72 #include <sys/buf.h>
     73 #include <sys/proc.h>
     74 #include <sys/user.h>
     75 
     76 #include <machine/bus.h>
     77 #include <machine/intr.h>
     78 
     79 #include <dev/scsipi/scsi_all.h>
     80 #include <dev/scsipi/scsipi_all.h>
     81 #include <dev/scsipi/scsiconf.h>
     82 
     83 #include <dev/eisa/eisareg.h>
     84 #include <dev/eisa/eisavar.h>
     85 #include <dev/eisa/eisadevs.h>
     86 #include <dev/eisa/ahbreg.h>
     87 
     88 #ifndef DDB
     89 #define Debugger() panic("should call debugger here (aha1742.c)")
     90 #endif /* ! DDB */
     91 
     92 #define AHB_ECB_MAX	32	/* store up to 32 ECBs at one time */
     93 #define	ECB_HASH_SIZE	32	/* hash table size for phystokv */
     94 #define	ECB_HASH_SHIFT	9
     95 #define ECB_HASH(x)	((((long)(x))>>ECB_HASH_SHIFT) & (ECB_HASH_SIZE - 1))
     96 
     97 #define AHB_MAXXFER	((AHB_NSEG - 1) << PGSHIFT)
     98 
     99 struct ahb_softc {
    100 	struct device sc_dev;
    101 
    102 	bus_space_tag_t sc_iot;
    103 	bus_space_handle_t sc_ioh;
    104 	bus_dma_tag_t sc_dmat;
    105 	void *sc_ih;
    106 
    107 	bus_dmamap_t sc_dmamap_ecb;	/* maps the ecbs */
    108 	struct ahb_ecb *sc_ecbs;	/* all our ecbs */
    109 
    110 	struct ahb_ecb *sc_ecbhash[ECB_HASH_SIZE];
    111 	TAILQ_HEAD(, ahb_ecb) sc_free_ecb;
    112 	struct ahb_ecb *sc_immed_ecb;	/* an outstanding immediete command */
    113 	int sc_numecbs;
    114 
    115 	struct scsipi_adapter sc_adapter;
    116 	struct scsipi_channel sc_channel;
    117 };
    118 
    119 /*
    120  * Offset of an ECB from the beginning of the ECB DMA mapping.
    121  */
    122 #define	AHB_ECB_OFF(e)	(((u_long)(e)) - ((u_long)&sc->sc_ecbs[0]))
    123 
    124 struct ahb_probe_data {
    125 	int sc_irq;
    126 	int sc_scsi_dev;
    127 };
    128 
    129 void	ahb_send_mbox __P((struct ahb_softc *, int, struct ahb_ecb *));
    130 void	ahb_send_immed __P((struct ahb_softc *, u_long, struct ahb_ecb *));
    131 int	ahbintr __P((void *));
    132 void	ahb_free_ecb __P((struct ahb_softc *, struct ahb_ecb *));
    133 struct	ahb_ecb *ahb_get_ecb __P((struct ahb_softc *));
    134 struct	ahb_ecb *ahb_ecb_phys_kv __P((struct ahb_softc *, physaddr));
    135 void	ahb_done __P((struct ahb_softc *, struct ahb_ecb *));
    136 int	ahb_find __P((bus_space_tag_t, bus_space_handle_t, struct ahb_probe_data *));
    137 int	ahb_init __P((struct ahb_softc *));
    138 void	ahbminphys __P((struct buf *));
    139 void	ahb_scsipi_request __P((struct scsipi_channel *,
    140 	    scsipi_adapter_req_t, void *));
    141 int	ahb_poll __P((struct ahb_softc *, struct scsipi_xfer *, int));
    142 void	ahb_timeout __P((void *));
    143 int	ahb_create_ecbs __P((struct ahb_softc *, struct ahb_ecb *, int));
    144 
    145 integrate void ahb_reset_ecb __P((struct ahb_softc *, struct ahb_ecb *));
    146 integrate int ahb_init_ecb __P((struct ahb_softc *, struct ahb_ecb *));
    147 
    148 int	ahbmatch __P((struct device *, struct cfdata *, void *));
    149 void	ahbattach __P((struct device *, struct device *, void *));
    150 
    151 struct cfattach ahb_ca = {
    152 	sizeof(struct ahb_softc), ahbmatch, ahbattach
    153 };
    154 
    155 #define	AHB_ABORT_TIMEOUT	2000	/* time to wait for abort (mSec) */
    156 
    157 /*
    158  * Check the slots looking for a board we recognise
    159  * If we find one, note it's address (slot) and call
    160  * the actual probe routine to check it out.
    161  */
    162 int
    163 ahbmatch(parent, match, aux)
    164 	struct device *parent;
    165 	struct cfdata *match;
    166 	void *aux;
    167 {
    168 	struct eisa_attach_args *ea = aux;
    169 	bus_space_tag_t iot = ea->ea_iot;
    170 	bus_space_handle_t ioh;
    171 	int rv;
    172 
    173 	/* must match one of our known ID strings */
    174 	if (strcmp(ea->ea_idstring, "ADP0000") &&
    175 	    strcmp(ea->ea_idstring, "ADP0001") &&
    176 	    strcmp(ea->ea_idstring, "ADP0002") &&
    177 	    strcmp(ea->ea_idstring, "ADP0400"))
    178 		return (0);
    179 
    180 	if (bus_space_map(iot,
    181 	    EISA_SLOT_ADDR(ea->ea_slot) + AHB_EISA_SLOT_OFFSET, AHB_EISA_IOSIZE,
    182 	    0, &ioh))
    183 		return (0);
    184 
    185 	rv = !ahb_find(iot, ioh, NULL);
    186 
    187 	bus_space_unmap(iot, ioh, AHB_EISA_IOSIZE);
    188 
    189 	return (rv);
    190 }
    191 
    192 /*
    193  * Attach all the sub-devices we can find
    194  */
    195 void
    196 ahbattach(parent, self, aux)
    197 	struct device *parent, *self;
    198 	void *aux;
    199 {
    200 	struct eisa_attach_args *ea = aux;
    201 	struct ahb_softc *sc = (void *)self;
    202 	bus_space_tag_t iot = ea->ea_iot;
    203 	bus_space_handle_t ioh;
    204 	eisa_chipset_tag_t ec = ea->ea_ec;
    205 	eisa_intr_handle_t ih;
    206 	const char *model, *intrstr;
    207 	struct ahb_probe_data apd;
    208 	struct scsipi_adapter *adapt = &sc->sc_adapter;
    209 	struct scsipi_channel *chan = &sc->sc_channel;
    210 
    211 	if (!strcmp(ea->ea_idstring, "ADP0000"))
    212 		model = EISA_PRODUCT_ADP0000;
    213 	else if (!strcmp(ea->ea_idstring, "ADP0001"))
    214 		model = EISA_PRODUCT_ADP0001;
    215 	else if (!strcmp(ea->ea_idstring, "ADP0002"))
    216 		model = EISA_PRODUCT_ADP0002;
    217 	else if (!strcmp(ea->ea_idstring, "ADP0400"))
    218 		model = EISA_PRODUCT_ADP0400;
    219 	else
    220 		model = "unknown model!";
    221 	printf(": %s\n", model);
    222 
    223 	if (bus_space_map(iot,
    224 	    EISA_SLOT_ADDR(ea->ea_slot) + AHB_EISA_SLOT_OFFSET, AHB_EISA_IOSIZE,
    225 	    0, &ioh))
    226 		panic("ahbattach: could not map I/O addresses");
    227 
    228 	sc->sc_iot = iot;
    229 	sc->sc_ioh = ioh;
    230 	sc->sc_dmat = ea->ea_dmat;
    231 	if (ahb_find(iot, ioh, &apd))
    232 		panic("ahbattach: ahb_find failed!");
    233 
    234 	TAILQ_INIT(&sc->sc_free_ecb);
    235 
    236 	/*
    237 	 * Fill in the scsipi_adapter.
    238 	 */
    239 	memset(adapt, 0, sizeof(*adapt));
    240 	adapt->adapt_dev = &sc->sc_dev;
    241 	adapt->adapt_nchannels = 1;
    242 	/* adapt_openings initialized below */
    243 	adapt->adapt_max_periph = 4;		/* XXX arbitrary? */
    244 	adapt->adapt_request = ahb_scsipi_request;
    245 	adapt->adapt_minphys = ahbminphys;
    246 
    247 	/*
    248 	 * Fill in the scsipi_channel.
    249 	 */
    250 	memset(chan, 0, sizeof(*chan));
    251 	chan->chan_adapter = adapt;
    252 	chan->chan_bustype = &scsi_bustype;
    253 	chan->chan_channel = 0;
    254 	chan->chan_ntargets = 8;
    255 	chan->chan_nluns = 8;
    256 	chan->chan_id = apd.sc_scsi_dev;
    257 
    258 	if (ahb_init(sc) != 0) {
    259 		/* Error during initialization! */
    260 		return;
    261 	}
    262 
    263 	if (eisa_intr_map(ec, apd.sc_irq, &ih)) {
    264 		printf("%s: couldn't map interrupt (%d)\n",
    265 		    sc->sc_dev.dv_xname, apd.sc_irq);
    266 		return;
    267 	}
    268 	intrstr = eisa_intr_string(ec, ih);
    269 	sc->sc_ih = eisa_intr_establish(ec, ih, IST_LEVEL, IPL_BIO,
    270 	    ahbintr, sc);
    271 	if (sc->sc_ih == NULL) {
    272 		printf("%s: couldn't establish interrupt",
    273 		    sc->sc_dev.dv_xname);
    274 		if (intrstr != NULL)
    275 			printf(" at %s", intrstr);
    276 		printf("\n");
    277 		return;
    278 	}
    279 	if (intrstr != NULL)
    280 		printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname,
    281 		    intrstr);
    282 
    283 	/*
    284 	 * ask the adapter what subunits are present
    285 	 */
    286 	config_found(self, &sc->sc_channel, scsiprint);
    287 }
    288 
    289 /*
    290  * Function to send a command out through a mailbox
    291  */
    292 void
    293 ahb_send_mbox(sc, opcode, ecb)
    294 	struct ahb_softc *sc;
    295 	int opcode;
    296 	struct ahb_ecb *ecb;
    297 {
    298 	bus_space_tag_t iot = sc->sc_iot;
    299 	bus_space_handle_t ioh = sc->sc_ioh;
    300 	int wait = 300;	/* 1ms should be enough */
    301 
    302 	while (--wait) {
    303 		if ((bus_space_read_1(iot, ioh, G2STAT) & (G2STAT_BUSY | G2STAT_MBOX_EMPTY))
    304 		    == (G2STAT_MBOX_EMPTY))
    305 			break;
    306 		delay(10);
    307 	}
    308 	if (!wait) {
    309 		printf("%s: board not responding\n", sc->sc_dev.dv_xname);
    310 		Debugger();
    311 	}
    312 
    313 	/*
    314 	 * don't know if this will work.
    315 	 * XXX WHAT DOES THIS COMMENT MEAN?!  --thorpej
    316 	 */
    317 	bus_space_write_4(iot, ioh, MBOXOUT0,
    318 	    sc->sc_dmamap_ecb->dm_segs[0].ds_addr + AHB_ECB_OFF(ecb));
    319 	bus_space_write_1(iot, ioh, ATTN, opcode |
    320 		ecb->xs->xs_periph->periph_target);
    321 
    322 	if ((ecb->xs->xs_control & XS_CTL_POLL) == 0)
    323 		timeout(ahb_timeout, ecb, (ecb->timeout * hz) / 1000);
    324 }
    325 
    326 /*
    327  * Function to  send an immediate type command to the adapter
    328  */
    329 void
    330 ahb_send_immed(sc, cmd, ecb)
    331 	struct ahb_softc *sc;
    332 	u_long cmd;
    333 	struct ahb_ecb *ecb;
    334 {
    335 	bus_space_tag_t iot = sc->sc_iot;
    336 	bus_space_handle_t ioh = sc->sc_ioh;
    337 	int wait = 100;	/* 1 ms enough? */
    338 
    339 	while (--wait) {
    340 		if ((bus_space_read_1(iot, ioh, G2STAT) & (G2STAT_BUSY | G2STAT_MBOX_EMPTY))
    341 		    == (G2STAT_MBOX_EMPTY))
    342 			break;
    343 		delay(10);
    344 	}
    345 	if (!wait) {
    346 		printf("%s: board not responding\n", sc->sc_dev.dv_xname);
    347 		Debugger();
    348 	}
    349 
    350 	bus_space_write_4(iot, ioh, MBOXOUT0, cmd);	/* don't know this will work */
    351 	bus_space_write_1(iot, ioh, G2CNTRL, G2CNTRL_SET_HOST_READY);
    352 	bus_space_write_1(iot, ioh, ATTN, OP_IMMED |
    353 		ecb->xs->xs_periph->periph_target);
    354 
    355 	if ((ecb->xs->xs_control & XS_CTL_POLL) == 0)
    356 		timeout(ahb_timeout, ecb, (ecb->timeout * hz) / 1000);
    357 }
    358 
    359 /*
    360  * Catch an interrupt from the adaptor
    361  */
    362 int
    363 ahbintr(arg)
    364 	void *arg;
    365 {
    366 	struct ahb_softc *sc = arg;
    367 	bus_space_tag_t iot = sc->sc_iot;
    368 	bus_space_handle_t ioh = sc->sc_ioh;
    369 	struct ahb_ecb *ecb;
    370 	u_char ahbstat;
    371 	u_long mboxval;
    372 
    373 #ifdef	AHBDEBUG
    374 	printf("%s: ahbintr ", sc->sc_dev.dv_xname);
    375 #endif /* AHBDEBUG */
    376 
    377 	if ((bus_space_read_1(iot, ioh, G2STAT) & G2STAT_INT_PEND) == 0)
    378 		return 0;
    379 
    380 	for (;;) {
    381 		/*
    382 		 * First get all the information and then
    383 		 * acknowlege the interrupt
    384 		 */
    385 		ahbstat = bus_space_read_1(iot, ioh, G2INTST);
    386 		mboxval = bus_space_read_4(iot, ioh, MBOXIN0);
    387 		bus_space_write_1(iot, ioh, G2CNTRL, G2CNTRL_CLEAR_EISA_INT);
    388 
    389 #ifdef	AHBDEBUG
    390 		printf("status = 0x%x ", ahbstat);
    391 #endif /* AHBDEBUG */
    392 
    393 		/*
    394 		 * Process the completed operation
    395 		 */
    396 		switch (ahbstat & G2INTST_INT_STAT) {
    397 		case AHB_ECB_OK:
    398 		case AHB_ECB_RECOVERED:
    399 		case AHB_ECB_ERR:
    400 			ecb = ahb_ecb_phys_kv(sc, mboxval);
    401 			if (!ecb) {
    402 				printf("%s: BAD ECB RETURNED!\n",
    403 				    sc->sc_dev.dv_xname);
    404 				goto next;	/* whatever it was, it'll timeout */
    405 			}
    406 			break;
    407 
    408 		case AHB_IMMED_ERR:
    409 			ecb = sc->sc_immed_ecb;
    410 			sc->sc_immed_ecb = 0;
    411 			ecb->flags |= ECB_IMMED_FAIL;
    412 			break;
    413 
    414 		case AHB_IMMED_OK:
    415 			ecb = sc->sc_immed_ecb;
    416 			sc->sc_immed_ecb = 0;
    417 			break;
    418 
    419 		default:
    420 			printf("%s: unexpected interrupt %x\n",
    421 			    sc->sc_dev.dv_xname, ahbstat);
    422 			goto next;
    423 		}
    424 
    425 		untimeout(ahb_timeout, ecb);
    426 		ahb_done(sc, ecb);
    427 
    428 	next:
    429 		if ((bus_space_read_1(iot, ioh, G2STAT) & G2STAT_INT_PEND) == 0)
    430 			return 1;
    431 	}
    432 }
    433 
    434 integrate void
    435 ahb_reset_ecb(sc, ecb)
    436 	struct ahb_softc *sc;
    437 	struct ahb_ecb *ecb;
    438 {
    439 
    440 	ecb->flags = 0;
    441 }
    442 
    443 /*
    444  * A ecb (and hence a mbx-out is put onto the
    445  * free list.
    446  */
    447 void
    448 ahb_free_ecb(sc, ecb)
    449 	struct ahb_softc *sc;
    450 	struct ahb_ecb *ecb;
    451 {
    452 	int s;
    453 
    454 	s = splbio();
    455 	ahb_reset_ecb(sc, ecb);
    456 	TAILQ_INSERT_HEAD(&sc->sc_free_ecb, ecb, chain);
    457 	splx(s);
    458 }
    459 
    460 /*
    461  * Create a set of ecbs and add them to the free list.
    462  */
    463 integrate int
    464 ahb_init_ecb(sc, ecb)
    465 	struct ahb_softc *sc;
    466 	struct ahb_ecb *ecb;
    467 {
    468 	bus_dma_tag_t dmat = sc->sc_dmat;
    469 	int hashnum, error;
    470 
    471 	/*
    472 	 * Create the DMA map for this ECB.
    473 	 */
    474 	error = bus_dmamap_create(dmat, AHB_MAXXFER, AHB_NSEG, AHB_MAXXFER,
    475 	    0, BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW, &ecb->dmamap_xfer);
    476 	if (error) {
    477 		printf("%s: can't create ecb dmamap_xfer\n",
    478 		    sc->sc_dev.dv_xname);
    479 		return (error);
    480 	}
    481 
    482 	/*
    483 	 * put in the phystokv hash table
    484 	 * Never gets taken out.
    485 	 */
    486 	ecb->hashkey = sc->sc_dmamap_ecb->dm_segs[0].ds_addr +
    487 	    AHB_ECB_OFF(ecb);
    488 	hashnum = ECB_HASH(ecb->hashkey);
    489 	ecb->nexthash = sc->sc_ecbhash[hashnum];
    490 	sc->sc_ecbhash[hashnum] = ecb;
    491 	ahb_reset_ecb(sc, ecb);
    492 	return (0);
    493 }
    494 
    495 int
    496 ahb_create_ecbs(sc, ecbstore, count)
    497 	struct ahb_softc *sc;
    498 	struct ahb_ecb *ecbstore;
    499 	int count;
    500 {
    501 	struct ahb_ecb *ecb;
    502 	int i, error;
    503 
    504 	bzero(ecbstore, sizeof(struct ahb_ecb) * count);
    505 	for (i = 0; i < count; i++) {
    506 		ecb = &ecbstore[i];
    507 		if ((error = ahb_init_ecb(sc, ecb)) != 0) {
    508 			printf("%s: unable to initialize ecb, error = %d\n",
    509 			    sc->sc_dev.dv_xname, error);
    510 			goto out;
    511 		}
    512 		TAILQ_INSERT_TAIL(&sc->sc_free_ecb, ecb, chain);
    513 	}
    514  out:
    515 	return (i);
    516 }
    517 
    518 /*
    519  * Get a free ecb
    520  *
    521  * If there are none, see if we can allocate a new one. If so, put it in the
    522  * hash table too otherwise either return an error or sleep.
    523  */
    524 struct ahb_ecb *
    525 ahb_get_ecb(sc)
    526 	struct ahb_softc *sc;
    527 {
    528 	struct ahb_ecb *ecb;
    529 	int s;
    530 
    531 	s = splbio();
    532 	ecb = TAILQ_FIRST(&sc->sc_free_ecb);
    533 	if (ecb != NULL) {
    534 		TAILQ_REMOVE(&sc->sc_free_ecb, ecb, chain);
    535 		ecb->flags |= ECB_ALLOC;
    536 	}
    537 	splx(s);
    538 	return (ecb);
    539 }
    540 
    541 /*
    542  * given a physical address, find the ecb that it corresponds to.
    543  */
    544 struct ahb_ecb *
    545 ahb_ecb_phys_kv(sc, ecb_phys)
    546 	struct ahb_softc *sc;
    547 	physaddr ecb_phys;
    548 {
    549 	int hashnum = ECB_HASH(ecb_phys);
    550 	struct ahb_ecb *ecb = sc->sc_ecbhash[hashnum];
    551 
    552 	while (ecb) {
    553 		if (ecb->hashkey == ecb_phys)
    554 			break;
    555 		ecb = ecb->nexthash;
    556 	}
    557 	return ecb;
    558 }
    559 
    560 /*
    561  * We have a ecb which has been processed by the adaptor, now we look to see
    562  * how the operation went.
    563  */
    564 void
    565 ahb_done(sc, ecb)
    566 	struct ahb_softc *sc;
    567 	struct ahb_ecb *ecb;
    568 {
    569 	bus_dma_tag_t dmat = sc->sc_dmat;
    570 	struct scsipi_sense_data *s1, *s2;
    571 	struct scsipi_xfer *xs = ecb->xs;
    572 
    573 	SC_DEBUG(xs->xs_periph, SCSIPI_DB2, ("ahb_done\n"));
    574 
    575 	bus_dmamap_sync(dmat, sc->sc_dmamap_ecb,
    576 	    AHB_ECB_OFF(ecb), sizeof(struct ahb_ecb),
    577 	    BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
    578 
    579 	/*
    580 	 * If we were a data transfer, unload the map that described
    581 	 * the data buffer.
    582 	 */
    583 	if (xs->datalen) {
    584 		bus_dmamap_sync(dmat, ecb->dmamap_xfer, 0,
    585 		    ecb->dmamap_xfer->dm_mapsize,
    586 		    (xs->xs_control & XS_CTL_DATA_IN) ? BUS_DMASYNC_POSTREAD :
    587 		    BUS_DMASYNC_POSTWRITE);
    588 		bus_dmamap_unload(dmat, ecb->dmamap_xfer);
    589 	}
    590 
    591 	/*
    592 	 * Otherwise, put the results of the operation
    593 	 * into the xfer and call whoever started it
    594 	 */
    595 	if ((ecb->flags & ECB_ALLOC) == 0) {
    596 		printf("%s: exiting ecb not allocated!\n", sc->sc_dev.dv_xname);
    597 		Debugger();
    598 	}
    599 	if (ecb->flags & ECB_IMMED) {
    600 		if (ecb->flags & ECB_IMMED_FAIL)
    601 			xs->error = XS_DRIVER_STUFFUP;
    602 		goto done;
    603 	}
    604 	if (xs->error == XS_NOERROR) {
    605 		if (ecb->ecb_status.host_stat != HS_OK) {
    606 			switch (ecb->ecb_status.host_stat) {
    607 			case HS_TIMED_OUT:	/* No response */
    608 				xs->error = XS_SELTIMEOUT;
    609 				break;
    610 			default:	/* Other scsi protocol messes */
    611 				printf("%s: host_stat %x\n",
    612 				    sc->sc_dev.dv_xname, ecb->ecb_status.host_stat);
    613 				xs->error = XS_DRIVER_STUFFUP;
    614 			}
    615 		} else if (ecb->ecb_status.target_stat != SCSI_OK) {
    616 			switch (ecb->ecb_status.target_stat) {
    617 			case SCSI_CHECK:
    618 				s1 = &ecb->ecb_sense;
    619 				s2 = &xs->sense.scsi_sense;
    620 				*s2 = *s1;
    621 				xs->error = XS_SENSE;
    622 				break;
    623 			case SCSI_BUSY:
    624 				xs->error = XS_BUSY;
    625 				break;
    626 			default:
    627 				printf("%s: target_stat %x\n",
    628 				    sc->sc_dev.dv_xname, ecb->ecb_status.target_stat);
    629 				xs->error = XS_DRIVER_STUFFUP;
    630 			}
    631 		} else
    632 			xs->resid = 0;
    633 	}
    634 done:
    635 	ahb_free_ecb(sc, ecb);
    636 	scsipi_done(xs);
    637 }
    638 
    639 /*
    640  * Start the board, ready for normal operation
    641  */
    642 int
    643 ahb_find(iot, ioh, sc)
    644 	bus_space_tag_t iot;
    645 	bus_space_handle_t ioh;
    646 	struct ahb_probe_data *sc;
    647 {
    648 	u_char intdef;
    649 	int i, irq, busid;
    650 	int wait = 1000;	/* 1 sec enough? */
    651 
    652 	bus_space_write_1(iot, ioh, PORTADDR, PORTADDR_ENHANCED);
    653 
    654 #define	NO_NO 1
    655 #ifdef NO_NO
    656 	/*
    657 	 * reset board, If it doesn't respond, assume
    658 	 * that it's not there.. good for the probe
    659 	 */
    660 	bus_space_write_1(iot, ioh, G2CNTRL, G2CNTRL_HARD_RESET);
    661 	delay(1000);
    662 	bus_space_write_1(iot, ioh, G2CNTRL, 0);
    663 	delay(10000);
    664 	while (--wait) {
    665 		if ((bus_space_read_1(iot, ioh, G2STAT) & G2STAT_BUSY) == 0)
    666 			break;
    667 		delay(1000);
    668 	}
    669 	if (!wait) {
    670 #ifdef	AHBDEBUG
    671 		printf("ahb_find: No answer from aha1742 board\n");
    672 #endif /* AHBDEBUG */
    673 		return ENXIO;
    674 	}
    675 	i = bus_space_read_1(iot, ioh, MBOXIN0);
    676 	if (i) {
    677 		printf("self test failed, val = 0x%x\n", i);
    678 		return EIO;
    679 	}
    680 
    681 	/* Set it again, just to be sure. */
    682 	bus_space_write_1(iot, ioh, PORTADDR, PORTADDR_ENHANCED);
    683 #endif
    684 
    685 	while (bus_space_read_1(iot, ioh, G2STAT) & G2STAT_INT_PEND) {
    686 		printf(".");
    687 		bus_space_write_1(iot, ioh, G2CNTRL, G2CNTRL_CLEAR_EISA_INT);
    688 		delay(10000);
    689 	}
    690 
    691 	intdef = bus_space_read_1(iot, ioh, INTDEF);
    692 	switch (intdef & 0x07) {
    693 	case INT9:
    694 		irq = 9;
    695 		break;
    696 	case INT10:
    697 		irq = 10;
    698 		break;
    699 	case INT11:
    700 		irq = 11;
    701 		break;
    702 	case INT12:
    703 		irq = 12;
    704 		break;
    705 	case INT14:
    706 		irq = 14;
    707 		break;
    708 	case INT15:
    709 		irq = 15;
    710 		break;
    711 	default:
    712 		printf("illegal int setting %x\n", intdef);
    713 		return EIO;
    714 	}
    715 
    716 	bus_space_write_1(iot, ioh, INTDEF, (intdef | INTEN));	/* make sure we can interrupt */
    717 
    718 	/* who are we on the scsi bus? */
    719 	busid = (bus_space_read_1(iot, ioh, SCSIDEF) & HSCSIID);
    720 
    721 	/* if we want to return data, do so now */
    722 	if (sc) {
    723 		sc->sc_irq = irq;
    724 		sc->sc_scsi_dev = busid;
    725 	}
    726 
    727 	/*
    728 	 * Note that we are going and return (to probe)
    729 	 */
    730 	return 0;
    731 }
    732 
    733 int
    734 ahb_init(sc)
    735 	struct ahb_softc *sc;
    736 {
    737 	bus_dma_segment_t seg;
    738 	int i, error, rseg;
    739 
    740 #define	ECBSIZE		(AHB_ECB_MAX * sizeof(struct ahb_ecb))
    741 
    742 	/*
    743 	 * Allocate the ECBs.
    744 	 */
    745 	if ((error = bus_dmamem_alloc(sc->sc_dmat, ECBSIZE,
    746 	    NBPG, 0, &seg, 1, &rseg, BUS_DMA_NOWAIT)) != 0) {
    747 		printf("%s: unable to allocate ecbs, error = %d\n",
    748 		    sc->sc_dev.dv_xname, error);
    749 		return (error);
    750 	}
    751 	if ((error = bus_dmamem_map(sc->sc_dmat, &seg, rseg,
    752 	    ECBSIZE, (caddr_t *)&sc->sc_ecbs,
    753 	    BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) {
    754 		printf("%s: unable to map ecbs, error = %d\n",
    755 		    sc->sc_dev.dv_xname, error);
    756 		return (error);
    757 	}
    758 
    759 	/*
    760 	 * Create and load the DMA map used for the ecbs.
    761 	 */
    762 	if ((error = bus_dmamap_create(sc->sc_dmat, ECBSIZE,
    763 	    1, ECBSIZE, 0, BUS_DMA_NOWAIT, &sc->sc_dmamap_ecb)) != 0) {
    764 		printf("%s: unable to create ecb DMA map, error = %d\n",
    765 		    sc->sc_dev.dv_xname, error);
    766 		return (error);
    767 	}
    768 	if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_dmamap_ecb,
    769 	    sc->sc_ecbs, ECBSIZE, NULL, BUS_DMA_NOWAIT)) != 0) {
    770 		printf("%s: unable to load ecb DMA map, error = %d\n",
    771 		    sc->sc_dev.dv_xname, error);
    772 		return (error);
    773 	}
    774 
    775 #undef ECBSIZE
    776 
    777 	/*
    778 	 * Initialize the ecbs.
    779 	 */
    780 	i = ahb_create_ecbs(sc, sc->sc_ecbs, AHB_ECB_MAX);
    781 	if (i == 0) {
    782 		printf("%s: unable to create ecbs\n",
    783 		    sc->sc_dev.dv_xname);
    784 		return (ENOMEM);
    785 	} else if (i != AHB_ECB_MAX) {
    786 		printf("%s: WARNING: only %d of %d ecbs created\n",
    787 		    sc->sc_dev.dv_xname, i, AHB_ECB_MAX);
    788 	}
    789 
    790 	sc->sc_adapter.adapt_openings = i;
    791 
    792 	return (0);
    793 }
    794 
    795 void
    796 ahbminphys(bp)
    797 	struct buf *bp;
    798 {
    799 
    800 	if (bp->b_bcount > AHB_MAXXFER)
    801 		bp->b_bcount = AHB_MAXXFER;
    802 	minphys(bp);
    803 }
    804 
    805 /*
    806  * start a scsi operation given the command and the data address.  Also needs
    807  * the unit, target and lu.
    808  */
    809 void
    810 ahb_scsipi_request(chan, req, arg)
    811 	struct scsipi_channel *chan;
    812 	scsipi_adapter_req_t req;
    813 	void *arg;
    814 {
    815 	struct scsipi_xfer *xs;
    816 	struct scsipi_periph *periph;
    817 	struct ahb_softc *sc = (void *)chan->chan_adapter->adapt_dev;
    818 	bus_dma_tag_t dmat = sc->sc_dmat;
    819 	struct ahb_ecb *ecb;
    820 	int error, seg, flags, s;
    821 
    822 	switch (req) {
    823 	case ADAPTER_REQ_RUN_XFER:
    824 		xs = arg;
    825 		periph = xs->xs_periph;
    826 		flags = xs->xs_control;
    827 
    828 		SC_DEBUG(periph, SCSIPI_DB2, ("ahb_scsipi_request\n"));
    829 
    830 		/* Get an ECB to use. */
    831 		ecb = ahb_get_ecb(sc);
    832 #ifdef DIAGNOSTIC
    833 		/*
    834 		 * This should never happen as we track the resources
    835 		 * in the mid-layer.
    836 		 */
    837 		if (ecb == NULL) {
    838 			scsipi_printaddr(periph);
    839 			printf("unable to allocate ecb\n");
    840 			panic("ahb_scsipi_request");
    841 		}
    842 #endif
    843 
    844 		ecb->xs = xs;
    845 		ecb->timeout = xs->timeout;
    846 
    847 		/*
    848 		 * If it's a reset, we need to do an 'immediate'
    849 		 * command, and store its ecb for later
    850 		 * if there is already an immediate waiting,
    851 		 * then WE must wait
    852 		 */
    853 		if (flags & XS_CTL_RESET) {
    854 			ecb->flags |= ECB_IMMED;
    855 			if (sc->sc_immed_ecb) {
    856 				ahb_free_ecb(sc, ecb);
    857 				xs->error = XS_BUSY;
    858 				scsipi_done(xs);
    859 				return;
    860 			}
    861 			sc->sc_immed_ecb = ecb;
    862 
    863 			s = splbio();
    864 			ahb_send_immed(sc, AHB_TARG_RESET, ecb);
    865 			splx(s);
    866 
    867 			if ((flags & XS_CTL_POLL) == 0)
    868 				return;
    869 
    870 			/*
    871 			 * If we can't use interrupts, poll on completion
    872 			 */
    873 			if (ahb_poll(sc, xs, ecb->timeout))
    874 				ahb_timeout(ecb);
    875 			return;
    876 		}
    877 
    878 		/*
    879 		 * Put all the arguments for the xfer in the ecb
    880 		 */
    881 		ecb->opcode = ECB_SCSI_OP;
    882 		ecb->opt1 = ECB_SES /*| ECB_DSB*/ | ECB_ARS;
    883 		ecb->opt2 = periph->periph_lun | ECB_NRB;
    884 		bcopy(xs->cmd, &ecb->scsi_cmd,
    885 		    ecb->scsi_cmd_length = xs->cmdlen);
    886 		ecb->sense_ptr = sc->sc_dmamap_ecb->dm_segs[0].ds_addr +
    887 		    AHB_ECB_OFF(ecb) + offsetof(struct ahb_ecb, ecb_sense);
    888 		ecb->req_sense_length = sizeof(ecb->ecb_sense);
    889 		ecb->status = sc->sc_dmamap_ecb->dm_segs[0].ds_addr +
    890 		    AHB_ECB_OFF(ecb) + offsetof(struct ahb_ecb, ecb_status);
    891 		ecb->ecb_status.host_stat = 0x00;
    892 		ecb->ecb_status.target_stat = 0x00;
    893 
    894 		if (xs->datalen) {
    895 			/*
    896 			 * Map the DMA transfer.
    897 			 */
    898 #ifdef TFS
    899 			if (flags & XS_CTL_DATA_UIO) {
    900 				error = bus_dmamap_load_uio(sc->sc_dmat,
    901 				    ecb->dmamap_xfer, (struct uio *)xs->data,
    902 				    BUS_DMA_NOWAIT);
    903 			} else
    904 #endif /* TFS */
    905 			{
    906 				error = bus_dmamap_load(sc->sc_dmat,
    907 				    ecb->dmamap_xfer, xs->data, xs->datalen,
    908 				    NULL, BUS_DMA_NOWAIT);
    909 			}
    910 
    911 			switch (error) {
    912 			case 0:
    913 				break;
    914 
    915 			case ENOMEM:
    916 			case EAGAIN:
    917 				xs->error = XS_RESOURCE_SHORTAGE;
    918 				goto out_bad;
    919 
    920 			default:
    921 				xs->error = XS_DRIVER_STUFFUP;
    922 				printf("%s: error %d loading DMA map\n",
    923 				    sc->sc_dev.dv_xname, error);
    924  out_bad:
    925 				ahb_free_ecb(sc, ecb);
    926 				scsipi_done(xs);
    927 				return;
    928 			}
    929 
    930 			bus_dmamap_sync(dmat, ecb->dmamap_xfer, 0,
    931 			    ecb->dmamap_xfer->dm_mapsize,
    932 			    (flags & XS_CTL_DATA_IN) ? BUS_DMASYNC_PREREAD :
    933 			    BUS_DMASYNC_PREWRITE);
    934 
    935 			/*
    936 			 * Load the hardware scatter/gather map with the
    937 			 * contents of the DMA map.
    938 			 */
    939 			for (seg = 0; seg < ecb->dmamap_xfer->dm_nsegs; seg++) {
    940 				ecb->ahb_dma[seg].seg_addr =
    941 				    ecb->dmamap_xfer->dm_segs[seg].ds_addr;
    942 				ecb->ahb_dma[seg].seg_len =
    943 				    ecb->dmamap_xfer->dm_segs[seg].ds_len;
    944 			}
    945 
    946 			ecb->data_addr = sc->sc_dmamap_ecb->dm_segs[0].ds_addr +
    947 			    AHB_ECB_OFF(ecb) +
    948 			    offsetof(struct ahb_ecb, ahb_dma);
    949 			ecb->data_length = ecb->dmamap_xfer->dm_nsegs *
    950 			    sizeof(struct ahb_dma_seg);
    951 			ecb->opt1 |= ECB_S_G;
    952 		} else {	/* No data xfer, use non S/G values */
    953 			ecb->data_addr = (physaddr)0;
    954 			ecb->data_length = 0;
    955 		}
    956 		ecb->link_addr = (physaddr)0;
    957 
    958 		bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap_ecb,
    959 		    AHB_ECB_OFF(ecb), sizeof(struct ahb_ecb),
    960 		    BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
    961 
    962 		s = splbio();
    963 		ahb_send_mbox(sc, OP_START_ECB, ecb);
    964 		splx(s);
    965 
    966 		if ((flags & XS_CTL_POLL) == 0)
    967 			return;
    968 
    969 		/*
    970 		 * If we can't use interrupts, poll on completion
    971 		 */
    972 		if (ahb_poll(sc, xs, ecb->timeout)) {
    973 			ahb_timeout(ecb);
    974 			if (ahb_poll(sc, xs, ecb->timeout))
    975 				ahb_timeout(ecb);
    976 		}
    977 		return;
    978 
    979 	case ADAPTER_REQ_GROW_RESOURCES:
    980 		/* XXX Not supported. */
    981 		return;
    982 
    983 	case ADAPTER_REQ_SET_XFER_MODE:
    984 		/* XXX How do we do this? */
    985 		return;
    986 	}
    987 }
    988 
    989 /*
    990  * Function to poll for command completion when in poll mode
    991  */
    992 int
    993 ahb_poll(sc, xs, count)
    994 	struct ahb_softc *sc;
    995 	struct scsipi_xfer *xs;
    996 	int count;
    997 {				/* in msec  */
    998 	bus_space_tag_t iot = sc->sc_iot;
    999 	bus_space_handle_t ioh = sc->sc_ioh;
   1000 
   1001 	while (count) {
   1002 		/*
   1003 		 * If we had interrupts enabled, would we
   1004 		 * have got an interrupt?
   1005 		 */
   1006 		if (bus_space_read_1(iot, ioh, G2STAT) & G2STAT_INT_PEND)
   1007 			ahbintr(sc);
   1008 		if (xs->xs_status & XS_STS_DONE)
   1009 			return 0;
   1010 		delay(1000);
   1011 		count--;
   1012 	}
   1013 	return 1;
   1014 }
   1015 
   1016 void
   1017 ahb_timeout(arg)
   1018 	void *arg;
   1019 {
   1020 	struct ahb_ecb *ecb = arg;
   1021 	struct scsipi_xfer *xs = ecb->xs;
   1022 	struct scsipi_periph *periph = xs->xs_periph;
   1023 	struct ahb_softc *sc =
   1024 	    (void *)periph->periph_channel->chan_adapter->adapt_dev;
   1025 	int s;
   1026 
   1027 	scsipi_printaddr(periph);
   1028 	printf("timed out");
   1029 
   1030 	s = splbio();
   1031 
   1032 	if (ecb->flags & ECB_IMMED) {
   1033 		printf("\n");
   1034 		ecb->flags |= ECB_IMMED_FAIL;
   1035 		/* XXX Must reset! */
   1036 	} else
   1037 
   1038 	/*
   1039 	 * If it has been through before, then
   1040 	 * a previous abort has failed, don't
   1041 	 * try abort again
   1042 	 */
   1043 	if (ecb->flags & ECB_ABORT) {
   1044 		/* abort timed out */
   1045 		printf(" AGAIN\n");
   1046 		/* XXX Must reset! */
   1047 	} else {
   1048 		/* abort the operation that has timed out */
   1049 		printf("\n");
   1050 		ecb->xs->error = XS_TIMEOUT;
   1051 		ecb->timeout = AHB_ABORT_TIMEOUT;
   1052 		ecb->flags |= ECB_ABORT;
   1053 		ahb_send_mbox(sc, OP_ABORT_ECB, ecb);
   1054 	}
   1055 
   1056 	splx(s);
   1057 }
   1058