ahb.c revision 1.32
1 /* $NetBSD: ahb.c,v 1.32 2001/04/25 17:53:27 bouyer Exp $ */ 2 3 #include "opt_ddb.h" 4 5 #undef AHBDEBUG 6 #ifdef DDB 7 #define integrate 8 #else 9 #define integrate static inline 10 #endif 11 12 /*- 13 * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc. 14 * All rights reserved. 15 * 16 * This code is derived from software contributed to The NetBSD Foundation 17 * by Charles M. Hannum and by Jason R. Thorpe of the Numerical Aerospace 18 * Simulation Facility, NASA Ames Research Center. 19 * 20 * Redistribution and use in source and binary forms, with or without 21 * modification, are permitted provided that the following conditions 22 * are met: 23 * 1. Redistributions of source code must retain the above copyright 24 * notice, this list of conditions and the following disclaimer. 25 * 2. Redistributions in binary form must reproduce the above copyright 26 * notice, this list of conditions and the following disclaimer in the 27 * documentation and/or other materials provided with the distribution. 28 * 3. All advertising materials mentioning features or use of this software 29 * must display the following acknowledgement: 30 * This product includes software developed by the NetBSD 31 * Foundation, Inc. and its contributors. 32 * 4. Neither the name of The NetBSD Foundation nor the names of its 33 * contributors may be used to endorse or promote products derived 34 * from this software without specific prior written permission. 35 * 36 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 37 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 38 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 39 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 40 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 41 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 42 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 43 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 44 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 45 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 46 * POSSIBILITY OF SUCH DAMAGE. 47 */ 48 49 /* 50 * Originally written by Julian Elischer (julian (at) tfs.com) 51 * for TRW Financial Systems for use under the MACH(2.5) operating system. 52 * 53 * TRW Financial Systems, in accordance with their agreement with Carnegie 54 * Mellon University, makes this software available to CMU to distribute 55 * or use in any manner that they see fit as long as this message is kept with 56 * the software. For this reason TFS also grants any other persons or 57 * organisations permission to use or modify this software. 58 * 59 * TFS supplies this software to be publicly redistributed 60 * on the understanding that TFS is not responsible for the correct 61 * functioning of this software in any circumstances. 62 */ 63 64 #include <sys/types.h> 65 #include <sys/param.h> 66 #include <sys/systm.h> 67 #include <sys/kernel.h> 68 #include <sys/errno.h> 69 #include <sys/ioctl.h> 70 #include <sys/device.h> 71 #include <sys/malloc.h> 72 #include <sys/buf.h> 73 #include <sys/proc.h> 74 #include <sys/user.h> 75 76 #include <uvm/uvm_extern.h> 77 78 #include <machine/bus.h> 79 #include <machine/intr.h> 80 81 #include <dev/scsipi/scsi_all.h> 82 #include <dev/scsipi/scsipi_all.h> 83 #include <dev/scsipi/scsiconf.h> 84 85 #include <dev/eisa/eisareg.h> 86 #include <dev/eisa/eisavar.h> 87 #include <dev/eisa/eisadevs.h> 88 #include <dev/eisa/ahbreg.h> 89 90 #ifndef DDB 91 #define Debugger() panic("should call debugger here (aha1742.c)") 92 #endif /* ! DDB */ 93 94 #define AHB_ECB_MAX 32 /* store up to 32 ECBs at one time */ 95 #define ECB_HASH_SIZE 32 /* hash table size for phystokv */ 96 #define ECB_HASH_SHIFT 9 97 #define ECB_HASH(x) ((((long)(x))>>ECB_HASH_SHIFT) & (ECB_HASH_SIZE - 1)) 98 99 #define AHB_MAXXFER ((AHB_NSEG - 1) << PGSHIFT) 100 101 struct ahb_softc { 102 struct device sc_dev; 103 104 bus_space_tag_t sc_iot; 105 bus_space_handle_t sc_ioh; 106 bus_dma_tag_t sc_dmat; 107 void *sc_ih; 108 109 bus_dmamap_t sc_dmamap_ecb; /* maps the ecbs */ 110 struct ahb_ecb *sc_ecbs; /* all our ecbs */ 111 112 struct ahb_ecb *sc_ecbhash[ECB_HASH_SIZE]; 113 TAILQ_HEAD(, ahb_ecb) sc_free_ecb; 114 struct ahb_ecb *sc_immed_ecb; /* an outstanding immediete command */ 115 int sc_numecbs; 116 117 struct scsipi_adapter sc_adapter; 118 struct scsipi_channel sc_channel; 119 }; 120 121 /* 122 * Offset of an ECB from the beginning of the ECB DMA mapping. 123 */ 124 #define AHB_ECB_OFF(e) (((u_long)(e)) - ((u_long)&sc->sc_ecbs[0])) 125 126 struct ahb_probe_data { 127 int sc_irq; 128 int sc_scsi_dev; 129 }; 130 131 void ahb_send_mbox __P((struct ahb_softc *, int, struct ahb_ecb *)); 132 void ahb_send_immed __P((struct ahb_softc *, u_int32_t, struct ahb_ecb *)); 133 int ahbintr __P((void *)); 134 void ahb_free_ecb __P((struct ahb_softc *, struct ahb_ecb *)); 135 struct ahb_ecb *ahb_get_ecb __P((struct ahb_softc *)); 136 struct ahb_ecb *ahb_ecb_phys_kv __P((struct ahb_softc *, physaddr)); 137 void ahb_done __P((struct ahb_softc *, struct ahb_ecb *)); 138 int ahb_find __P((bus_space_tag_t, bus_space_handle_t, struct ahb_probe_data *)); 139 int ahb_init __P((struct ahb_softc *)); 140 void ahbminphys __P((struct buf *)); 141 void ahb_scsipi_request __P((struct scsipi_channel *, 142 scsipi_adapter_req_t, void *)); 143 int ahb_poll __P((struct ahb_softc *, struct scsipi_xfer *, int)); 144 void ahb_timeout __P((void *)); 145 int ahb_create_ecbs __P((struct ahb_softc *, struct ahb_ecb *, int)); 146 147 integrate void ahb_reset_ecb __P((struct ahb_softc *, struct ahb_ecb *)); 148 integrate int ahb_init_ecb __P((struct ahb_softc *, struct ahb_ecb *)); 149 150 int ahbmatch __P((struct device *, struct cfdata *, void *)); 151 void ahbattach __P((struct device *, struct device *, void *)); 152 153 struct cfattach ahb_ca = { 154 sizeof(struct ahb_softc), ahbmatch, ahbattach 155 }; 156 157 #define AHB_ABORT_TIMEOUT 2000 /* time to wait for abort (mSec) */ 158 159 /* 160 * Check the slots looking for a board we recognise 161 * If we find one, note it's address (slot) and call 162 * the actual probe routine to check it out. 163 */ 164 int 165 ahbmatch(parent, match, aux) 166 struct device *parent; 167 struct cfdata *match; 168 void *aux; 169 { 170 struct eisa_attach_args *ea = aux; 171 bus_space_tag_t iot = ea->ea_iot; 172 bus_space_handle_t ioh; 173 int rv; 174 175 /* must match one of our known ID strings */ 176 if (strcmp(ea->ea_idstring, "ADP0000") && 177 strcmp(ea->ea_idstring, "ADP0001") && 178 strcmp(ea->ea_idstring, "ADP0002") && 179 strcmp(ea->ea_idstring, "ADP0400")) 180 return (0); 181 182 if (bus_space_map(iot, 183 EISA_SLOT_ADDR(ea->ea_slot) + AHB_EISA_SLOT_OFFSET, AHB_EISA_IOSIZE, 184 0, &ioh)) 185 return (0); 186 187 rv = !ahb_find(iot, ioh, NULL); 188 189 bus_space_unmap(iot, ioh, AHB_EISA_IOSIZE); 190 191 return (rv); 192 } 193 194 /* 195 * Attach all the sub-devices we can find 196 */ 197 void 198 ahbattach(parent, self, aux) 199 struct device *parent, *self; 200 void *aux; 201 { 202 struct eisa_attach_args *ea = aux; 203 struct ahb_softc *sc = (void *)self; 204 bus_space_tag_t iot = ea->ea_iot; 205 bus_space_handle_t ioh; 206 eisa_chipset_tag_t ec = ea->ea_ec; 207 eisa_intr_handle_t ih; 208 const char *model, *intrstr; 209 struct ahb_probe_data apd; 210 struct scsipi_adapter *adapt = &sc->sc_adapter; 211 struct scsipi_channel *chan = &sc->sc_channel; 212 213 if (!strcmp(ea->ea_idstring, "ADP0000")) 214 model = EISA_PRODUCT_ADP0000; 215 else if (!strcmp(ea->ea_idstring, "ADP0001")) 216 model = EISA_PRODUCT_ADP0001; 217 else if (!strcmp(ea->ea_idstring, "ADP0002")) 218 model = EISA_PRODUCT_ADP0002; 219 else if (!strcmp(ea->ea_idstring, "ADP0400")) 220 model = EISA_PRODUCT_ADP0400; 221 else 222 model = "unknown model!"; 223 printf(": %s\n", model); 224 225 if (bus_space_map(iot, 226 EISA_SLOT_ADDR(ea->ea_slot) + AHB_EISA_SLOT_OFFSET, AHB_EISA_IOSIZE, 227 0, &ioh)) 228 panic("ahbattach: could not map I/O addresses"); 229 230 sc->sc_iot = iot; 231 sc->sc_ioh = ioh; 232 sc->sc_dmat = ea->ea_dmat; 233 if (ahb_find(iot, ioh, &apd)) 234 panic("ahbattach: ahb_find failed!"); 235 236 TAILQ_INIT(&sc->sc_free_ecb); 237 238 /* 239 * Fill in the scsipi_adapter. 240 */ 241 memset(adapt, 0, sizeof(*adapt)); 242 adapt->adapt_dev = &sc->sc_dev; 243 adapt->adapt_nchannels = 1; 244 /* adapt_openings initialized below */ 245 adapt->adapt_max_periph = 4; /* XXX arbitrary? */ 246 adapt->adapt_request = ahb_scsipi_request; 247 adapt->adapt_minphys = ahbminphys; 248 249 /* 250 * Fill in the scsipi_channel. 251 */ 252 memset(chan, 0, sizeof(*chan)); 253 chan->chan_adapter = adapt; 254 chan->chan_bustype = &scsi_bustype; 255 chan->chan_channel = 0; 256 chan->chan_ntargets = 8; 257 chan->chan_nluns = 8; 258 chan->chan_id = apd.sc_scsi_dev; 259 260 if (ahb_init(sc) != 0) { 261 /* Error during initialization! */ 262 return; 263 } 264 265 if (eisa_intr_map(ec, apd.sc_irq, &ih)) { 266 printf("%s: couldn't map interrupt (%d)\n", 267 sc->sc_dev.dv_xname, apd.sc_irq); 268 return; 269 } 270 intrstr = eisa_intr_string(ec, ih); 271 sc->sc_ih = eisa_intr_establish(ec, ih, IST_LEVEL, IPL_BIO, 272 ahbintr, sc); 273 if (sc->sc_ih == NULL) { 274 printf("%s: couldn't establish interrupt", 275 sc->sc_dev.dv_xname); 276 if (intrstr != NULL) 277 printf(" at %s", intrstr); 278 printf("\n"); 279 return; 280 } 281 if (intrstr != NULL) 282 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, 283 intrstr); 284 285 /* 286 * ask the adapter what subunits are present 287 */ 288 config_found(self, &sc->sc_channel, scsiprint); 289 } 290 291 /* 292 * Function to send a command out through a mailbox 293 */ 294 void 295 ahb_send_mbox(sc, opcode, ecb) 296 struct ahb_softc *sc; 297 int opcode; 298 struct ahb_ecb *ecb; 299 { 300 bus_space_tag_t iot = sc->sc_iot; 301 bus_space_handle_t ioh = sc->sc_ioh; 302 int wait = 300; /* 1ms should be enough */ 303 304 while (--wait) { 305 if ((bus_space_read_1(iot, ioh, G2STAT) & (G2STAT_BUSY | G2STAT_MBOX_EMPTY)) 306 == (G2STAT_MBOX_EMPTY)) 307 break; 308 delay(10); 309 } 310 if (!wait) { 311 printf("%s: board not responding\n", sc->sc_dev.dv_xname); 312 Debugger(); 313 } 314 315 /* 316 * don't know if this will work. 317 * XXX WHAT DOES THIS COMMENT MEAN?! --thorpej 318 */ 319 bus_space_write_4(iot, ioh, MBOXOUT0, 320 sc->sc_dmamap_ecb->dm_segs[0].ds_addr + AHB_ECB_OFF(ecb)); 321 bus_space_write_1(iot, ioh, ATTN, opcode | 322 ecb->xs->xs_periph->periph_target); 323 324 if ((ecb->xs->xs_control & XS_CTL_POLL) == 0) 325 callout_reset(&ecb->xs->xs_callout, 326 (ecb->timeout * hz) / 1000, ahb_timeout, ecb); 327 } 328 329 /* 330 * Function to send an immediate type command to the adapter 331 */ 332 void 333 ahb_send_immed(sc, cmd, ecb) 334 struct ahb_softc *sc; 335 u_int32_t cmd; 336 struct ahb_ecb *ecb; 337 { 338 bus_space_tag_t iot = sc->sc_iot; 339 bus_space_handle_t ioh = sc->sc_ioh; 340 int wait = 100; /* 1 ms enough? */ 341 342 while (--wait) { 343 if ((bus_space_read_1(iot, ioh, G2STAT) & (G2STAT_BUSY | G2STAT_MBOX_EMPTY)) 344 == (G2STAT_MBOX_EMPTY)) 345 break; 346 delay(10); 347 } 348 if (!wait) { 349 printf("%s: board not responding\n", sc->sc_dev.dv_xname); 350 Debugger(); 351 } 352 353 bus_space_write_4(iot, ioh, MBOXOUT0, cmd); /* don't know this will work */ 354 bus_space_write_1(iot, ioh, G2CNTRL, G2CNTRL_SET_HOST_READY); 355 bus_space_write_1(iot, ioh, ATTN, OP_IMMED | 356 ecb->xs->xs_periph->periph_target); 357 358 if ((ecb->xs->xs_control & XS_CTL_POLL) == 0) 359 callout_reset(&ecb->xs->xs_callout, 360 (ecb->timeout * hz) / 1000, ahb_timeout, ecb); 361 } 362 363 /* 364 * Catch an interrupt from the adaptor 365 */ 366 int 367 ahbintr(arg) 368 void *arg; 369 { 370 struct ahb_softc *sc = arg; 371 bus_space_tag_t iot = sc->sc_iot; 372 bus_space_handle_t ioh = sc->sc_ioh; 373 struct ahb_ecb *ecb; 374 u_char ahbstat; 375 u_int32_t mboxval; 376 377 #ifdef AHBDEBUG 378 printf("%s: ahbintr ", sc->sc_dev.dv_xname); 379 #endif /* AHBDEBUG */ 380 381 if ((bus_space_read_1(iot, ioh, G2STAT) & G2STAT_INT_PEND) == 0) 382 return 0; 383 384 for (;;) { 385 /* 386 * First get all the information and then 387 * acknowlege the interrupt 388 */ 389 ahbstat = bus_space_read_1(iot, ioh, G2INTST); 390 mboxval = bus_space_read_4(iot, ioh, MBOXIN0); 391 bus_space_write_1(iot, ioh, G2CNTRL, G2CNTRL_CLEAR_EISA_INT); 392 393 #ifdef AHBDEBUG 394 printf("status = 0x%x ", ahbstat); 395 #endif /* AHBDEBUG */ 396 397 /* 398 * Process the completed operation 399 */ 400 switch (ahbstat & G2INTST_INT_STAT) { 401 case AHB_ECB_OK: 402 case AHB_ECB_RECOVERED: 403 case AHB_ECB_ERR: 404 ecb = ahb_ecb_phys_kv(sc, mboxval); 405 if (!ecb) { 406 printf("%s: BAD ECB RETURNED!\n", 407 sc->sc_dev.dv_xname); 408 goto next; /* whatever it was, it'll timeout */ 409 } 410 break; 411 412 case AHB_IMMED_ERR: 413 ecb = sc->sc_immed_ecb; 414 sc->sc_immed_ecb = 0; 415 ecb->flags |= ECB_IMMED_FAIL; 416 break; 417 418 case AHB_IMMED_OK: 419 ecb = sc->sc_immed_ecb; 420 sc->sc_immed_ecb = 0; 421 break; 422 423 default: 424 printf("%s: unexpected interrupt %x\n", 425 sc->sc_dev.dv_xname, ahbstat); 426 goto next; 427 } 428 429 callout_stop(&ecb->xs->xs_callout); 430 ahb_done(sc, ecb); 431 432 next: 433 if ((bus_space_read_1(iot, ioh, G2STAT) & G2STAT_INT_PEND) == 0) 434 return 1; 435 } 436 } 437 438 integrate void 439 ahb_reset_ecb(sc, ecb) 440 struct ahb_softc *sc; 441 struct ahb_ecb *ecb; 442 { 443 444 ecb->flags = 0; 445 } 446 447 /* 448 * A ecb (and hence a mbx-out is put onto the 449 * free list. 450 */ 451 void 452 ahb_free_ecb(sc, ecb) 453 struct ahb_softc *sc; 454 struct ahb_ecb *ecb; 455 { 456 int s; 457 458 s = splbio(); 459 ahb_reset_ecb(sc, ecb); 460 TAILQ_INSERT_HEAD(&sc->sc_free_ecb, ecb, chain); 461 splx(s); 462 } 463 464 /* 465 * Create a set of ecbs and add them to the free list. 466 */ 467 integrate int 468 ahb_init_ecb(sc, ecb) 469 struct ahb_softc *sc; 470 struct ahb_ecb *ecb; 471 { 472 bus_dma_tag_t dmat = sc->sc_dmat; 473 int hashnum, error; 474 475 /* 476 * Create the DMA map for this ECB. 477 */ 478 error = bus_dmamap_create(dmat, AHB_MAXXFER, AHB_NSEG, AHB_MAXXFER, 479 0, BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW, &ecb->dmamap_xfer); 480 if (error) { 481 printf("%s: can't create ecb dmamap_xfer\n", 482 sc->sc_dev.dv_xname); 483 return (error); 484 } 485 486 /* 487 * put in the phystokv hash table 488 * Never gets taken out. 489 */ 490 ecb->hashkey = sc->sc_dmamap_ecb->dm_segs[0].ds_addr + 491 AHB_ECB_OFF(ecb); 492 hashnum = ECB_HASH(ecb->hashkey); 493 ecb->nexthash = sc->sc_ecbhash[hashnum]; 494 sc->sc_ecbhash[hashnum] = ecb; 495 ahb_reset_ecb(sc, ecb); 496 return (0); 497 } 498 499 int 500 ahb_create_ecbs(sc, ecbstore, count) 501 struct ahb_softc *sc; 502 struct ahb_ecb *ecbstore; 503 int count; 504 { 505 struct ahb_ecb *ecb; 506 int i, error; 507 508 bzero(ecbstore, sizeof(struct ahb_ecb) * count); 509 for (i = 0; i < count; i++) { 510 ecb = &ecbstore[i]; 511 if ((error = ahb_init_ecb(sc, ecb)) != 0) { 512 printf("%s: unable to initialize ecb, error = %d\n", 513 sc->sc_dev.dv_xname, error); 514 goto out; 515 } 516 TAILQ_INSERT_TAIL(&sc->sc_free_ecb, ecb, chain); 517 } 518 out: 519 return (i); 520 } 521 522 /* 523 * Get a free ecb 524 * 525 * If there are none, see if we can allocate a new one. If so, put it in the 526 * hash table too otherwise either return an error or sleep. 527 */ 528 struct ahb_ecb * 529 ahb_get_ecb(sc) 530 struct ahb_softc *sc; 531 { 532 struct ahb_ecb *ecb; 533 int s; 534 535 s = splbio(); 536 ecb = TAILQ_FIRST(&sc->sc_free_ecb); 537 if (ecb != NULL) { 538 TAILQ_REMOVE(&sc->sc_free_ecb, ecb, chain); 539 ecb->flags |= ECB_ALLOC; 540 } 541 splx(s); 542 return (ecb); 543 } 544 545 /* 546 * given a physical address, find the ecb that it corresponds to. 547 */ 548 struct ahb_ecb * 549 ahb_ecb_phys_kv(sc, ecb_phys) 550 struct ahb_softc *sc; 551 physaddr ecb_phys; 552 { 553 int hashnum = ECB_HASH(ecb_phys); 554 struct ahb_ecb *ecb = sc->sc_ecbhash[hashnum]; 555 556 while (ecb) { 557 if (ecb->hashkey == ecb_phys) 558 break; 559 ecb = ecb->nexthash; 560 } 561 return ecb; 562 } 563 564 /* 565 * We have a ecb which has been processed by the adaptor, now we look to see 566 * how the operation went. 567 */ 568 void 569 ahb_done(sc, ecb) 570 struct ahb_softc *sc; 571 struct ahb_ecb *ecb; 572 { 573 bus_dma_tag_t dmat = sc->sc_dmat; 574 struct scsipi_sense_data *s1, *s2; 575 struct scsipi_xfer *xs = ecb->xs; 576 577 SC_DEBUG(xs->xs_periph, SCSIPI_DB2, ("ahb_done\n")); 578 579 bus_dmamap_sync(dmat, sc->sc_dmamap_ecb, 580 AHB_ECB_OFF(ecb), sizeof(struct ahb_ecb), 581 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 582 583 /* 584 * If we were a data transfer, unload the map that described 585 * the data buffer. 586 */ 587 if (xs->datalen) { 588 bus_dmamap_sync(dmat, ecb->dmamap_xfer, 0, 589 ecb->dmamap_xfer->dm_mapsize, 590 (xs->xs_control & XS_CTL_DATA_IN) ? BUS_DMASYNC_POSTREAD : 591 BUS_DMASYNC_POSTWRITE); 592 bus_dmamap_unload(dmat, ecb->dmamap_xfer); 593 } 594 595 /* 596 * Otherwise, put the results of the operation 597 * into the xfer and call whoever started it 598 */ 599 if ((ecb->flags & ECB_ALLOC) == 0) { 600 printf("%s: exiting ecb not allocated!\n", sc->sc_dev.dv_xname); 601 Debugger(); 602 } 603 if (ecb->flags & ECB_IMMED) { 604 if (ecb->flags & ECB_IMMED_FAIL) 605 xs->error = XS_DRIVER_STUFFUP; 606 goto done; 607 } 608 if (xs->error == XS_NOERROR) { 609 if (ecb->ecb_status.host_stat != HS_OK) { 610 switch (ecb->ecb_status.host_stat) { 611 case HS_TIMED_OUT: /* No response */ 612 xs->error = XS_SELTIMEOUT; 613 break; 614 default: /* Other scsi protocol messes */ 615 printf("%s: host_stat %x\n", 616 sc->sc_dev.dv_xname, ecb->ecb_status.host_stat); 617 xs->error = XS_DRIVER_STUFFUP; 618 } 619 } else if (ecb->ecb_status.target_stat != SCSI_OK) { 620 switch (ecb->ecb_status.target_stat) { 621 case SCSI_CHECK: 622 s1 = &ecb->ecb_sense; 623 s2 = &xs->sense.scsi_sense; 624 *s2 = *s1; 625 xs->error = XS_SENSE; 626 break; 627 case SCSI_BUSY: 628 xs->error = XS_BUSY; 629 break; 630 default: 631 printf("%s: target_stat %x\n", 632 sc->sc_dev.dv_xname, ecb->ecb_status.target_stat); 633 xs->error = XS_DRIVER_STUFFUP; 634 } 635 } else 636 xs->resid = 0; 637 } 638 done: 639 ahb_free_ecb(sc, ecb); 640 scsipi_done(xs); 641 } 642 643 /* 644 * Start the board, ready for normal operation 645 */ 646 int 647 ahb_find(iot, ioh, sc) 648 bus_space_tag_t iot; 649 bus_space_handle_t ioh; 650 struct ahb_probe_data *sc; 651 { 652 u_char intdef; 653 int i, irq, busid; 654 int wait = 1000; /* 1 sec enough? */ 655 656 bus_space_write_1(iot, ioh, PORTADDR, PORTADDR_ENHANCED); 657 658 #define NO_NO 1 659 #ifdef NO_NO 660 /* 661 * reset board, If it doesn't respond, assume 662 * that it's not there.. good for the probe 663 */ 664 bus_space_write_1(iot, ioh, G2CNTRL, G2CNTRL_HARD_RESET); 665 delay(1000); 666 bus_space_write_1(iot, ioh, G2CNTRL, 0); 667 delay(10000); 668 while (--wait) { 669 if ((bus_space_read_1(iot, ioh, G2STAT) & G2STAT_BUSY) == 0) 670 break; 671 delay(1000); 672 } 673 if (!wait) { 674 #ifdef AHBDEBUG 675 printf("ahb_find: No answer from aha1742 board\n"); 676 #endif /* AHBDEBUG */ 677 return ENXIO; 678 } 679 i = bus_space_read_1(iot, ioh, MBOXIN0); 680 if (i) { 681 printf("self test failed, val = 0x%x\n", i); 682 return EIO; 683 } 684 685 /* Set it again, just to be sure. */ 686 bus_space_write_1(iot, ioh, PORTADDR, PORTADDR_ENHANCED); 687 #endif 688 689 while (bus_space_read_1(iot, ioh, G2STAT) & G2STAT_INT_PEND) { 690 printf("."); 691 bus_space_write_1(iot, ioh, G2CNTRL, G2CNTRL_CLEAR_EISA_INT); 692 delay(10000); 693 } 694 695 intdef = bus_space_read_1(iot, ioh, INTDEF); 696 switch (intdef & 0x07) { 697 case INT9: 698 irq = 9; 699 break; 700 case INT10: 701 irq = 10; 702 break; 703 case INT11: 704 irq = 11; 705 break; 706 case INT12: 707 irq = 12; 708 break; 709 case INT14: 710 irq = 14; 711 break; 712 case INT15: 713 irq = 15; 714 break; 715 default: 716 printf("illegal int setting %x\n", intdef); 717 return EIO; 718 } 719 720 bus_space_write_1(iot, ioh, INTDEF, (intdef | INTEN)); /* make sure we can interrupt */ 721 722 /* who are we on the scsi bus? */ 723 busid = (bus_space_read_1(iot, ioh, SCSIDEF) & HSCSIID); 724 725 /* if we want to return data, do so now */ 726 if (sc) { 727 sc->sc_irq = irq; 728 sc->sc_scsi_dev = busid; 729 } 730 731 /* 732 * Note that we are going and return (to probe) 733 */ 734 return 0; 735 } 736 737 int 738 ahb_init(sc) 739 struct ahb_softc *sc; 740 { 741 bus_dma_segment_t seg; 742 int i, error, rseg; 743 744 #define ECBSIZE (AHB_ECB_MAX * sizeof(struct ahb_ecb)) 745 746 /* 747 * Allocate the ECBs. 748 */ 749 if ((error = bus_dmamem_alloc(sc->sc_dmat, ECBSIZE, 750 PAGE_SIZE, 0, &seg, 1, &rseg, BUS_DMA_NOWAIT)) != 0) { 751 printf("%s: unable to allocate ecbs, error = %d\n", 752 sc->sc_dev.dv_xname, error); 753 return (error); 754 } 755 if ((error = bus_dmamem_map(sc->sc_dmat, &seg, rseg, 756 ECBSIZE, (caddr_t *)&sc->sc_ecbs, 757 BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) { 758 printf("%s: unable to map ecbs, error = %d\n", 759 sc->sc_dev.dv_xname, error); 760 return (error); 761 } 762 763 /* 764 * Create and load the DMA map used for the ecbs. 765 */ 766 if ((error = bus_dmamap_create(sc->sc_dmat, ECBSIZE, 767 1, ECBSIZE, 0, BUS_DMA_NOWAIT, &sc->sc_dmamap_ecb)) != 0) { 768 printf("%s: unable to create ecb DMA map, error = %d\n", 769 sc->sc_dev.dv_xname, error); 770 return (error); 771 } 772 if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_dmamap_ecb, 773 sc->sc_ecbs, ECBSIZE, NULL, BUS_DMA_NOWAIT)) != 0) { 774 printf("%s: unable to load ecb DMA map, error = %d\n", 775 sc->sc_dev.dv_xname, error); 776 return (error); 777 } 778 779 #undef ECBSIZE 780 781 /* 782 * Initialize the ecbs. 783 */ 784 i = ahb_create_ecbs(sc, sc->sc_ecbs, AHB_ECB_MAX); 785 if (i == 0) { 786 printf("%s: unable to create ecbs\n", 787 sc->sc_dev.dv_xname); 788 return (ENOMEM); 789 } else if (i != AHB_ECB_MAX) { 790 printf("%s: WARNING: only %d of %d ecbs created\n", 791 sc->sc_dev.dv_xname, i, AHB_ECB_MAX); 792 } 793 794 sc->sc_adapter.adapt_openings = i; 795 796 return (0); 797 } 798 799 void 800 ahbminphys(bp) 801 struct buf *bp; 802 { 803 804 if (bp->b_bcount > AHB_MAXXFER) 805 bp->b_bcount = AHB_MAXXFER; 806 minphys(bp); 807 } 808 809 /* 810 * start a scsi operation given the command and the data address. Also needs 811 * the unit, target and lu. 812 */ 813 void 814 ahb_scsipi_request(chan, req, arg) 815 struct scsipi_channel *chan; 816 scsipi_adapter_req_t req; 817 void *arg; 818 { 819 struct scsipi_xfer *xs; 820 struct scsipi_periph *periph; 821 struct ahb_softc *sc = (void *)chan->chan_adapter->adapt_dev; 822 bus_dma_tag_t dmat = sc->sc_dmat; 823 struct ahb_ecb *ecb; 824 int error, seg, flags, s; 825 826 switch (req) { 827 case ADAPTER_REQ_RUN_XFER: 828 xs = arg; 829 periph = xs->xs_periph; 830 flags = xs->xs_control; 831 832 SC_DEBUG(periph, SCSIPI_DB2, ("ahb_scsipi_request\n")); 833 834 /* Get an ECB to use. */ 835 ecb = ahb_get_ecb(sc); 836 #ifdef DIAGNOSTIC 837 /* 838 * This should never happen as we track the resources 839 * in the mid-layer. 840 */ 841 if (ecb == NULL) { 842 scsipi_printaddr(periph); 843 printf("unable to allocate ecb\n"); 844 panic("ahb_scsipi_request"); 845 } 846 #endif 847 848 ecb->xs = xs; 849 ecb->timeout = xs->timeout; 850 851 /* 852 * If it's a reset, we need to do an 'immediate' 853 * command, and store its ecb for later 854 * if there is already an immediate waiting, 855 * then WE must wait 856 */ 857 if (flags & XS_CTL_RESET) { 858 ecb->flags |= ECB_IMMED; 859 if (sc->sc_immed_ecb) { 860 ahb_free_ecb(sc, ecb); 861 xs->error = XS_BUSY; 862 scsipi_done(xs); 863 return; 864 } 865 sc->sc_immed_ecb = ecb; 866 867 s = splbio(); 868 ahb_send_immed(sc, AHB_TARG_RESET, ecb); 869 splx(s); 870 871 if ((flags & XS_CTL_POLL) == 0) 872 return; 873 874 /* 875 * If we can't use interrupts, poll on completion 876 */ 877 if (ahb_poll(sc, xs, ecb->timeout)) 878 ahb_timeout(ecb); 879 return; 880 } 881 882 /* 883 * Put all the arguments for the xfer in the ecb 884 */ 885 ecb->opcode = ECB_SCSI_OP; 886 ecb->opt1 = ECB_SES /*| ECB_DSB*/ | ECB_ARS; 887 ecb->opt2 = periph->periph_lun | ECB_NRB; 888 bcopy(xs->cmd, &ecb->scsi_cmd, 889 ecb->scsi_cmd_length = xs->cmdlen); 890 ecb->sense_ptr = sc->sc_dmamap_ecb->dm_segs[0].ds_addr + 891 AHB_ECB_OFF(ecb) + offsetof(struct ahb_ecb, ecb_sense); 892 ecb->req_sense_length = sizeof(ecb->ecb_sense); 893 ecb->status = sc->sc_dmamap_ecb->dm_segs[0].ds_addr + 894 AHB_ECB_OFF(ecb) + offsetof(struct ahb_ecb, ecb_status); 895 ecb->ecb_status.host_stat = 0x00; 896 ecb->ecb_status.target_stat = 0x00; 897 898 if (xs->datalen) { 899 /* 900 * Map the DMA transfer. 901 */ 902 #ifdef TFS 903 if (flags & XS_CTL_DATA_UIO) { 904 error = bus_dmamap_load_uio(sc->sc_dmat, 905 ecb->dmamap_xfer, (struct uio *)xs->data, 906 BUS_DMA_NOWAIT); 907 } else 908 #endif /* TFS */ 909 { 910 error = bus_dmamap_load(sc->sc_dmat, 911 ecb->dmamap_xfer, xs->data, xs->datalen, 912 NULL, BUS_DMA_NOWAIT); 913 } 914 915 switch (error) { 916 case 0: 917 break; 918 919 case ENOMEM: 920 case EAGAIN: 921 xs->error = XS_RESOURCE_SHORTAGE; 922 goto out_bad; 923 924 default: 925 xs->error = XS_DRIVER_STUFFUP; 926 printf("%s: error %d loading DMA map\n", 927 sc->sc_dev.dv_xname, error); 928 out_bad: 929 ahb_free_ecb(sc, ecb); 930 scsipi_done(xs); 931 return; 932 } 933 934 bus_dmamap_sync(dmat, ecb->dmamap_xfer, 0, 935 ecb->dmamap_xfer->dm_mapsize, 936 (flags & XS_CTL_DATA_IN) ? BUS_DMASYNC_PREREAD : 937 BUS_DMASYNC_PREWRITE); 938 939 /* 940 * Load the hardware scatter/gather map with the 941 * contents of the DMA map. 942 */ 943 for (seg = 0; seg < ecb->dmamap_xfer->dm_nsegs; seg++) { 944 ecb->ahb_dma[seg].seg_addr = 945 ecb->dmamap_xfer->dm_segs[seg].ds_addr; 946 ecb->ahb_dma[seg].seg_len = 947 ecb->dmamap_xfer->dm_segs[seg].ds_len; 948 } 949 950 ecb->data_addr = sc->sc_dmamap_ecb->dm_segs[0].ds_addr + 951 AHB_ECB_OFF(ecb) + 952 offsetof(struct ahb_ecb, ahb_dma); 953 ecb->data_length = ecb->dmamap_xfer->dm_nsegs * 954 sizeof(struct ahb_dma_seg); 955 ecb->opt1 |= ECB_S_G; 956 } else { /* No data xfer, use non S/G values */ 957 ecb->data_addr = (physaddr)0; 958 ecb->data_length = 0; 959 } 960 ecb->link_addr = (physaddr)0; 961 962 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap_ecb, 963 AHB_ECB_OFF(ecb), sizeof(struct ahb_ecb), 964 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 965 966 s = splbio(); 967 ahb_send_mbox(sc, OP_START_ECB, ecb); 968 splx(s); 969 970 if ((flags & XS_CTL_POLL) == 0) 971 return; 972 973 /* 974 * If we can't use interrupts, poll on completion 975 */ 976 if (ahb_poll(sc, xs, ecb->timeout)) { 977 ahb_timeout(ecb); 978 if (ahb_poll(sc, xs, ecb->timeout)) 979 ahb_timeout(ecb); 980 } 981 return; 982 983 case ADAPTER_REQ_GROW_RESOURCES: 984 /* XXX Not supported. */ 985 return; 986 987 case ADAPTER_REQ_SET_XFER_MODE: 988 /* XXX How do we do this? */ 989 return; 990 } 991 } 992 993 /* 994 * Function to poll for command completion when in poll mode 995 */ 996 int 997 ahb_poll(sc, xs, count) 998 struct ahb_softc *sc; 999 struct scsipi_xfer *xs; 1000 int count; 1001 { /* in msec */ 1002 bus_space_tag_t iot = sc->sc_iot; 1003 bus_space_handle_t ioh = sc->sc_ioh; 1004 1005 while (count) { 1006 /* 1007 * If we had interrupts enabled, would we 1008 * have got an interrupt? 1009 */ 1010 if (bus_space_read_1(iot, ioh, G2STAT) & G2STAT_INT_PEND) 1011 ahbintr(sc); 1012 if (xs->xs_status & XS_STS_DONE) 1013 return 0; 1014 delay(1000); 1015 count--; 1016 } 1017 return 1; 1018 } 1019 1020 void 1021 ahb_timeout(arg) 1022 void *arg; 1023 { 1024 struct ahb_ecb *ecb = arg; 1025 struct scsipi_xfer *xs = ecb->xs; 1026 struct scsipi_periph *periph = xs->xs_periph; 1027 struct ahb_softc *sc = 1028 (void *)periph->periph_channel->chan_adapter->adapt_dev; 1029 int s; 1030 1031 scsipi_printaddr(periph); 1032 printf("timed out"); 1033 1034 s = splbio(); 1035 1036 if (ecb->flags & ECB_IMMED) { 1037 printf("\n"); 1038 ecb->flags |= ECB_IMMED_FAIL; 1039 /* XXX Must reset! */ 1040 } else 1041 1042 /* 1043 * If it has been through before, then 1044 * a previous abort has failed, don't 1045 * try abort again 1046 */ 1047 if (ecb->flags & ECB_ABORT) { 1048 /* abort timed out */ 1049 printf(" AGAIN\n"); 1050 /* XXX Must reset! */ 1051 } else { 1052 /* abort the operation that has timed out */ 1053 printf("\n"); 1054 ecb->xs->error = XS_TIMEOUT; 1055 ecb->timeout = AHB_ABORT_TIMEOUT; 1056 ecb->flags |= ECB_ABORT; 1057 ahb_send_mbox(sc, OP_ABORT_ECB, ecb); 1058 } 1059 1060 splx(s); 1061 } 1062
Indexes created Mon Sep 29 21:09:56 GMT 2025