mlx_eisa.c revision 1.3.2.7
1 1.3.2.7 nathanw /* $NetBSD: mlx_eisa.c,v 1.3.2.7 2002/10/18 02:41:38 nathanw Exp $ */ 2 1.3.2.2 nathanw 3 1.3.2.2 nathanw /*- 4 1.3.2.2 nathanw * Copyright (c) 2001 The NetBSD Foundation, Inc. 5 1.3.2.2 nathanw * All rights reserved. 6 1.3.2.2 nathanw * 7 1.3.2.2 nathanw * This code is derived from software contributed to The NetBSD Foundation 8 1.3.2.2 nathanw * by Andrew Doran. 9 1.3.2.2 nathanw * 10 1.3.2.2 nathanw * Redistribution and use in source and binary forms, with or without 11 1.3.2.2 nathanw * modification, are permitted provided that the following conditions 12 1.3.2.2 nathanw * are met: 13 1.3.2.2 nathanw * 1. Redistributions of source code must retain the above copyright 14 1.3.2.2 nathanw * notice, this list of conditions and the following disclaimer. 15 1.3.2.2 nathanw * 2. Redistributions in binary form must reproduce the above copyright 16 1.3.2.2 nathanw * notice, this list of conditions and the following disclaimer in the 17 1.3.2.2 nathanw * documentation and/or other materials provided with the distribution. 18 1.3.2.2 nathanw * 3. All advertising materials mentioning features or use of this software 19 1.3.2.2 nathanw * must display the following acknowledgement: 20 1.3.2.2 nathanw * This product includes software developed by the NetBSD 21 1.3.2.2 nathanw * Foundation, Inc. and its contributors. 22 1.3.2.2 nathanw * 4. Neither the name of The NetBSD Foundation nor the names of its 23 1.3.2.2 nathanw * contributors may be used to endorse or promote products derived 24 1.3.2.2 nathanw * from this software without specific prior written permission. 25 1.3.2.2 nathanw * 26 1.3.2.2 nathanw * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 1.3.2.2 nathanw * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 1.3.2.2 nathanw * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 1.3.2.2 nathanw * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 1.3.2.2 nathanw * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 1.3.2.2 nathanw * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 1.3.2.2 nathanw * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 1.3.2.2 nathanw * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 1.3.2.2 nathanw * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 1.3.2.2 nathanw * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 1.3.2.2 nathanw * POSSIBILITY OF SUCH DAMAGE. 37 1.3.2.2 nathanw */ 38 1.3.2.2 nathanw 39 1.3.2.2 nathanw /* 40 1.3.2.2 nathanw * EISA front-end for mlx(4) driver. 41 1.3.2.2 nathanw */ 42 1.3.2.2 nathanw 43 1.3.2.3 nathanw #include <sys/cdefs.h> 44 1.3.2.7 nathanw __KERNEL_RCSID(0, "$NetBSD: mlx_eisa.c,v 1.3.2.7 2002/10/18 02:41:38 nathanw Exp $"); 45 1.3.2.3 nathanw 46 1.3.2.2 nathanw #include <sys/param.h> 47 1.3.2.2 nathanw #include <sys/systm.h> 48 1.3.2.2 nathanw #include <sys/device.h> 49 1.3.2.2 nathanw 50 1.3.2.2 nathanw #include <machine/bus.h> 51 1.3.2.2 nathanw #include <machine/intr.h> 52 1.3.2.2 nathanw 53 1.3.2.2 nathanw #include <dev/eisa/eisavar.h> 54 1.3.2.2 nathanw #include <dev/eisa/eisadevs.h> 55 1.3.2.2 nathanw 56 1.3.2.2 nathanw #include <dev/ic/mlxreg.h> 57 1.3.2.2 nathanw #include <dev/ic/mlxio.h> 58 1.3.2.2 nathanw #include <dev/ic/mlxvar.h> 59 1.3.2.2 nathanw 60 1.3.2.4 nathanw #define MLX_EISA_SLOT_OFFSET 0x0c80 61 1.3.2.2 nathanw #define MLX_EISA_IOSIZE (0x0ce0 - MLX_EISA_SLOT_OFFSET) 62 1.3.2.2 nathanw #define MLX_EISA_IOCONF1 (0x0cc1 - MLX_EISA_SLOT_OFFSET) 63 1.3.2.2 nathanw #define MLX_EISA_IOCONF2 (0x0cc3 - MLX_EISA_SLOT_OFFSET) 64 1.3.2.2 nathanw 65 1.3.2.2 nathanw static void mlx_eisa_attach(struct device *, struct device *, void *); 66 1.3.2.2 nathanw static int mlx_eisa_match(struct device *, struct cfdata *, void *); 67 1.3.2.2 nathanw 68 1.3.2.2 nathanw static int mlx_v1_submit(struct mlx_softc *, struct mlx_ccb *); 69 1.3.2.2 nathanw static int mlx_v1_findcomplete(struct mlx_softc *, u_int *, u_int *); 70 1.3.2.2 nathanw static void mlx_v1_intaction(struct mlx_softc *, int); 71 1.3.2.2 nathanw static int mlx_v1_fw_handshake(struct mlx_softc *, int *, int *, int *); 72 1.3.2.2 nathanw #ifdef MLX_RESET 73 1.3.2.2 nathanw static int mlx_v1_reset(struct mlx_softc *); 74 1.3.2.2 nathanw #endif 75 1.3.2.2 nathanw 76 1.3.2.7 nathanw CFATTACH_DECL(mlx_eisa, sizeof(struct mlx_softc), 77 1.3.2.7 nathanw mlx_eisa_match, mlx_eisa_attach, NULL, NULL); 78 1.3.2.2 nathanw 79 1.3.2.5 nathanw struct mlx_eisa_prod { 80 1.3.2.5 nathanw const char *mp_idstr; 81 1.3.2.5 nathanw int mp_nchan; 82 1.3.2.5 nathanw } static const mlx_eisa_prod[] = { 83 1.3.2.5 nathanw { "MLX0070", 1 }, 84 1.3.2.5 nathanw { "MLX0071", 3 }, 85 1.3.2.5 nathanw { "MLX0072", 3 }, 86 1.3.2.5 nathanw { "MLX0073", 2 }, 87 1.3.2.5 nathanw { "MLX0074", 1 }, 88 1.3.2.5 nathanw { "MLX0075", 3 }, 89 1.3.2.5 nathanw { "MLX0076", 2 }, 90 1.3.2.5 nathanw { "MLX0077", 1 }, 91 1.3.2.2 nathanw }; 92 1.3.2.2 nathanw 93 1.3.2.2 nathanw static int 94 1.3.2.2 nathanw mlx_eisa_match(struct device *parent, struct cfdata *match, void *aux) 95 1.3.2.2 nathanw { 96 1.3.2.2 nathanw struct eisa_attach_args *ea; 97 1.3.2.2 nathanw int i; 98 1.3.2.2 nathanw 99 1.3.2.2 nathanw ea = aux; 100 1.3.2.2 nathanw 101 1.3.2.2 nathanw for (i = 0; i < sizeof(mlx_eisa_prod) / sizeof(mlx_eisa_prod[0]); i++) 102 1.3.2.5 nathanw if (strcmp(ea->ea_idstring, mlx_eisa_prod[i].mp_idstr) == 0) 103 1.3.2.2 nathanw return (1); 104 1.3.2.2 nathanw 105 1.3.2.2 nathanw return (0); 106 1.3.2.2 nathanw } 107 1.3.2.2 nathanw 108 1.3.2.2 nathanw static void 109 1.3.2.2 nathanw mlx_eisa_attach(struct device *parent, struct device *self, void *aux) 110 1.3.2.2 nathanw { 111 1.3.2.2 nathanw struct eisa_attach_args *ea; 112 1.3.2.2 nathanw bus_space_handle_t ioh; 113 1.3.2.2 nathanw eisa_chipset_tag_t ec; 114 1.3.2.2 nathanw eisa_intr_handle_t ih; 115 1.3.2.2 nathanw struct mlx_softc *mlx; 116 1.3.2.2 nathanw bus_space_tag_t iot; 117 1.3.2.2 nathanw const char *intrstr; 118 1.3.2.5 nathanw int irq, le, i; 119 1.3.2.2 nathanw 120 1.3.2.2 nathanw ea = aux; 121 1.3.2.2 nathanw mlx = (struct mlx_softc *)self; 122 1.3.2.2 nathanw iot = ea->ea_iot; 123 1.3.2.2 nathanw ec = ea->ea_ec; 124 1.3.2.2 nathanw 125 1.3.2.2 nathanw if (bus_space_map(iot, EISA_SLOT_ADDR(ea->ea_slot) + 126 1.3.2.2 nathanw MLX_EISA_SLOT_OFFSET, MLX_EISA_IOSIZE, 0, &ioh)) { 127 1.3.2.2 nathanw printf("can't map i/o space\n"); 128 1.3.2.2 nathanw return; 129 1.3.2.2 nathanw } 130 1.3.2.2 nathanw 131 1.3.2.2 nathanw mlx->mlx_iot = iot; 132 1.3.2.2 nathanw mlx->mlx_ioh = ioh; 133 1.3.2.2 nathanw mlx->mlx_dmat = ea->ea_dmat; 134 1.3.2.2 nathanw 135 1.3.2.2 nathanw /* 136 1.3.2.2 nathanw * Map and establish the interrupt. 137 1.3.2.2 nathanw */ 138 1.3.2.2 nathanw switch (bus_space_read_1(iot, ioh, MLX_EISA_IOCONF1) & 0xf0) { 139 1.3.2.2 nathanw case 0xa0: 140 1.3.2.2 nathanw irq = 11; 141 1.3.2.2 nathanw break; 142 1.3.2.2 nathanw case 0xc0: 143 1.3.2.2 nathanw irq = 12; 144 1.3.2.2 nathanw break; 145 1.3.2.2 nathanw case 0xe0: 146 1.3.2.2 nathanw irq = 14; 147 1.3.2.2 nathanw break; 148 1.3.2.2 nathanw case 0x80: 149 1.3.2.2 nathanw irq = 15; 150 1.3.2.2 nathanw break; 151 1.3.2.2 nathanw default: 152 1.3.2.2 nathanw printf("controller on invalid IRQ\n"); 153 1.3.2.2 nathanw return; 154 1.3.2.2 nathanw } 155 1.3.2.2 nathanw 156 1.3.2.2 nathanw if (eisa_intr_map(ec, irq, &ih)) { 157 1.3.2.2 nathanw printf("can't map interrupt (%d)\n", irq); 158 1.3.2.2 nathanw return; 159 1.3.2.2 nathanw } 160 1.3.2.2 nathanw 161 1.3.2.2 nathanw if ((bus_space_read_1(iot, ioh, MLX_EISA_IOCONF1) & 0x08) != 0) 162 1.3.2.2 nathanw le = IST_LEVEL; 163 1.3.2.2 nathanw else 164 1.3.2.2 nathanw le = IST_EDGE; 165 1.3.2.2 nathanw 166 1.3.2.2 nathanw intrstr = eisa_intr_string(ec, ih); 167 1.3.2.2 nathanw mlx->mlx_ih = eisa_intr_establish(ec, ih, le, IPL_BIO, mlx_intr, mlx); 168 1.3.2.2 nathanw if (mlx->mlx_ih == NULL) { 169 1.3.2.2 nathanw printf("can't establish interrupt"); 170 1.3.2.2 nathanw if (intrstr != NULL) 171 1.3.2.2 nathanw printf(" at %s", intrstr); 172 1.3.2.2 nathanw printf("\n"); 173 1.3.2.2 nathanw return; 174 1.3.2.2 nathanw } 175 1.3.2.2 nathanw 176 1.3.2.5 nathanw for (i = 0; i < sizeof(mlx_eisa_prod) / sizeof(mlx_eisa_prod[0]); i++) 177 1.3.2.5 nathanw if (strcmp(ea->ea_idstring, mlx_eisa_prod[i].mp_idstr) == 0) { 178 1.3.2.5 nathanw mlx->mlx_ci.ci_nchan = mlx_eisa_prod[i].mp_nchan; 179 1.3.2.5 nathanw break; 180 1.3.2.5 nathanw } 181 1.3.2.5 nathanw mlx->mlx_ci.ci_iftype = 1; 182 1.3.2.2 nathanw 183 1.3.2.2 nathanw mlx->mlx_submit = mlx_v1_submit; 184 1.3.2.2 nathanw mlx->mlx_findcomplete = mlx_v1_findcomplete; 185 1.3.2.2 nathanw mlx->mlx_intaction = mlx_v1_intaction; 186 1.3.2.2 nathanw mlx->mlx_fw_handshake = mlx_v1_fw_handshake; 187 1.3.2.2 nathanw #ifdef MLX_RESET 188 1.3.2.2 nathanw mlx->mlx_reset = mlx_v1_reset; 189 1.3.2.2 nathanw #endif 190 1.3.2.2 nathanw 191 1.3.2.2 nathanw printf(": Mylex RAID\n"); 192 1.3.2.2 nathanw mlx_init(mlx, intrstr); 193 1.3.2.2 nathanw } 194 1.3.2.2 nathanw 195 1.3.2.2 nathanw /* 196 1.3.2.2 nathanw * ================= V1 interface linkage ================= 197 1.3.2.2 nathanw */ 198 1.3.2.2 nathanw 199 1.3.2.2 nathanw /* 200 1.3.2.2 nathanw * Try to give (mc) to the controller. Returns 1 if successful, 0 on 201 1.3.2.2 nathanw * failure (the controller is not ready to take a command). 202 1.3.2.2 nathanw * 203 1.3.2.2 nathanw * Must be called at splbio or in a fashion that prevents reentry. 204 1.3.2.2 nathanw */ 205 1.3.2.2 nathanw static int 206 1.3.2.2 nathanw mlx_v1_submit(struct mlx_softc *mlx, struct mlx_ccb *mc) 207 1.3.2.2 nathanw { 208 1.3.2.2 nathanw 209 1.3.2.2 nathanw /* Ready for our command? */ 210 1.3.2.2 nathanw if ((mlx_inb(mlx, MLX_V1REG_IDB) & MLX_V1_IDB_FULL) == 0) { 211 1.3.2.2 nathanw /* Copy mailbox data to window. */ 212 1.3.2.2 nathanw bus_space_write_region_1(mlx->mlx_iot, mlx->mlx_ioh, 213 1.3.2.6 nathanw MLX_V1REG_MAILBOX, mc->mc_mbox, 13); 214 1.3.2.2 nathanw bus_space_barrier(mlx->mlx_iot, mlx->mlx_ioh, 215 1.3.2.6 nathanw MLX_V1REG_MAILBOX, 13, 216 1.3.2.2 nathanw BUS_SPACE_BARRIER_WRITE); 217 1.3.2.2 nathanw 218 1.3.2.2 nathanw /* Post command. */ 219 1.3.2.5 nathanw mlx_outb(mlx, MLX_V1REG_IDB, MLX_V1_IDB_FULL); 220 1.3.2.2 nathanw return (1); 221 1.3.2.2 nathanw } 222 1.3.2.2 nathanw 223 1.3.2.2 nathanw return (0); 224 1.3.2.2 nathanw } 225 1.3.2.2 nathanw 226 1.3.2.2 nathanw /* 227 1.3.2.2 nathanw * See if a command has been completed, if so acknowledge its completion and 228 1.3.2.2 nathanw * recover the slot number and status code. 229 1.3.2.2 nathanw * 230 1.3.2.2 nathanw * Must be called at splbio or in a fashion that prevents reentry. 231 1.3.2.2 nathanw */ 232 1.3.2.2 nathanw static int 233 1.3.2.2 nathanw mlx_v1_findcomplete(struct mlx_softc *mlx, u_int *slot, u_int *status) 234 1.3.2.2 nathanw { 235 1.3.2.2 nathanw 236 1.3.2.2 nathanw /* Status available? */ 237 1.3.2.5 nathanw if ((mlx_inb(mlx, MLX_V1REG_ODB) & MLX_V1_ODB_SAVAIL) != 0) { 238 1.3.2.2 nathanw *slot = mlx_inb(mlx, MLX_V1REG_MAILBOX + 0x0d); 239 1.3.2.2 nathanw *status = mlx_inw(mlx, MLX_V1REG_MAILBOX + 0x0e); 240 1.3.2.2 nathanw 241 1.3.2.2 nathanw /* Acknowledge completion. */ 242 1.3.2.2 nathanw mlx_outb(mlx, MLX_V1REG_ODB, MLX_V1_ODB_SAVAIL); 243 1.3.2.2 nathanw mlx_outb(mlx, MLX_V1REG_IDB, MLX_V1_IDB_SACK); 244 1.3.2.2 nathanw return (1); 245 1.3.2.2 nathanw } 246 1.3.2.2 nathanw 247 1.3.2.2 nathanw return (0); 248 1.3.2.2 nathanw } 249 1.3.2.2 nathanw 250 1.3.2.2 nathanw /* 251 1.3.2.2 nathanw * Enable/disable interrupts as requested. (No acknowledge required) 252 1.3.2.2 nathanw * 253 1.3.2.2 nathanw * Must be called at splbio or in a fashion that prevents reentry. 254 1.3.2.2 nathanw */ 255 1.3.2.2 nathanw static void 256 1.3.2.2 nathanw mlx_v1_intaction(struct mlx_softc *mlx, int action) 257 1.3.2.2 nathanw { 258 1.3.2.2 nathanw 259 1.3.2.2 nathanw mlx_outb(mlx, MLX_V1REG_IE, action ? 1 : 0); 260 1.3.2.2 nathanw } 261 1.3.2.2 nathanw 262 1.3.2.2 nathanw /* 263 1.3.2.2 nathanw * Poll for firmware error codes during controller initialisation. 264 1.3.2.2 nathanw * 265 1.3.2.2 nathanw * Returns 0 if initialisation is complete, 1 if still in progress but no 266 1.3.2.2 nathanw * error has been fetched, 2 if an error has been retrieved. 267 1.3.2.2 nathanw */ 268 1.3.2.2 nathanw static int 269 1.3.2.2 nathanw mlx_v1_fw_handshake(struct mlx_softc *mlx, int *error, int *param1, int *param2) 270 1.3.2.2 nathanw { 271 1.3.2.2 nathanw u_int8_t fwerror; 272 1.3.2.2 nathanw 273 1.3.2.2 nathanw /* 274 1.3.2.2 nathanw * First time around, enable the IDB interrupt and clear any 275 1.3.2.2 nathanw * hardware completion status. 276 1.3.2.2 nathanw */ 277 1.3.2.2 nathanw if ((mlx->mlx_flags & MLXF_FW_INITTED) == 0) { 278 1.3.2.2 nathanw mlx_outb(mlx, MLX_V1REG_ODB_EN, 1); 279 1.3.2.2 nathanw DELAY(1000); 280 1.3.2.4 nathanw mlx_outb(mlx, MLX_V1REG_ODB, 1); 281 1.3.2.4 nathanw DELAY(1000); 282 1.3.2.2 nathanw mlx_outb(mlx, MLX_V1REG_IDB, MLX_V1_IDB_SACK); 283 1.3.2.2 nathanw DELAY(1000); 284 1.3.2.2 nathanw mlx->mlx_flags |= MLXF_FW_INITTED; 285 1.3.2.2 nathanw } 286 1.3.2.2 nathanw 287 1.3.2.2 nathanw /* Init in progress? */ 288 1.3.2.2 nathanw if ((mlx_inb(mlx, MLX_V1REG_IDB) & MLX_V1_IDB_INIT_BUSY) == 0) 289 1.3.2.2 nathanw return (0); 290 1.3.2.2 nathanw 291 1.3.2.2 nathanw /* Test error value. */ 292 1.3.2.2 nathanw fwerror = mlx_inb(mlx, MLX_V1REG_ODB); 293 1.3.2.2 nathanw 294 1.3.2.2 nathanw if ((fwerror & MLX_V1_FWERROR_PEND) == 0) 295 1.3.2.2 nathanw return (1); 296 1.3.2.2 nathanw 297 1.3.2.2 nathanw /* XXX Fetch status. */ 298 1.3.2.2 nathanw *error = fwerror & 0xf0; 299 1.3.2.2 nathanw *param1 = -1; 300 1.3.2.2 nathanw *param2 = -1; 301 1.3.2.2 nathanw 302 1.3.2.2 nathanw /* Acknowledge. */ 303 1.3.2.2 nathanw mlx_outb(mlx, MLX_V1REG_ODB, fwerror); 304 1.3.2.2 nathanw 305 1.3.2.2 nathanw return (2); 306 1.3.2.2 nathanw } 307 1.3.2.2 nathanw 308 1.3.2.2 nathanw #ifdef MLX_RESET 309 1.3.2.2 nathanw /* 310 1.3.2.2 nathanw * Reset the controller. Return non-zero on failure. 311 1.3.2.2 nathanw */ 312 1.3.2.2 nathanw static int 313 1.3.2.2 nathanw mlx_v1_reset(struct mlx_softc *mlx) 314 1.3.2.2 nathanw { 315 1.3.2.2 nathanw int i; 316 1.3.2.2 nathanw 317 1.3.2.2 nathanw mlx_outb(mlx, MLX_V1REG_IDB, MLX_V1_IDB_SACK); 318 1.3.2.2 nathanw delay(1000000); 319 1.3.2.2 nathanw 320 1.3.2.2 nathanw /* Wait up to 2 minutes for the bit to clear. */ 321 1.3.2.2 nathanw for (i = 120; i != 0; i--) { 322 1.3.2.2 nathanw delay(1000000); 323 1.3.2.2 nathanw if ((mlx_inb(mlx, MLX_V1REG_IDB) & MLX_V1_IDB_SACK) == 0) 324 1.3.2.2 nathanw break; 325 1.3.2.2 nathanw } 326 1.3.2.2 nathanw if (i == 0) 327 1.3.2.2 nathanw return (-1); 328 1.3.2.2 nathanw 329 1.3.2.2 nathanw mlx_outb(mlx, MLX_V1REG_ODB, MLX_V1_ODB_RESET); 330 1.3.2.2 nathanw mlx_outb(mlx, MLX_V1REG_IDB, MLX_V1_IDB_RESET); 331 1.3.2.2 nathanw 332 1.3.2.2 nathanw /* Wait up to 5 seconds for the bit to clear... */ 333 1.3.2.2 nathanw for (i = 5; i != 0; i--) { 334 1.3.2.2 nathanw delay(1000000); 335 1.3.2.2 nathanw if ((mlx_inb(mlx, MLX_V1REG_IDB) & MLX_V1_IDB_RESET) == 0) 336 1.3.2.2 nathanw break; 337 1.3.2.2 nathanw } 338 1.3.2.2 nathanw if (i == 0) 339 1.3.2.2 nathanw return (-1); 340 1.3.2.2 nathanw 341 1.3.2.2 nathanw /* Wait up to 3 seconds for the other bit to clear... */ 342 1.3.2.2 nathanw for (i = 5; i != 0; i--) { 343 1.3.2.2 nathanw delay(1000000); 344 1.3.2.2 nathanw if ((mlx_inb(mlx, MLX_V1REG_ODB) & MLX_V1_ODB_RESET) == 0) 345 1.3.2.2 nathanw break; 346 1.3.2.2 nathanw } 347 1.3.2.2 nathanw if (i == 0) 348 1.3.2.2 nathanw return (-1); 349 1.3.2.2 nathanw 350 1.3.2.2 nathanw return (0); 351 1.3.2.2 nathanw } 352 1.3.2.2 nathanw #endif /* MLX_RESET */ 353
Indexes created Mon Oct 20 11:09:49 GMT 2025