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mlx_eisa.c revision 1.3.4.1
      1  1.3.4.1  thorpej /*	$NetBSD: mlx_eisa.c,v 1.3.4.1 2002/01/10 19:53:53 thorpej Exp $	*/
      2      1.1       ad 
      3      1.1       ad /*-
      4      1.1       ad  * Copyright (c) 2001 The NetBSD Foundation, Inc.
      5      1.1       ad  * All rights reserved.
      6      1.1       ad  *
      7      1.1       ad  * This code is derived from software contributed to The NetBSD Foundation
      8      1.1       ad  * by Andrew Doran.
      9      1.1       ad  *
     10      1.1       ad  * Redistribution and use in source and binary forms, with or without
     11      1.1       ad  * modification, are permitted provided that the following conditions
     12      1.1       ad  * are met:
     13      1.1       ad  * 1. Redistributions of source code must retain the above copyright
     14      1.1       ad  *    notice, this list of conditions and the following disclaimer.
     15      1.1       ad  * 2. Redistributions in binary form must reproduce the above copyright
     16      1.1       ad  *    notice, this list of conditions and the following disclaimer in the
     17      1.1       ad  *    documentation and/or other materials provided with the distribution.
     18      1.1       ad  * 3. All advertising materials mentioning features or use of this software
     19      1.1       ad  *    must display the following acknowledgement:
     20      1.1       ad  *        This product includes software developed by the NetBSD
     21      1.1       ad  *        Foundation, Inc. and its contributors.
     22      1.1       ad  * 4. Neither the name of The NetBSD Foundation nor the names of its
     23      1.1       ad  *    contributors may be used to endorse or promote products derived
     24      1.1       ad  *    from this software without specific prior written permission.
     25      1.1       ad  *
     26      1.1       ad  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     27      1.1       ad  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     28      1.1       ad  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     29      1.1       ad  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     30      1.1       ad  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     31      1.1       ad  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     32      1.1       ad  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     33      1.1       ad  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     34      1.1       ad  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     35      1.1       ad  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     36      1.1       ad  * POSSIBILITY OF SUCH DAMAGE.
     37      1.1       ad  */
     38      1.1       ad 
     39      1.1       ad /*
     40      1.1       ad  * EISA front-end for mlx(4) driver.
     41      1.1       ad  */
     42      1.1       ad 
     43  1.3.4.1  thorpej #include <sys/cdefs.h>
     44  1.3.4.1  thorpej __KERNEL_RCSID(0, "$NetBSD: mlx_eisa.c,v 1.3.4.1 2002/01/10 19:53:53 thorpej Exp $");
     45  1.3.4.1  thorpej 
     46      1.1       ad #include <sys/param.h>
     47      1.1       ad #include <sys/systm.h>
     48      1.1       ad #include <sys/device.h>
     49      1.1       ad 
     50      1.1       ad #include <machine/bus.h>
     51      1.1       ad #include <machine/intr.h>
     52      1.1       ad 
     53      1.1       ad #include <dev/eisa/eisavar.h>
     54      1.1       ad #include <dev/eisa/eisadevs.h>
     55      1.1       ad 
     56      1.1       ad #include <dev/ic/mlxreg.h>
     57      1.1       ad #include <dev/ic/mlxio.h>
     58      1.1       ad #include <dev/ic/mlxvar.h>
     59      1.1       ad 
     60  1.3.4.1  thorpej #define MLX_EISA_SLOT_OFFSET		0x0c80
     61      1.1       ad #define MLX_EISA_IOSIZE			(0x0ce0 - MLX_EISA_SLOT_OFFSET)
     62      1.2       ad #define MLX_EISA_IOCONF1		(0x0cc1 - MLX_EISA_SLOT_OFFSET)
     63      1.2       ad #define MLX_EISA_IOCONF2		(0x0cc3 - MLX_EISA_SLOT_OFFSET)
     64      1.1       ad 
     65      1.1       ad static void	mlx_eisa_attach(struct device *, struct device *, void *);
     66      1.1       ad static int	mlx_eisa_match(struct device *, struct cfdata *, void *);
     67      1.1       ad 
     68      1.1       ad static int	mlx_v1_submit(struct mlx_softc *, struct mlx_ccb *);
     69      1.1       ad static int	mlx_v1_findcomplete(struct mlx_softc *, u_int *, u_int *);
     70      1.1       ad static void	mlx_v1_intaction(struct mlx_softc *, int);
     71      1.1       ad static int	mlx_v1_fw_handshake(struct mlx_softc *, int *, int *, int *);
     72      1.1       ad #ifdef MLX_RESET
     73      1.1       ad static int	mlx_v1_reset(struct mlx_softc *);
     74      1.1       ad #endif
     75      1.1       ad 
     76      1.1       ad struct cfattach mlx_eisa_ca = {
     77      1.1       ad 	sizeof(struct mlx_softc), mlx_eisa_match, mlx_eisa_attach
     78      1.1       ad };
     79      1.1       ad 
     80      1.1       ad static const char * const mlx_eisa_prod[] = {
     81      1.1       ad 	"MLX0070",
     82      1.1       ad 	"MLX0071",
     83      1.1       ad 	"MLX0072",
     84      1.1       ad 	"MLX0073",
     85      1.1       ad 	"MLX0074",
     86      1.1       ad 	"MLX0075",
     87      1.1       ad 	"MLX0076",
     88      1.1       ad 	"MLX0077",
     89      1.1       ad };
     90      1.1       ad 
     91      1.1       ad static int
     92      1.1       ad mlx_eisa_match(struct device *parent, struct cfdata *match, void *aux)
     93      1.1       ad {
     94      1.1       ad 	struct eisa_attach_args *ea;
     95      1.1       ad 	int i;
     96      1.1       ad 
     97      1.1       ad 	ea = aux;
     98      1.1       ad 
     99      1.1       ad 	for (i = 0; i < sizeof(mlx_eisa_prod) / sizeof(mlx_eisa_prod[0]); i++)
    100      1.1       ad 		if (strcmp(ea->ea_idstring, mlx_eisa_prod[i]) == 0)
    101      1.1       ad 			return (1);
    102      1.1       ad 
    103      1.1       ad 	return (0);
    104      1.1       ad }
    105      1.1       ad 
    106      1.1       ad static void
    107      1.1       ad mlx_eisa_attach(struct device *parent, struct device *self, void *aux)
    108      1.1       ad {
    109      1.1       ad 	struct eisa_attach_args *ea;
    110      1.1       ad 	bus_space_handle_t ioh;
    111      1.1       ad 	eisa_chipset_tag_t ec;
    112      1.1       ad 	eisa_intr_handle_t ih;
    113      1.1       ad 	struct mlx_softc *mlx;
    114      1.1       ad 	bus_space_tag_t iot;
    115      1.1       ad 	const char *intrstr;
    116      1.1       ad 	int irq, le;
    117      1.1       ad 
    118      1.1       ad 	ea = aux;
    119      1.1       ad 	mlx = (struct mlx_softc *)self;
    120      1.1       ad 	iot = ea->ea_iot;
    121      1.1       ad 	ec = ea->ea_ec;
    122      1.1       ad 
    123      1.1       ad 	if (bus_space_map(iot, EISA_SLOT_ADDR(ea->ea_slot) +
    124      1.1       ad 	    MLX_EISA_SLOT_OFFSET, MLX_EISA_IOSIZE, 0, &ioh)) {
    125      1.1       ad 		printf("can't map i/o space\n");
    126      1.1       ad 		return;
    127      1.1       ad 	}
    128      1.1       ad 
    129      1.1       ad 	mlx->mlx_iot = iot;
    130      1.1       ad 	mlx->mlx_ioh = ioh;
    131      1.1       ad 	mlx->mlx_dmat = ea->ea_dmat;
    132      1.1       ad 
    133      1.1       ad 	/*
    134      1.1       ad 	 * Map and establish the interrupt.
    135      1.1       ad 	 */
    136      1.1       ad 	switch (bus_space_read_1(iot, ioh, MLX_EISA_IOCONF1) & 0xf0) {
    137      1.1       ad 	case 0xa0:
    138      1.1       ad 		irq = 11;
    139      1.1       ad 		break;
    140      1.1       ad 	case 0xc0:
    141      1.1       ad 		irq = 12;
    142      1.1       ad 		break;
    143      1.1       ad 	case 0xe0:
    144      1.1       ad 		irq = 14;
    145      1.1       ad 		break;
    146      1.1       ad 	case 0x80:
    147      1.1       ad 		irq = 15;
    148      1.1       ad 		break;
    149      1.1       ad 	default:
    150      1.1       ad 		printf("controller on invalid IRQ\n");
    151      1.1       ad 		return;
    152      1.1       ad 	}
    153      1.1       ad 
    154      1.1       ad 	if (eisa_intr_map(ec, irq, &ih)) {
    155      1.1       ad 		printf("can't map interrupt (%d)\n", irq);
    156      1.1       ad 		return;
    157      1.1       ad 	}
    158      1.1       ad 
    159      1.1       ad 	if ((bus_space_read_1(iot, ioh, MLX_EISA_IOCONF1) & 0x08) != 0)
    160      1.1       ad 		le = IST_LEVEL;
    161      1.1       ad 	else
    162      1.1       ad 		le = IST_EDGE;
    163      1.1       ad 
    164      1.1       ad 	intrstr = eisa_intr_string(ec, ih);
    165      1.1       ad 	mlx->mlx_ih = eisa_intr_establish(ec, ih, le, IPL_BIO, mlx_intr, mlx);
    166      1.1       ad 	if (mlx->mlx_ih == NULL) {
    167      1.1       ad 		printf("can't establish interrupt");
    168      1.1       ad 		if (intrstr != NULL)
    169      1.1       ad 			printf(" at %s", intrstr);
    170      1.1       ad 		printf("\n");
    171      1.1       ad 		return;
    172      1.1       ad 	}
    173      1.1       ad 
    174      1.1       ad 	mlx->mlx_flags = MLXF_EISA;
    175      1.1       ad 
    176      1.1       ad 	mlx->mlx_submit = mlx_v1_submit;
    177      1.1       ad 	mlx->mlx_findcomplete = mlx_v1_findcomplete;
    178      1.1       ad 	mlx->mlx_intaction = mlx_v1_intaction;
    179      1.1       ad 	mlx->mlx_fw_handshake = mlx_v1_fw_handshake;
    180      1.1       ad #ifdef MLX_RESET
    181      1.1       ad 	mlx->mlx_reset = mlx_v1_reset;
    182      1.1       ad #endif
    183      1.1       ad 
    184      1.3       ad 	printf(": Mylex RAID\n");
    185      1.1       ad 	mlx_init(mlx, intrstr);
    186      1.1       ad }
    187      1.1       ad 
    188      1.1       ad /*
    189      1.1       ad  * ================= V1 interface linkage =================
    190      1.1       ad  */
    191      1.1       ad 
    192      1.1       ad /*
    193      1.1       ad  * Try to give (mc) to the controller.  Returns 1 if successful, 0 on
    194      1.1       ad  * failure (the controller is not ready to take a command).
    195      1.1       ad  *
    196      1.1       ad  * Must be called at splbio or in a fashion that prevents reentry.
    197      1.1       ad  */
    198      1.1       ad static int
    199      1.1       ad mlx_v1_submit(struct mlx_softc *mlx, struct mlx_ccb *mc)
    200      1.1       ad {
    201      1.1       ad 
    202      1.1       ad 	/* Ready for our command? */
    203      1.1       ad 	if ((mlx_inb(mlx, MLX_V1REG_IDB) & MLX_V1_IDB_FULL) == 0) {
    204      1.1       ad 		/* Copy mailbox data to window. */
    205      1.1       ad 		bus_space_write_region_1(mlx->mlx_iot, mlx->mlx_ioh,
    206      1.1       ad 		    MLX_V1REG_MAILBOX, mc->mc_mbox, MLX_V1_MAILBOX_LEN);
    207      1.1       ad 		bus_space_barrier(mlx->mlx_iot, mlx->mlx_ioh,
    208      1.1       ad 		    MLX_V1REG_MAILBOX, MLX_V1_MAILBOX_LEN,
    209      1.1       ad 		    BUS_SPACE_BARRIER_WRITE);
    210      1.1       ad 
    211      1.1       ad 		/* Post command. */
    212      1.1       ad 		mlx_outb(mlx, MLX_V1REG_IDB, MLX_V3_IDB_FULL);
    213      1.1       ad 		return (1);
    214      1.1       ad 	}
    215      1.1       ad 
    216      1.1       ad 	return (0);
    217      1.1       ad }
    218      1.1       ad 
    219      1.1       ad /*
    220      1.1       ad  * See if a command has been completed, if so acknowledge its completion and
    221      1.1       ad  * recover the slot number and status code.
    222      1.1       ad  *
    223      1.1       ad  * Must be called at splbio or in a fashion that prevents reentry.
    224      1.1       ad  */
    225      1.1       ad static int
    226      1.1       ad mlx_v1_findcomplete(struct mlx_softc *mlx, u_int *slot, u_int *status)
    227      1.1       ad {
    228      1.1       ad 
    229      1.1       ad 	/* Status available? */
    230      1.1       ad 	if ((mlx_inb(mlx, MLX_V3REG_ODB) & MLX_V3_ODB_SAVAIL) != 0) {
    231      1.1       ad 		*slot = mlx_inb(mlx, MLX_V1REG_MAILBOX + 0x0d);
    232      1.1       ad 		*status = mlx_inw(mlx, MLX_V1REG_MAILBOX + 0x0e);
    233      1.1       ad 
    234      1.1       ad 		/* Acknowledge completion. */
    235      1.1       ad 		mlx_outb(mlx, MLX_V1REG_ODB, MLX_V1_ODB_SAVAIL);
    236      1.1       ad 		mlx_outb(mlx, MLX_V1REG_IDB, MLX_V1_IDB_SACK);
    237      1.1       ad 		return (1);
    238      1.1       ad 	}
    239      1.1       ad 
    240      1.1       ad 	return (0);
    241      1.1       ad }
    242      1.1       ad 
    243      1.1       ad /*
    244      1.1       ad  * Enable/disable interrupts as requested. (No acknowledge required)
    245      1.1       ad  *
    246      1.1       ad  * Must be called at splbio or in a fashion that prevents reentry.
    247      1.1       ad  */
    248      1.1       ad static void
    249      1.1       ad mlx_v1_intaction(struct mlx_softc *mlx, int action)
    250      1.1       ad {
    251      1.1       ad 
    252      1.1       ad 	mlx_outb(mlx, MLX_V1REG_IE, action ? 1 : 0);
    253      1.1       ad }
    254      1.1       ad 
    255      1.1       ad /*
    256      1.1       ad  * Poll for firmware error codes during controller initialisation.
    257      1.1       ad  *
    258      1.1       ad  * Returns 0 if initialisation is complete, 1 if still in progress but no
    259      1.1       ad  * error has been fetched, 2 if an error has been retrieved.
    260      1.1       ad  */
    261      1.1       ad static int
    262      1.1       ad mlx_v1_fw_handshake(struct mlx_softc *mlx, int *error, int *param1, int *param2)
    263      1.1       ad {
    264      1.1       ad 	u_int8_t fwerror;
    265      1.1       ad 
    266      1.1       ad 	/*
    267      1.1       ad 	 * First time around, enable the IDB interrupt and clear any
    268      1.1       ad 	 * hardware completion status.
    269      1.1       ad 	 */
    270      1.1       ad 	if ((mlx->mlx_flags & MLXF_FW_INITTED) == 0) {
    271      1.1       ad 		mlx_outb(mlx, MLX_V1REG_ODB_EN, 1);
    272  1.3.4.1  thorpej 		DELAY(1000);
    273  1.3.4.1  thorpej 		mlx_outb(mlx, MLX_V1REG_ODB, 1);
    274      1.1       ad 		DELAY(1000);
    275      1.1       ad 		mlx_outb(mlx, MLX_V1REG_IDB, MLX_V1_IDB_SACK);
    276      1.1       ad 		DELAY(1000);
    277      1.1       ad 		mlx->mlx_flags |= MLXF_FW_INITTED;
    278      1.1       ad 	}
    279      1.1       ad 
    280      1.1       ad 	/* Init in progress? */
    281      1.1       ad 	if ((mlx_inb(mlx, MLX_V1REG_IDB) & MLX_V1_IDB_INIT_BUSY) == 0)
    282      1.1       ad 		return (0);
    283      1.1       ad 
    284      1.1       ad 	/* Test error value. */
    285      1.1       ad 	fwerror = mlx_inb(mlx, MLX_V1REG_ODB);
    286      1.1       ad 
    287      1.1       ad 	if ((fwerror & MLX_V1_FWERROR_PEND) == 0)
    288      1.1       ad 		return (1);
    289      1.1       ad 
    290      1.1       ad 	/* XXX Fetch status. */
    291      1.1       ad 	*error = fwerror & 0xf0;
    292      1.1       ad 	*param1 = -1;
    293      1.1       ad 	*param2 = -1;
    294      1.1       ad 
    295      1.1       ad 	/* Acknowledge. */
    296      1.1       ad 	mlx_outb(mlx, MLX_V1REG_ODB, fwerror);
    297      1.1       ad 
    298      1.1       ad 	return (2);
    299      1.1       ad }
    300      1.1       ad 
    301      1.1       ad #ifdef MLX_RESET
    302      1.1       ad /*
    303      1.1       ad  * Reset the controller.  Return non-zero on failure.
    304      1.1       ad  */
    305      1.1       ad static int
    306      1.1       ad mlx_v1_reset(struct mlx_softc *mlx)
    307      1.1       ad {
    308      1.1       ad 	int i;
    309      1.1       ad 
    310      1.1       ad 	mlx_outb(mlx, MLX_V1REG_IDB, MLX_V1_IDB_SACK);
    311      1.1       ad 	delay(1000000);
    312      1.1       ad 
    313      1.1       ad 	/* Wait up to 2 minutes for the bit to clear. */
    314      1.1       ad 	for (i = 120; i != 0; i--) {
    315      1.1       ad 		delay(1000000);
    316      1.1       ad 		if ((mlx_inb(mlx, MLX_V1REG_IDB) & MLX_V1_IDB_SACK) == 0)
    317      1.1       ad 			break;
    318      1.1       ad 	}
    319      1.1       ad 	if (i == 0)
    320      1.1       ad 		return (-1);
    321      1.1       ad 
    322      1.1       ad 	mlx_outb(mlx, MLX_V1REG_ODB, MLX_V1_ODB_RESET);
    323      1.1       ad 	mlx_outb(mlx, MLX_V1REG_IDB, MLX_V1_IDB_RESET);
    324      1.1       ad 
    325      1.1       ad 	/* Wait up to 5 seconds for the bit to clear... */
    326      1.1       ad 	for (i = 5; i != 0; i--) {
    327      1.1       ad 		delay(1000000);
    328      1.1       ad 		if ((mlx_inb(mlx, MLX_V1REG_IDB) & MLX_V1_IDB_RESET) == 0)
    329      1.1       ad 			break;
    330      1.1       ad 	}
    331      1.1       ad 	if (i == 0)
    332      1.1       ad 		return (-1);
    333      1.1       ad 
    334      1.1       ad 	/* Wait up to 3 seconds for the other bit to clear... */
    335      1.1       ad 	for (i = 5; i != 0; i--) {
    336      1.1       ad 		delay(1000000);
    337      1.1       ad 		if ((mlx_inb(mlx, MLX_V1REG_ODB) & MLX_V1_ODB_RESET) == 0)
    338      1.1       ad 			break;
    339      1.1       ad 	}
    340      1.1       ad 	if (i == 0)
    341      1.1       ad 		return (-1);
    342      1.1       ad 
    343      1.1       ad 	return (0);
    344      1.1       ad }
    345      1.1       ad #endif	/* MLX_RESET */
    346