mlx_eisa.c revision 1.3
1 /* $NetBSD: mlx_eisa.c,v 1.3 2001/05/10 09:41:19 ad Exp $ */ 2 3 /*- 4 * Copyright (c) 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Andrew Doran. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * EISA front-end for mlx(4) driver. 41 */ 42 43 #include <sys/types.h> 44 #include <sys/param.h> 45 #include <sys/systm.h> 46 #include <sys/device.h> 47 48 #include <machine/bus.h> 49 #include <machine/intr.h> 50 51 #include <dev/eisa/eisavar.h> 52 #include <dev/eisa/eisadevs.h> 53 54 #include <dev/ic/mlxreg.h> 55 #include <dev/ic/mlxio.h> 56 #include <dev/ic/mlxvar.h> 57 58 #define MLX_EISA_SLOT_OFFSET 0x0c89 59 #define MLX_EISA_IOSIZE (0x0ce0 - MLX_EISA_SLOT_OFFSET) 60 #define MLX_EISA_IOCONF1 (0x0cc1 - MLX_EISA_SLOT_OFFSET) 61 #define MLX_EISA_IOCONF2 (0x0cc3 - MLX_EISA_SLOT_OFFSET) 62 63 static void mlx_eisa_attach(struct device *, struct device *, void *); 64 static int mlx_eisa_match(struct device *, struct cfdata *, void *); 65 66 static int mlx_v1_submit(struct mlx_softc *, struct mlx_ccb *); 67 static int mlx_v1_findcomplete(struct mlx_softc *, u_int *, u_int *); 68 static void mlx_v1_intaction(struct mlx_softc *, int); 69 static int mlx_v1_fw_handshake(struct mlx_softc *, int *, int *, int *); 70 #ifdef MLX_RESET 71 static int mlx_v1_reset(struct mlx_softc *); 72 #endif 73 74 struct cfattach mlx_eisa_ca = { 75 sizeof(struct mlx_softc), mlx_eisa_match, mlx_eisa_attach 76 }; 77 78 static const char * const mlx_eisa_prod[] = { 79 "MLX0070", 80 "MLX0071", 81 "MLX0072", 82 "MLX0073", 83 "MLX0074", 84 "MLX0075", 85 "MLX0076", 86 "MLX0077", 87 }; 88 89 static int 90 mlx_eisa_match(struct device *parent, struct cfdata *match, void *aux) 91 { 92 struct eisa_attach_args *ea; 93 int i; 94 95 ea = aux; 96 97 for (i = 0; i < sizeof(mlx_eisa_prod) / sizeof(mlx_eisa_prod[0]); i++) 98 if (strcmp(ea->ea_idstring, mlx_eisa_prod[i]) == 0) 99 return (1); 100 101 return (0); 102 } 103 104 static void 105 mlx_eisa_attach(struct device *parent, struct device *self, void *aux) 106 { 107 struct eisa_attach_args *ea; 108 bus_space_handle_t ioh; 109 eisa_chipset_tag_t ec; 110 eisa_intr_handle_t ih; 111 struct mlx_softc *mlx; 112 bus_space_tag_t iot; 113 const char *intrstr; 114 int irq, le; 115 116 ea = aux; 117 mlx = (struct mlx_softc *)self; 118 iot = ea->ea_iot; 119 ec = ea->ea_ec; 120 121 if (bus_space_map(iot, EISA_SLOT_ADDR(ea->ea_slot) + 122 MLX_EISA_SLOT_OFFSET, MLX_EISA_IOSIZE, 0, &ioh)) { 123 printf("can't map i/o space\n"); 124 return; 125 } 126 127 mlx->mlx_iot = iot; 128 mlx->mlx_ioh = ioh; 129 mlx->mlx_dmat = ea->ea_dmat; 130 131 /* 132 * Map and establish the interrupt. 133 */ 134 switch (bus_space_read_1(iot, ioh, MLX_EISA_IOCONF1) & 0xf0) { 135 case 0xa0: 136 irq = 11; 137 break; 138 case 0xc0: 139 irq = 12; 140 break; 141 case 0xe0: 142 irq = 14; 143 break; 144 case 0x80: 145 irq = 15; 146 break; 147 default: 148 printf("controller on invalid IRQ\n"); 149 return; 150 } 151 152 if (eisa_intr_map(ec, irq, &ih)) { 153 printf("can't map interrupt (%d)\n", irq); 154 return; 155 } 156 157 if ((bus_space_read_1(iot, ioh, MLX_EISA_IOCONF1) & 0x08) != 0) 158 le = IST_LEVEL; 159 else 160 le = IST_EDGE; 161 162 intrstr = eisa_intr_string(ec, ih); 163 mlx->mlx_ih = eisa_intr_establish(ec, ih, le, IPL_BIO, mlx_intr, mlx); 164 if (mlx->mlx_ih == NULL) { 165 printf("can't establish interrupt"); 166 if (intrstr != NULL) 167 printf(" at %s", intrstr); 168 printf("\n"); 169 return; 170 } 171 172 mlx->mlx_flags = MLXF_EISA; 173 174 mlx->mlx_submit = mlx_v1_submit; 175 mlx->mlx_findcomplete = mlx_v1_findcomplete; 176 mlx->mlx_intaction = mlx_v1_intaction; 177 mlx->mlx_fw_handshake = mlx_v1_fw_handshake; 178 #ifdef MLX_RESET 179 mlx->mlx_reset = mlx_v1_reset; 180 #endif 181 182 printf(": Mylex RAID\n"); 183 mlx_init(mlx, intrstr); 184 } 185 186 /* 187 * ================= V1 interface linkage ================= 188 */ 189 190 /* 191 * Try to give (mc) to the controller. Returns 1 if successful, 0 on 192 * failure (the controller is not ready to take a command). 193 * 194 * Must be called at splbio or in a fashion that prevents reentry. 195 */ 196 static int 197 mlx_v1_submit(struct mlx_softc *mlx, struct mlx_ccb *mc) 198 { 199 200 /* Ready for our command? */ 201 if ((mlx_inb(mlx, MLX_V1REG_IDB) & MLX_V1_IDB_FULL) == 0) { 202 /* Copy mailbox data to window. */ 203 bus_space_write_region_1(mlx->mlx_iot, mlx->mlx_ioh, 204 MLX_V1REG_MAILBOX, mc->mc_mbox, MLX_V1_MAILBOX_LEN); 205 bus_space_barrier(mlx->mlx_iot, mlx->mlx_ioh, 206 MLX_V1REG_MAILBOX, MLX_V1_MAILBOX_LEN, 207 BUS_SPACE_BARRIER_WRITE); 208 209 /* Post command. */ 210 mlx_outb(mlx, MLX_V1REG_IDB, MLX_V3_IDB_FULL); 211 return (1); 212 } 213 214 return (0); 215 } 216 217 /* 218 * See if a command has been completed, if so acknowledge its completion and 219 * recover the slot number and status code. 220 * 221 * Must be called at splbio or in a fashion that prevents reentry. 222 */ 223 static int 224 mlx_v1_findcomplete(struct mlx_softc *mlx, u_int *slot, u_int *status) 225 { 226 227 /* Status available? */ 228 if ((mlx_inb(mlx, MLX_V3REG_ODB) & MLX_V3_ODB_SAVAIL) != 0) { 229 *slot = mlx_inb(mlx, MLX_V1REG_MAILBOX + 0x0d); 230 *status = mlx_inw(mlx, MLX_V1REG_MAILBOX + 0x0e); 231 232 /* Acknowledge completion. */ 233 mlx_outb(mlx, MLX_V1REG_ODB, MLX_V1_ODB_SAVAIL); 234 mlx_outb(mlx, MLX_V1REG_IDB, MLX_V1_IDB_SACK); 235 return (1); 236 } 237 238 return (0); 239 } 240 241 /* 242 * Enable/disable interrupts as requested. (No acknowledge required) 243 * 244 * Must be called at splbio or in a fashion that prevents reentry. 245 */ 246 static void 247 mlx_v1_intaction(struct mlx_softc *mlx, int action) 248 { 249 250 mlx_outb(mlx, MLX_V1REG_IE, action ? 1 : 0); 251 } 252 253 /* 254 * Poll for firmware error codes during controller initialisation. 255 * 256 * Returns 0 if initialisation is complete, 1 if still in progress but no 257 * error has been fetched, 2 if an error has been retrieved. 258 */ 259 static int 260 mlx_v1_fw_handshake(struct mlx_softc *mlx, int *error, int *param1, int *param2) 261 { 262 u_int8_t fwerror; 263 264 /* 265 * First time around, enable the IDB interrupt and clear any 266 * hardware completion status. 267 */ 268 if ((mlx->mlx_flags & MLXF_FW_INITTED) == 0) { 269 mlx_outb(mlx, MLX_V1REG_ODB_EN, 1); 270 DELAY(1000); 271 mlx_outb(mlx, MLX_V1REG_IDB, MLX_V1_IDB_SACK); 272 DELAY(1000); 273 mlx->mlx_flags |= MLXF_FW_INITTED; 274 } 275 276 /* Init in progress? */ 277 if ((mlx_inb(mlx, MLX_V1REG_IDB) & MLX_V1_IDB_INIT_BUSY) == 0) 278 return (0); 279 280 /* Test error value. */ 281 fwerror = mlx_inb(mlx, MLX_V1REG_ODB); 282 283 if ((fwerror & MLX_V1_FWERROR_PEND) == 0) 284 return (1); 285 286 /* XXX Fetch status. */ 287 *error = fwerror & 0xf0; 288 *param1 = -1; 289 *param2 = -1; 290 291 /* Acknowledge. */ 292 mlx_outb(mlx, MLX_V1REG_ODB, fwerror); 293 294 return (2); 295 } 296 297 #ifdef MLX_RESET 298 /* 299 * Reset the controller. Return non-zero on failure. 300 */ 301 static int 302 mlx_v1_reset(struct mlx_softc *mlx) 303 { 304 int i; 305 306 mlx_outb(mlx, MLX_V1REG_IDB, MLX_V1_IDB_SACK); 307 delay(1000000); 308 309 /* Wait up to 2 minutes for the bit to clear. */ 310 for (i = 120; i != 0; i--) { 311 delay(1000000); 312 if ((mlx_inb(mlx, MLX_V1REG_IDB) & MLX_V1_IDB_SACK) == 0) 313 break; 314 } 315 if (i == 0) 316 return (-1); 317 318 mlx_outb(mlx, MLX_V1REG_ODB, MLX_V1_ODB_RESET); 319 mlx_outb(mlx, MLX_V1REG_IDB, MLX_V1_IDB_RESET); 320 321 /* Wait up to 5 seconds for the bit to clear... */ 322 for (i = 5; i != 0; i--) { 323 delay(1000000); 324 if ((mlx_inb(mlx, MLX_V1REG_IDB) & MLX_V1_IDB_RESET) == 0) 325 break; 326 } 327 if (i == 0) 328 return (-1); 329 330 /* Wait up to 3 seconds for the other bit to clear... */ 331 for (i = 5; i != 0; i--) { 332 delay(1000000); 333 if ((mlx_inb(mlx, MLX_V1REG_ODB) & MLX_V1_ODB_RESET) == 0) 334 break; 335 } 336 if (i == 0) 337 return (-1); 338 339 return (0); 340 } 341 #endif /* MLX_RESET */ 342
Indexes created Tue Sep 30 17:09:57 GMT 2025