mlx_eisa.c revision 1.3.2.3
1 /* $NetBSD: mlx_eisa.c,v 1.3.2.3 2001/11/14 19:14:05 nathanw Exp $ */ 2 3 /*- 4 * Copyright (c) 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Andrew Doran. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * EISA front-end for mlx(4) driver. 41 */ 42 43 #include <sys/cdefs.h> 44 __KERNEL_RCSID(0, "$NetBSD: mlx_eisa.c,v 1.3.2.3 2001/11/14 19:14:05 nathanw Exp $"); 45 46 #include <sys/types.h> 47 #include <sys/param.h> 48 #include <sys/systm.h> 49 #include <sys/device.h> 50 51 #include <machine/bus.h> 52 #include <machine/intr.h> 53 54 #include <dev/eisa/eisavar.h> 55 #include <dev/eisa/eisadevs.h> 56 57 #include <dev/ic/mlxreg.h> 58 #include <dev/ic/mlxio.h> 59 #include <dev/ic/mlxvar.h> 60 61 #define MLX_EISA_SLOT_OFFSET 0x0c89 62 #define MLX_EISA_IOSIZE (0x0ce0 - MLX_EISA_SLOT_OFFSET) 63 #define MLX_EISA_IOCONF1 (0x0cc1 - MLX_EISA_SLOT_OFFSET) 64 #define MLX_EISA_IOCONF2 (0x0cc3 - MLX_EISA_SLOT_OFFSET) 65 66 static void mlx_eisa_attach(struct device *, struct device *, void *); 67 static int mlx_eisa_match(struct device *, struct cfdata *, void *); 68 69 static int mlx_v1_submit(struct mlx_softc *, struct mlx_ccb *); 70 static int mlx_v1_findcomplete(struct mlx_softc *, u_int *, u_int *); 71 static void mlx_v1_intaction(struct mlx_softc *, int); 72 static int mlx_v1_fw_handshake(struct mlx_softc *, int *, int *, int *); 73 #ifdef MLX_RESET 74 static int mlx_v1_reset(struct mlx_softc *); 75 #endif 76 77 struct cfattach mlx_eisa_ca = { 78 sizeof(struct mlx_softc), mlx_eisa_match, mlx_eisa_attach 79 }; 80 81 static const char * const mlx_eisa_prod[] = { 82 "MLX0070", 83 "MLX0071", 84 "MLX0072", 85 "MLX0073", 86 "MLX0074", 87 "MLX0075", 88 "MLX0076", 89 "MLX0077", 90 }; 91 92 static int 93 mlx_eisa_match(struct device *parent, struct cfdata *match, void *aux) 94 { 95 struct eisa_attach_args *ea; 96 int i; 97 98 ea = aux; 99 100 for (i = 0; i < sizeof(mlx_eisa_prod) / sizeof(mlx_eisa_prod[0]); i++) 101 if (strcmp(ea->ea_idstring, mlx_eisa_prod[i]) == 0) 102 return (1); 103 104 return (0); 105 } 106 107 static void 108 mlx_eisa_attach(struct device *parent, struct device *self, void *aux) 109 { 110 struct eisa_attach_args *ea; 111 bus_space_handle_t ioh; 112 eisa_chipset_tag_t ec; 113 eisa_intr_handle_t ih; 114 struct mlx_softc *mlx; 115 bus_space_tag_t iot; 116 const char *intrstr; 117 int irq, le; 118 119 ea = aux; 120 mlx = (struct mlx_softc *)self; 121 iot = ea->ea_iot; 122 ec = ea->ea_ec; 123 124 if (bus_space_map(iot, EISA_SLOT_ADDR(ea->ea_slot) + 125 MLX_EISA_SLOT_OFFSET, MLX_EISA_IOSIZE, 0, &ioh)) { 126 printf("can't map i/o space\n"); 127 return; 128 } 129 130 mlx->mlx_iot = iot; 131 mlx->mlx_ioh = ioh; 132 mlx->mlx_dmat = ea->ea_dmat; 133 134 /* 135 * Map and establish the interrupt. 136 */ 137 switch (bus_space_read_1(iot, ioh, MLX_EISA_IOCONF1) & 0xf0) { 138 case 0xa0: 139 irq = 11; 140 break; 141 case 0xc0: 142 irq = 12; 143 break; 144 case 0xe0: 145 irq = 14; 146 break; 147 case 0x80: 148 irq = 15; 149 break; 150 default: 151 printf("controller on invalid IRQ\n"); 152 return; 153 } 154 155 if (eisa_intr_map(ec, irq, &ih)) { 156 printf("can't map interrupt (%d)\n", irq); 157 return; 158 } 159 160 if ((bus_space_read_1(iot, ioh, MLX_EISA_IOCONF1) & 0x08) != 0) 161 le = IST_LEVEL; 162 else 163 le = IST_EDGE; 164 165 intrstr = eisa_intr_string(ec, ih); 166 mlx->mlx_ih = eisa_intr_establish(ec, ih, le, IPL_BIO, mlx_intr, mlx); 167 if (mlx->mlx_ih == NULL) { 168 printf("can't establish interrupt"); 169 if (intrstr != NULL) 170 printf(" at %s", intrstr); 171 printf("\n"); 172 return; 173 } 174 175 mlx->mlx_flags = MLXF_EISA; 176 177 mlx->mlx_submit = mlx_v1_submit; 178 mlx->mlx_findcomplete = mlx_v1_findcomplete; 179 mlx->mlx_intaction = mlx_v1_intaction; 180 mlx->mlx_fw_handshake = mlx_v1_fw_handshake; 181 #ifdef MLX_RESET 182 mlx->mlx_reset = mlx_v1_reset; 183 #endif 184 185 printf(": Mylex RAID\n"); 186 mlx_init(mlx, intrstr); 187 } 188 189 /* 190 * ================= V1 interface linkage ================= 191 */ 192 193 /* 194 * Try to give (mc) to the controller. Returns 1 if successful, 0 on 195 * failure (the controller is not ready to take a command). 196 * 197 * Must be called at splbio or in a fashion that prevents reentry. 198 */ 199 static int 200 mlx_v1_submit(struct mlx_softc *mlx, struct mlx_ccb *mc) 201 { 202 203 /* Ready for our command? */ 204 if ((mlx_inb(mlx, MLX_V1REG_IDB) & MLX_V1_IDB_FULL) == 0) { 205 /* Copy mailbox data to window. */ 206 bus_space_write_region_1(mlx->mlx_iot, mlx->mlx_ioh, 207 MLX_V1REG_MAILBOX, mc->mc_mbox, MLX_V1_MAILBOX_LEN); 208 bus_space_barrier(mlx->mlx_iot, mlx->mlx_ioh, 209 MLX_V1REG_MAILBOX, MLX_V1_MAILBOX_LEN, 210 BUS_SPACE_BARRIER_WRITE); 211 212 /* Post command. */ 213 mlx_outb(mlx, MLX_V1REG_IDB, MLX_V3_IDB_FULL); 214 return (1); 215 } 216 217 return (0); 218 } 219 220 /* 221 * See if a command has been completed, if so acknowledge its completion and 222 * recover the slot number and status code. 223 * 224 * Must be called at splbio or in a fashion that prevents reentry. 225 */ 226 static int 227 mlx_v1_findcomplete(struct mlx_softc *mlx, u_int *slot, u_int *status) 228 { 229 230 /* Status available? */ 231 if ((mlx_inb(mlx, MLX_V3REG_ODB) & MLX_V3_ODB_SAVAIL) != 0) { 232 *slot = mlx_inb(mlx, MLX_V1REG_MAILBOX + 0x0d); 233 *status = mlx_inw(mlx, MLX_V1REG_MAILBOX + 0x0e); 234 235 /* Acknowledge completion. */ 236 mlx_outb(mlx, MLX_V1REG_ODB, MLX_V1_ODB_SAVAIL); 237 mlx_outb(mlx, MLX_V1REG_IDB, MLX_V1_IDB_SACK); 238 return (1); 239 } 240 241 return (0); 242 } 243 244 /* 245 * Enable/disable interrupts as requested. (No acknowledge required) 246 * 247 * Must be called at splbio or in a fashion that prevents reentry. 248 */ 249 static void 250 mlx_v1_intaction(struct mlx_softc *mlx, int action) 251 { 252 253 mlx_outb(mlx, MLX_V1REG_IE, action ? 1 : 0); 254 } 255 256 /* 257 * Poll for firmware error codes during controller initialisation. 258 * 259 * Returns 0 if initialisation is complete, 1 if still in progress but no 260 * error has been fetched, 2 if an error has been retrieved. 261 */ 262 static int 263 mlx_v1_fw_handshake(struct mlx_softc *mlx, int *error, int *param1, int *param2) 264 { 265 u_int8_t fwerror; 266 267 /* 268 * First time around, enable the IDB interrupt and clear any 269 * hardware completion status. 270 */ 271 if ((mlx->mlx_flags & MLXF_FW_INITTED) == 0) { 272 mlx_outb(mlx, MLX_V1REG_ODB_EN, 1); 273 DELAY(1000); 274 mlx_outb(mlx, MLX_V1REG_IDB, MLX_V1_IDB_SACK); 275 DELAY(1000); 276 mlx->mlx_flags |= MLXF_FW_INITTED; 277 } 278 279 /* Init in progress? */ 280 if ((mlx_inb(mlx, MLX_V1REG_IDB) & MLX_V1_IDB_INIT_BUSY) == 0) 281 return (0); 282 283 /* Test error value. */ 284 fwerror = mlx_inb(mlx, MLX_V1REG_ODB); 285 286 if ((fwerror & MLX_V1_FWERROR_PEND) == 0) 287 return (1); 288 289 /* XXX Fetch status. */ 290 *error = fwerror & 0xf0; 291 *param1 = -1; 292 *param2 = -1; 293 294 /* Acknowledge. */ 295 mlx_outb(mlx, MLX_V1REG_ODB, fwerror); 296 297 return (2); 298 } 299 300 #ifdef MLX_RESET 301 /* 302 * Reset the controller. Return non-zero on failure. 303 */ 304 static int 305 mlx_v1_reset(struct mlx_softc *mlx) 306 { 307 int i; 308 309 mlx_outb(mlx, MLX_V1REG_IDB, MLX_V1_IDB_SACK); 310 delay(1000000); 311 312 /* Wait up to 2 minutes for the bit to clear. */ 313 for (i = 120; i != 0; i--) { 314 delay(1000000); 315 if ((mlx_inb(mlx, MLX_V1REG_IDB) & MLX_V1_IDB_SACK) == 0) 316 break; 317 } 318 if (i == 0) 319 return (-1); 320 321 mlx_outb(mlx, MLX_V1REG_ODB, MLX_V1_ODB_RESET); 322 mlx_outb(mlx, MLX_V1REG_IDB, MLX_V1_IDB_RESET); 323 324 /* Wait up to 5 seconds for the bit to clear... */ 325 for (i = 5; i != 0; i--) { 326 delay(1000000); 327 if ((mlx_inb(mlx, MLX_V1REG_IDB) & MLX_V1_IDB_RESET) == 0) 328 break; 329 } 330 if (i == 0) 331 return (-1); 332 333 /* Wait up to 3 seconds for the other bit to clear... */ 334 for (i = 5; i != 0; i--) { 335 delay(1000000); 336 if ((mlx_inb(mlx, MLX_V1REG_ODB) & MLX_V1_ODB_RESET) == 0) 337 break; 338 } 339 if (i == 0) 340 return (-1); 341 342 return (0); 343 } 344 #endif /* MLX_RESET */ 345
Indexes created Tue Oct 14 11:09:46 GMT 2025