uha_eisa.c revision 1.2
1 /* $NetBSD: uha_eisa.c,v 1.2 1996/09/01 00:20:21 mycroft Exp $ */ 2 3 /* 4 * Copyright (c) 1994, 1996 Charles M. Hannum. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Charles M. Hannum. 17 * 4. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/types.h> 33 #include <sys/param.h> 34 #include <sys/device.h> 35 #include <sys/kernel.h> 36 #include <sys/proc.h> 37 #include <sys/user.h> 38 39 #include <machine/bus.h> 40 #include <machine/intr.h> 41 42 #include <scsi/scsi_all.h> 43 #include <scsi/scsiconf.h> 44 45 #include <dev/eisa/eisavar.h> 46 #include <dev/eisa/eisadevs.h> 47 48 #include <dev/ic/uhareg.h> 49 #include <dev/ic/uhavar.h> 50 51 #define UHA_EISA_SLOT_OFFSET 0xc80 52 #define UHA_EISA_IOSIZE 0x020 53 54 int uha_eisa_match __P((struct device *, void *, void *)); 55 void uha_eisa_attach __P((struct device *, struct device *, void *)); 56 57 struct cfattach uha_eisa_ca = { 58 sizeof(struct uha_softc), uha_eisa_match, uha_eisa_attach 59 }; 60 61 #define KVTOPHYS(x) vtophys(x) 62 63 int u24_find __P((bus_chipset_tag_t, bus_io_handle_t, struct uha_softc *)); 64 void u24_start_mbox __P((struct uha_softc *, struct uha_mscp *)); 65 int u24_poll __P((struct uha_softc *, struct scsi_xfer *, int)); 66 int u24_intr __P((void *)); 67 void u24_init __P((struct uha_softc *)); 68 69 /* 70 * Check the slots looking for a board we recognise 71 * If we find one, note it's address (slot) and call 72 * the actual probe routine to check it out. 73 */ 74 int 75 uha_eisa_match(parent, match, aux) 76 struct device *parent; 77 void *match, *aux; 78 { 79 struct eisa_attach_args *ea = aux; 80 bus_chipset_tag_t bc = ea->ea_bc; 81 bus_io_handle_t ioh; 82 int rv; 83 84 /* must match one of our known ID strings */ 85 if (strncmp(ea->ea_idstring, "USC024", 6)) 86 return (0); 87 88 if (bus_io_map(bc, EISA_SLOT_ADDR(ea->ea_slot) + UHA_EISA_SLOT_OFFSET, 89 UHA_EISA_IOSIZE, &ioh)) 90 return (0); 91 92 rv = u24_find(bc, ioh, NULL); 93 94 bus_io_unmap(bc, ioh, UHA_EISA_IOSIZE); 95 96 return (rv); 97 } 98 99 /* 100 * Attach all the sub-devices we can find 101 */ 102 void 103 uha_eisa_attach(parent, self, aux) 104 struct device *parent, *self; 105 void *aux; 106 { 107 struct eisa_attach_args *ea = aux; 108 struct uha_softc *sc = (void *)self; 109 bus_chipset_tag_t bc = ea->ea_bc; 110 bus_io_handle_t ioh; 111 eisa_chipset_tag_t ec = ea->ea_ec; 112 eisa_intr_handle_t ih; 113 const char *model, *intrstr; 114 115 if (!strncmp(ea->ea_idstring, "USC024", 6)) 116 model = EISA_PRODUCT_USC0240; 117 else 118 model = "unknown model!"; 119 printf(": %s\n", model); 120 121 if (bus_io_map(bc, EISA_SLOT_ADDR(ea->ea_slot) + UHA_EISA_SLOT_OFFSET, 122 UHA_EISA_IOSIZE, &ioh)) 123 panic("uha_attach: could not map I/O addresses"); 124 125 sc->sc_bc = bc; 126 sc->sc_ioh = ioh; 127 if (!u24_find(bc, ioh, sc)) 128 panic("uha_attach: u24_find failed!"); 129 130 if (eisa_intr_map(ec, sc->sc_irq, &ih)) { 131 printf("%s: couldn't map interrupt (%d)\n", 132 sc->sc_dev.dv_xname, sc->sc_irq); 133 return; 134 } 135 intrstr = eisa_intr_string(ec, ih); 136 sc->sc_ih = eisa_intr_establish(ec, ih, IST_LEVEL, IPL_BIO, 137 u24_intr, sc); 138 if (sc->sc_ih == NULL) { 139 printf("%s: couldn't establish interrupt", 140 sc->sc_dev.dv_xname); 141 if (intrstr != NULL) 142 printf(" at %s", intrstr); 143 printf("\n"); 144 return; 145 } 146 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr); 147 148 /* Save function pointers for later use. */ 149 sc->start_mbox = u24_start_mbox; 150 sc->poll = u24_poll; 151 sc->init = u24_init; 152 153 uha_attach(sc); 154 } 155 156 int 157 u24_find(bc, ioh, sc) 158 bus_chipset_tag_t bc; 159 bus_io_handle_t ioh; 160 struct uha_softc *sc; 161 { 162 u_int8_t config0, config1, config2; 163 int irq, drq; 164 int resetcount = 4000; /* 4 secs? */ 165 166 config0 = bus_io_read_1(bc, ioh, U24_CONFIG + 0); 167 config1 = bus_io_read_1(bc, ioh, U24_CONFIG + 1); 168 config2 = bus_io_read_1(bc, ioh, U24_CONFIG + 2); 169 if ((config0 & U24_MAGIC1) == 0 || 170 (config1 & U24_MAGIC2) == 0) 171 return (0); 172 173 drq = -1; 174 175 switch (config0 & U24_IRQ_MASK) { 176 case U24_IRQ10: 177 irq = 10; 178 break; 179 case U24_IRQ11: 180 irq = 11; 181 break; 182 case U24_IRQ14: 183 irq = 14; 184 break; 185 case U24_IRQ15: 186 irq = 15; 187 break; 188 default: 189 printf("u24_find: illegal irq setting %x\n", 190 config0 & U24_IRQ_MASK); 191 return (0); 192 } 193 194 bus_io_write_1(bc, ioh, U24_LINT, UHA_ASRST); 195 196 while (--resetcount) { 197 if (bus_io_read_1(bc, ioh, U24_LINT)) 198 break; 199 delay(1000); /* 1 mSec per loop */ 200 } 201 if (!resetcount) { 202 printf("u24_find: board timed out during reset\n"); 203 return (0); 204 } 205 206 /* if we want to fill in softc, do so now */ 207 if (sc != NULL) { 208 sc->sc_irq = irq; 209 sc->sc_drq = drq; 210 sc->sc_scsi_dev = config2 & U24_HOSTID_MASK; 211 } 212 213 return (1); 214 } 215 216 void 217 u24_start_mbox(sc, mscp) 218 struct uha_softc *sc; 219 struct uha_mscp *mscp; 220 { 221 bus_chipset_tag_t bc = sc->sc_bc; 222 bus_io_handle_t ioh = sc->sc_ioh; 223 int spincount = 100000; /* 1s should be enough */ 224 225 while (--spincount) { 226 if ((bus_io_read_1(bc, ioh, U24_LINT) & U24_LDIP) == 0) 227 break; 228 delay(100); 229 } 230 if (!spincount) { 231 printf("%s: uha_start_mbox, board not responding\n", 232 sc->sc_dev.dv_xname); 233 Debugger(); 234 } 235 236 bus_io_write_4(bc, ioh, U24_OGMPTR, KVTOPHYS(mscp)); 237 if (mscp->flags & MSCP_ABORT) 238 bus_io_write_1(bc, ioh, U24_OGMCMD, 0x80); 239 else 240 bus_io_write_1(bc, ioh, U24_OGMCMD, 0x01); 241 bus_io_write_1(bc, ioh, U24_LINT, U24_OGMFULL); 242 243 if ((mscp->xs->flags & SCSI_POLL) == 0) 244 timeout(uha_timeout, mscp, (mscp->timeout * hz) / 1000); 245 } 246 247 int 248 u24_poll(sc, xs, count) 249 struct uha_softc *sc; 250 struct scsi_xfer *xs; 251 int count; 252 { 253 bus_chipset_tag_t bc = sc->sc_bc; 254 bus_io_handle_t ioh = sc->sc_ioh; 255 256 while (count) { 257 /* 258 * If we had interrupts enabled, would we 259 * have got an interrupt? 260 */ 261 if (bus_io_read_1(bc, ioh, U24_SINT) & U24_SDIP) 262 u24_intr(sc); 263 if (xs->flags & ITSDONE) 264 return (0); 265 delay(1000); 266 count--; 267 } 268 return (1); 269 } 270 271 int 272 u24_intr(arg) 273 void *arg; 274 { 275 struct uha_softc *sc = arg; 276 bus_chipset_tag_t bc = sc->sc_bc; 277 bus_io_handle_t ioh = sc->sc_ioh; 278 struct uha_mscp *mscp; 279 u_char uhastat; 280 u_long mboxval; 281 282 #ifdef UHADEBUG 283 printf("%s: uhaintr ", sc->sc_dev.dv_xname); 284 #endif /*UHADEBUG */ 285 286 if ((bus_io_read_1(bc, ioh, U24_SINT) & U24_SDIP) == 0) 287 return (0); 288 289 for (;;) { 290 /* 291 * First get all the information and then 292 * acknowledge the interrupt 293 */ 294 uhastat = bus_io_read_1(bc, ioh, U24_SINT); 295 mboxval = bus_io_read_4(bc, ioh, U24_ICMPTR); 296 bus_io_write_1(bc, ioh, U24_SINT, U24_ICM_ACK); 297 bus_io_write_1(bc, ioh, U24_ICMCMD, 0); 298 299 #ifdef UHADEBUG 300 printf("status = 0x%x ", uhastat); 301 #endif /*UHADEBUG*/ 302 303 /* 304 * Process the completed operation 305 */ 306 mscp = uha_mscp_phys_kv(sc, mboxval); 307 if (!mscp) { 308 printf("%s: BAD MSCP RETURNED!\n", 309 sc->sc_dev.dv_xname); 310 continue; /* whatever it was, it'll timeout */ 311 } 312 untimeout(uha_timeout, mscp); 313 uha_done(sc, mscp); 314 315 if ((bus_io_read_1(bc, ioh, U24_SINT) & U24_SDIP) == 0) 316 return (1); 317 } 318 } 319 320 void 321 u24_init(sc) 322 struct uha_softc *sc; 323 { 324 bus_chipset_tag_t bc = sc->sc_bc; 325 bus_io_handle_t ioh = sc->sc_ioh; 326 327 /* free OGM and ICM */ 328 bus_io_write_1(bc, ioh, U24_OGMCMD, 0); 329 bus_io_write_1(bc, ioh, U24_ICMCMD, 0); 330 /* make sure interrupts are enabled */ 331 #ifdef UHADEBUG 332 printf("u24_init: lmask=%02x, smask=%02x\n", 333 bus_io_read_1(bc, ioh, U24_LMASK), 334 bus_io_read_1(bc, ioh, U24_SMASK)); 335 #endif 336 bus_io_write_1(bc, ioh, U24_LMASK, 0xd2); /* XXX */ 337 bus_io_write_1(bc, ioh, U24_SMASK, 0x92); /* XXX */ 338 } 339
Indexes created Fri Sep 26 08:10:20 GMT 2025