uha_eisa.c revision 1.9
1 /* $NetBSD: uha_eisa.c,v 1.9 1997/08/27 11:24:44 bouyer Exp $ */ 2 3 /* 4 * Copyright (c) 1994, 1996, 1997 Charles M. Hannum. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Charles M. Hannum. 17 * 4. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/types.h> 33 #include <sys/param.h> 34 #include <sys/systm.h> 35 #include <sys/device.h> 36 #include <sys/kernel.h> 37 #include <sys/proc.h> 38 #include <sys/user.h> 39 40 #include <machine/bus.h> 41 #include <machine/intr.h> 42 43 #include <dev/scsipi/scsi_all.h> 44 #include <dev/scsipi/scsipi_all.h> 45 #include <dev/scsipi/scsiconf.h> 46 47 #include <dev/eisa/eisavar.h> 48 #include <dev/eisa/eisadevs.h> 49 50 #include <dev/ic/uhareg.h> 51 #include <dev/ic/uhavar.h> 52 53 #define UHA_EISA_SLOT_OFFSET 0xc80 54 #define UHA_EISA_IOSIZE 0x020 55 56 #ifdef __BROKEN_INDIRECT_CONFIG 57 int uha_eisa_match __P((struct device *, void *, void *)); 58 #else 59 int uha_eisa_match __P((struct device *, struct cfdata *, void *)); 60 #endif 61 void uha_eisa_attach __P((struct device *, struct device *, void *)); 62 63 struct cfattach uha_eisa_ca = { 64 sizeof(struct uha_softc), uha_eisa_match, uha_eisa_attach 65 }; 66 67 #ifndef DDB 68 #define Debugger() panic("should call debugger here (uha_eisa.c)") 69 #endif /* ! DDB */ 70 71 int u24_find __P((bus_space_tag_t, bus_space_handle_t, 72 struct uha_probe_data *)); 73 void u24_start_mbox __P((struct uha_softc *, struct uha_mscp *)); 74 int u24_poll __P((struct uha_softc *, struct scsipi_xfer *, int)); 75 int u24_intr __P((void *)); 76 void u24_init __P((struct uha_softc *)); 77 78 /* 79 * Check the slots looking for a board we recognise 80 * If we find one, note it's address (slot) and call 81 * the actual probe routine to check it out. 82 */ 83 int 84 uha_eisa_match(parent, match, aux) 85 struct device *parent; 86 #ifdef __BROKEN_INDIRECT_CONFIG 87 void *match; 88 #else 89 struct cfdata *match; 90 #endif 91 void *aux; 92 { 93 struct eisa_attach_args *ea = aux; 94 bus_space_tag_t iot = ea->ea_iot; 95 bus_space_handle_t ioh; 96 int rv; 97 98 /* must match one of our known ID strings */ 99 if (strncmp(ea->ea_idstring, "USC024", 6)) 100 return (0); 101 102 if (bus_space_map(iot, EISA_SLOT_ADDR(ea->ea_slot) + 103 UHA_EISA_SLOT_OFFSET, UHA_EISA_IOSIZE, 0, &ioh)) 104 return (0); 105 106 rv = u24_find(iot, ioh, NULL); 107 108 bus_space_unmap(iot, ioh, UHA_EISA_IOSIZE); 109 110 return (rv); 111 } 112 113 /* 114 * Attach all the sub-devices we can find 115 */ 116 void 117 uha_eisa_attach(parent, self, aux) 118 struct device *parent, *self; 119 void *aux; 120 { 121 struct eisa_attach_args *ea = aux; 122 struct uha_softc *sc = (void *)self; 123 bus_space_tag_t iot = ea->ea_iot; 124 bus_dma_tag_t dmat = ea->ea_dmat; 125 bus_space_handle_t ioh; 126 struct uha_probe_data upd; 127 eisa_chipset_tag_t ec = ea->ea_ec; 128 eisa_intr_handle_t ih; 129 const char *model, *intrstr; 130 131 if (!strncmp(ea->ea_idstring, "USC024", 6)) 132 model = EISA_PRODUCT_USC0240; 133 else 134 model = "unknown model!"; 135 printf(": %s\n", model); 136 137 if (bus_space_map(iot, EISA_SLOT_ADDR(ea->ea_slot) + 138 UHA_EISA_SLOT_OFFSET, UHA_EISA_IOSIZE, 0, &ioh)) 139 panic("uha_eisa_attach: could not map I/O addresses"); 140 141 sc->sc_iot = iot; 142 sc->sc_ioh = ioh; 143 sc->sc_dmat = dmat; 144 if (!u24_find(iot, ioh, &upd)) 145 panic("uha_eisa_attach: u24_find failed!"); 146 147 sc->sc_dmaflags = 0; 148 149 if (eisa_intr_map(ec, upd.sc_irq, &ih)) { 150 printf("%s: couldn't map interrupt (%d)\n", 151 sc->sc_dev.dv_xname, upd.sc_irq); 152 return; 153 } 154 intrstr = eisa_intr_string(ec, ih); 155 sc->sc_ih = eisa_intr_establish(ec, ih, IST_LEVEL, IPL_BIO, 156 u24_intr, sc); 157 if (sc->sc_ih == NULL) { 158 printf("%s: couldn't establish interrupt", 159 sc->sc_dev.dv_xname); 160 if (intrstr != NULL) 161 printf(" at %s", intrstr); 162 printf("\n"); 163 return; 164 } 165 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr); 166 167 /* Save function pointers for later use. */ 168 sc->start_mbox = u24_start_mbox; 169 sc->poll = u24_poll; 170 sc->init = u24_init; 171 172 uha_attach(sc, &upd); 173 } 174 175 int 176 u24_find(iot, ioh, sc) 177 bus_space_tag_t iot; 178 bus_space_handle_t ioh; 179 struct uha_probe_data *sc; 180 { 181 u_int8_t config0, config1, config2; 182 int irq, drq; 183 int resetcount = 4000; /* 4 secs? */ 184 185 config0 = bus_space_read_1(iot, ioh, U24_CONFIG + 0); 186 config1 = bus_space_read_1(iot, ioh, U24_CONFIG + 1); 187 config2 = bus_space_read_1(iot, ioh, U24_CONFIG + 2); 188 if ((config0 & U24_MAGIC1) == 0 || 189 (config1 & U24_MAGIC2) == 0) 190 return (0); 191 192 drq = -1; 193 194 switch (config0 & U24_IRQ_MASK) { 195 case U24_IRQ10: 196 irq = 10; 197 break; 198 case U24_IRQ11: 199 irq = 11; 200 break; 201 case U24_IRQ14: 202 irq = 14; 203 break; 204 case U24_IRQ15: 205 irq = 15; 206 break; 207 default: 208 printf("u24_find: illegal irq setting %x\n", 209 config0 & U24_IRQ_MASK); 210 return (0); 211 } 212 213 bus_space_write_1(iot, ioh, U24_LINT, UHA_ASRST); 214 215 while (--resetcount) { 216 if (bus_space_read_1(iot, ioh, U24_LINT)) 217 break; 218 delay(1000); /* 1 mSec per loop */ 219 } 220 if (!resetcount) { 221 printf("u24_find: board timed out during reset\n"); 222 return (0); 223 } 224 225 /* if we want to fill in softc, do so now */ 226 if (sc) { 227 sc->sc_irq = irq; 228 sc->sc_drq = drq; 229 sc->sc_scsi_dev = config2 & U24_HOSTID_MASK; 230 } 231 232 return (1); 233 } 234 235 void 236 u24_start_mbox(sc, mscp) 237 struct uha_softc *sc; 238 struct uha_mscp *mscp; 239 { 240 bus_space_tag_t iot = sc->sc_iot; 241 bus_space_handle_t ioh = sc->sc_ioh; 242 int spincount = 100000; /* 1s should be enough */ 243 244 while (--spincount) { 245 if ((bus_space_read_1(iot, ioh, U24_LINT) & U24_LDIP) == 0) 246 break; 247 delay(100); 248 } 249 if (!spincount) { 250 printf("%s: uha_start_mbox, board not responding\n", 251 sc->sc_dev.dv_xname); 252 Debugger(); 253 } 254 255 bus_space_write_4(iot, ioh, U24_OGMPTR, 256 mscp->dmamap_self->dm_segs[0].ds_addr); 257 if (mscp->flags & MSCP_ABORT) 258 bus_space_write_1(iot, ioh, U24_OGMCMD, 0x80); 259 else 260 bus_space_write_1(iot, ioh, U24_OGMCMD, 0x01); 261 bus_space_write_1(iot, ioh, U24_LINT, U24_OGMFULL); 262 263 if ((mscp->xs->flags & SCSI_POLL) == 0) 264 timeout(uha_timeout, mscp, (mscp->timeout * hz) / 1000); 265 } 266 267 int 268 u24_poll(sc, xs, count) 269 struct uha_softc *sc; 270 struct scsipi_xfer *xs; 271 int count; 272 { 273 bus_space_tag_t iot = sc->sc_iot; 274 bus_space_handle_t ioh = sc->sc_ioh; 275 276 while (count) { 277 /* 278 * If we had interrupts enabled, would we 279 * have got an interrupt? 280 */ 281 if (bus_space_read_1(iot, ioh, U24_SINT) & U24_SDIP) 282 u24_intr(sc); 283 if (xs->flags & ITSDONE) 284 return (0); 285 delay(1000); 286 count--; 287 } 288 return (1); 289 } 290 291 int 292 u24_intr(arg) 293 void *arg; 294 { 295 struct uha_softc *sc = arg; 296 bus_space_tag_t iot = sc->sc_iot; 297 bus_space_handle_t ioh = sc->sc_ioh; 298 struct uha_mscp *mscp; 299 u_char uhastat; 300 u_long mboxval; 301 302 #ifdef UHADEBUG 303 printf("%s: uhaintr ", sc->sc_dev.dv_xname); 304 #endif /*UHADEBUG */ 305 306 if ((bus_space_read_1(iot, ioh, U24_SINT) & U24_SDIP) == 0) 307 return (0); 308 309 for (;;) { 310 /* 311 * First get all the information and then 312 * acknowledge the interrupt 313 */ 314 uhastat = bus_space_read_1(iot, ioh, U24_SINT); 315 mboxval = bus_space_read_4(iot, ioh, U24_ICMPTR); 316 bus_space_write_1(iot, ioh, U24_SINT, U24_ICM_ACK); 317 bus_space_write_1(iot, ioh, U24_ICMCMD, 0); 318 319 #ifdef UHADEBUG 320 printf("status = 0x%x ", uhastat); 321 #endif /*UHADEBUG*/ 322 323 /* 324 * Process the completed operation 325 */ 326 mscp = uha_mscp_phys_kv(sc, mboxval); 327 if (!mscp) { 328 printf("%s: BAD MSCP RETURNED!\n", 329 sc->sc_dev.dv_xname); 330 continue; /* whatever it was, it'll timeout */ 331 } 332 untimeout(uha_timeout, mscp); 333 uha_done(sc, mscp); 334 335 if ((bus_space_read_1(iot, ioh, U24_SINT) & U24_SDIP) == 0) 336 return (1); 337 } 338 } 339 340 void 341 u24_init(sc) 342 struct uha_softc *sc; 343 { 344 bus_space_tag_t iot = sc->sc_iot; 345 bus_space_handle_t ioh = sc->sc_ioh; 346 347 /* free OGM and ICM */ 348 bus_space_write_1(iot, ioh, U24_OGMCMD, 0); 349 bus_space_write_1(iot, ioh, U24_ICMCMD, 0); 350 /* make sure interrupts are enabled */ 351 #ifdef UHADEBUG 352 printf("u24_init: lmask=%02x, smask=%02x\n", 353 bus_space_read_1(iot, ioh, U24_LMASK), 354 bus_space_read_1(iot, ioh, U24_SMASK)); 355 #endif 356 bus_space_write_1(iot, ioh, U24_LMASK, 0xd2); /* XXX */ 357 bus_space_write_1(iot, ioh, U24_SMASK, 0x92); /* XXX */ 358 } 359
Indexes created Sat Sep 27 22:09:54 GMT 2025