ahcisata_fdt.c revision 1.3
11.3Sthorpej/* $NetBSD: ahcisata_fdt.c,v 1.3 2021/01/27 03:10:21 thorpej Exp $ */ 21.1Sjmcneill 31.1Sjmcneill/*- 41.1Sjmcneill * Copyright (c) 2018 Jared McNeill <jmcneill@invisible.ca> 51.1Sjmcneill * All rights reserved. 61.1Sjmcneill * 71.1Sjmcneill * Redistribution and use in source and binary forms, with or without 81.1Sjmcneill * modification, are permitted provided that the following conditions 91.1Sjmcneill * are met: 101.1Sjmcneill * 1. Redistributions of source code must retain the above copyright 111.1Sjmcneill * notice, this list of conditions and the following disclaimer. 121.1Sjmcneill * 2. Redistributions in binary form must reproduce the above copyright 131.1Sjmcneill * notice, this list of conditions and the following disclaimer in the 141.1Sjmcneill * documentation and/or other materials provided with the distribution. 151.1Sjmcneill * 161.1Sjmcneill * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 171.1Sjmcneill * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 181.1Sjmcneill * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 191.1Sjmcneill * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 201.1Sjmcneill * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 211.1Sjmcneill * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 221.1Sjmcneill * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 231.1Sjmcneill * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 241.1Sjmcneill * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 251.1Sjmcneill * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 261.1Sjmcneill * POSSIBILITY OF SUCH DAMAGE. 271.1Sjmcneill */ 281.1Sjmcneill 291.1Sjmcneill#include <sys/cdefs.h> 301.1Sjmcneill 311.3Sthorpej__KERNEL_RCSID(0, "$NetBSD: ahcisata_fdt.c,v 1.3 2021/01/27 03:10:21 thorpej Exp $"); 321.1Sjmcneill 331.1Sjmcneill#include <sys/param.h> 341.1Sjmcneill#include <sys/bus.h> 351.1Sjmcneill#include <sys/device.h> 361.1Sjmcneill#include <sys/intr.h> 371.1Sjmcneill#include <sys/systm.h> 381.1Sjmcneill 391.1Sjmcneill#include <dev/ata/atavar.h> 401.1Sjmcneill#include <dev/ic/ahcisatavar.h> 411.1Sjmcneill 421.1Sjmcneill#include <dev/fdt/fdtvar.h> 431.1Sjmcneill 441.3Sthorpejstatic const struct device_compatible_entry compat_data[] = { 451.3Sthorpej { .compat = "snps,dwc-ahci" }, 461.3Sthorpej { .compat = "generic-ahci" }, 471.3Sthorpej DEVICE_COMPAT_EOL 481.1Sjmcneill}; 491.1Sjmcneill 501.1Sjmcneillstatic int 511.1Sjmcneillahcisata_fdt_match(device_t parent, cfdata_t cf, void *aux) 521.1Sjmcneill{ 531.1Sjmcneill struct fdt_attach_args * const faa = aux; 541.1Sjmcneill 551.3Sthorpej return of_compatible_match(faa->faa_phandle, compat_data); 561.1Sjmcneill} 571.1Sjmcneill 581.1Sjmcneillstatic void 591.1Sjmcneillahcisata_fdt_attach(device_t parent, device_t self, void *aux) 601.1Sjmcneill{ 611.1Sjmcneill struct ahci_softc * const sc = device_private(self); 621.1Sjmcneill struct fdt_attach_args * const faa = aux; 631.1Sjmcneill const int phandle = faa->faa_phandle; 641.1Sjmcneill struct fdtbus_reset *rst; 651.1Sjmcneill struct clk *clk; 661.1Sjmcneill char intrstr[128]; 671.1Sjmcneill bus_addr_t addr; 681.1Sjmcneill bus_size_t size; 691.1Sjmcneill int i; 701.1Sjmcneill 711.1Sjmcneill if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) { 721.1Sjmcneill aprint_error(": couldn't get registers\n"); 731.1Sjmcneill return; 741.1Sjmcneill } 751.1Sjmcneill 761.1Sjmcneill sc->sc_atac.atac_dev = self; 771.1Sjmcneill sc->sc_dmat = faa->faa_dmat; 781.1Sjmcneill sc->sc_ahcit = faa->faa_bst; 791.1Sjmcneill sc->sc_ahcis = size; 801.1Sjmcneill if (bus_space_map(sc->sc_ahcit, addr, size, 0, &sc->sc_ahcih) != 0) { 811.1Sjmcneill aprint_error(": couldn't map registers\n"); 821.1Sjmcneill return; 831.1Sjmcneill } 841.1Sjmcneill if (of_getprop_uint32(phandle, "ports-implemented", &sc->sc_ahci_ports) != 0) 851.1Sjmcneill sc->sc_save_init_data = true; 861.1Sjmcneill 871.1Sjmcneill if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) { 881.1Sjmcneill aprint_error(": failed to decode interrupt\n"); 891.1Sjmcneill return; 901.1Sjmcneill } 911.1Sjmcneill 921.1Sjmcneill for (i = 0; (clk = fdtbus_clock_get_index(phandle, i)) != NULL; i++) 931.1Sjmcneill if (clk_enable(clk) != 0) { 941.1Sjmcneill aprint_error(": couldn't enable clock #%d\n", i); 951.1Sjmcneill return; 961.1Sjmcneill } 971.1Sjmcneill for (i = 0; (rst = fdtbus_reset_get_index(phandle, i)) != NULL; i++) 981.1Sjmcneill if (fdtbus_reset_deassert(rst) != 0) { 991.1Sjmcneill aprint_error(": couldn't de-assert reset #%d\n", i); 1001.1Sjmcneill return; 1011.1Sjmcneill } 1021.1Sjmcneill 1031.1Sjmcneill aprint_naive("\n"); 1041.1Sjmcneill aprint_normal(": AHCI SATA controller\n"); 1051.1Sjmcneill 1061.2Sjmcneill if (fdtbus_intr_establish_xname(phandle, 0, IPL_BIO, 0, 1071.2Sjmcneill ahci_intr, sc, device_xname(self)) == NULL) { 1081.2Sjmcneill aprint_error_dev(self, 1091.2Sjmcneill "failed to establish interrupt on %s\n", intrstr); 1101.1Sjmcneill return; 1111.1Sjmcneill } 1121.1Sjmcneill aprint_normal_dev(self, "interrupting on %s\n", intrstr); 1131.1Sjmcneill 1141.1Sjmcneill ahci_attach(sc); 1151.1Sjmcneill} 1161.1Sjmcneill 1171.1SjmcneillCFATTACH_DECL_NEW(ahcisata_fdt, sizeof(struct ahci_softc), 1181.1Sjmcneill ahcisata_fdt_match, ahcisata_fdt_attach, NULL, NULL); 119