dwc2_fdt.c revision 1.1 1 /* $NetBSD: dwc2_fdt.c,v 1.1 2018/06/16 00:19:04 jmcneill Exp $ */
2
3 /*-
4 * Copyright (c) 2013 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Nick Hudson
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 #include <sys/cdefs.h>
33 __KERNEL_RCSID(0, "$NetBSD: dwc2_fdt.c,v 1.1 2018/06/16 00:19:04 jmcneill Exp $");
34
35 #include <sys/param.h>
36 #include <sys/systm.h>
37 #include <sys/device.h>
38 #include <sys/mutex.h>
39 #include <sys/bus.h>
40 #include <sys/workqueue.h>
41
42 #include <arm/broadcom/bcm2835reg.h>
43
44 #include <dev/fdt/fdtvar.h>
45
46 #include <dev/usb/usb.h>
47 #include <dev/usb/usbdi.h>
48 #include <dev/usb/usbdivar.h>
49 #include <dev/usb/usb_mem.h>
50
51 #include <dwc2/dwc2var.h>
52
53 #include <dwc2/dwc2.h>
54 #include "dwc2_core.h"
55
56 struct dwc2_fdt_softc {
57 struct dwc2_softc sc_dwc2;
58
59 struct dwc2_core_params sc_params;
60
61 void *sc_ih;
62 int sc_phandle;
63 };
64
65 static int dwc2_fdt_match(device_t, struct cfdata *, void *);
66 static void dwc2_fdt_attach(device_t, device_t, void *);
67 static void dwc2_fdt_deferred(device_t);
68
69 static void dwc2_fdt_rockchip_params(struct dwc2_fdt_softc *, struct dwc2_core_params *);
70
71 struct dwc2_fdt_config {
72 void (*params)(struct dwc2_fdt_softc *, struct dwc2_core_params *);
73 };
74
75 static const struct dwc2_fdt_config dwc2_fdt_rk3066_config = {
76 .params = dwc2_fdt_rockchip_params,
77 };
78
79 static const struct of_compat_data compat_data[] = {
80 { "rockchip,rk3066-usb", (uintptr_t)&dwc2_fdt_rk3066_config },
81 { NULL }
82 };
83
84 CFATTACH_DECL_NEW(dwc2_fdt, sizeof(struct dwc2_fdt_softc),
85 dwc2_fdt_match, dwc2_fdt_attach, NULL, NULL);
86
87 /* ARGSUSED */
88 static int
89 dwc2_fdt_match(device_t parent, struct cfdata *match, void *aux)
90 {
91 struct fdt_attach_args * const faa = aux;
92
93 return of_match_compat_data(faa->faa_phandle, compat_data);
94 }
95
96 /* ARGSUSED */
97 static void
98 dwc2_fdt_attach(device_t parent, device_t self, void *aux)
99 {
100 struct dwc2_fdt_softc *sc = device_private(self);
101 struct fdt_attach_args * const faa = aux;
102 const int phandle = faa->faa_phandle;
103 const struct dwc2_fdt_config *conf =
104 (void *)of_search_compatible(phandle, compat_data)->data;
105 char intrstr[128];
106 struct fdtbus_phy *phy;
107 struct clk *clk;
108 bus_addr_t addr;
109 bus_size_t size;
110 int error;
111
112 const char *dr_mode = fdtbus_get_string(phandle, "dr_mode");
113 if (dr_mode == NULL || strcmp(dr_mode, "host") != 0) {
114 aprint_error(": mode '%s' not supported\n", dr_mode);
115 return;
116 }
117
118 if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) {
119 aprint_error(": couldn't get registers\n");
120 return;
121 }
122
123 clk = fdtbus_clock_get(phandle, "otg");
124 if (clk == NULL || clk_enable(clk) != 0) {
125 aprint_error(": couldn't enable otg clock\n");
126 return;
127 }
128
129 /* Enable optional phy */
130 phy = fdtbus_phy_get(phandle, "usb2-phy");
131 if (phy && fdtbus_phy_enable(phy, true) != 0) {
132 aprint_error(": couldn't enable phy\n");
133 return;
134 }
135
136 sc->sc_phandle = phandle;
137 sc->sc_dwc2.sc_dev = self;
138 sc->sc_dwc2.sc_iot = faa->faa_bst;
139 sc->sc_dwc2.sc_bus.ub_dmatag = faa->faa_dmat;
140
141 error = bus_space_map(faa->faa_bst, addr, size, 0, &sc->sc_dwc2.sc_ioh);
142 if (error) {
143 aprint_error(": couldn't map device\n");
144 return;
145 }
146
147 if (conf->params) {
148 conf->params(sc, &sc->sc_params);
149 sc->sc_dwc2.sc_params = &sc->sc_params;
150 }
151
152 if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) {
153 aprint_error(": failed to decode interrupt\n");
154 return;
155 }
156
157 aprint_naive("\n");
158 aprint_normal(": DesignWare USB2 OTG\n");
159
160 sc->sc_ih = fdtbus_intr_establish(phandle, 0, IPL_VM, FDT_INTR_MPSAFE,
161 dwc2_intr, &sc->sc_dwc2);
162
163 if (sc->sc_ih == NULL) {
164 aprint_error_dev(self, "failed to establish interrupt %s\n",
165 intrstr);
166 goto fail;
167 }
168 aprint_normal_dev(self, "interrupting on %s\n", intrstr);
169 config_interrupts(self, dwc2_fdt_deferred);
170
171 return;
172
173 fail:
174 if (sc->sc_ih) {
175 fdtbus_intr_disestablish(sc->sc_phandle, sc->sc_ih);
176 sc->sc_ih = NULL;
177 }
178 bus_space_unmap(sc->sc_dwc2.sc_iot, sc->sc_dwc2.sc_ioh, size);
179 }
180
181 static void
182 dwc2_fdt_deferred(device_t self)
183 {
184 struct dwc2_fdt_softc *sc = device_private(self);
185 int error;
186
187 error = dwc2_init(&sc->sc_dwc2);
188 if (error != 0) {
189 aprint_error_dev(self, "couldn't initialize host, error=%d\n",
190 error);
191 return;
192 }
193 sc->sc_dwc2.sc_child = config_found(sc->sc_dwc2.sc_dev,
194 &sc->sc_dwc2.sc_bus, usbctlprint);
195 }
196
197 static void
198 dwc2_fdt_rockchip_params(struct dwc2_fdt_softc *sc, struct dwc2_core_params *params)
199 {
200 dwc2_set_all_params(params, -1);
201
202 params->otg_cap = DWC2_CAP_PARAM_NO_HNP_SRP_CAPABLE;
203 params->host_rx_fifo_size = 525;
204 params->host_nperio_tx_fifo_size = 128;
205 params->host_perio_tx_fifo_size = 256;
206 params->ahbcfg = GAHBCFG_HBSTLEN_INCR16 << GAHBCFG_HBSTLEN_SHIFT;
207 }
208