dwc2_fdt.c revision 1.2 1 /* $NetBSD: dwc2_fdt.c,v 1.2 2018/06/16 23:44:26 jmcneill Exp $ */
2
3 /*-
4 * Copyright (c) 2013 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Nick Hudson
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 #include <sys/cdefs.h>
33 __KERNEL_RCSID(0, "$NetBSD: dwc2_fdt.c,v 1.2 2018/06/16 23:44:26 jmcneill Exp $");
34
35 #include <sys/param.h>
36 #include <sys/systm.h>
37 #include <sys/device.h>
38 #include <sys/mutex.h>
39 #include <sys/bus.h>
40 #include <sys/workqueue.h>
41
42 #include <arm/broadcom/bcm2835reg.h>
43
44 #include <dev/fdt/fdtvar.h>
45
46 #include <dev/usb/usb.h>
47 #include <dev/usb/usbdi.h>
48 #include <dev/usb/usbdivar.h>
49 #include <dev/usb/usb_mem.h>
50
51 #include <dwc2/dwc2var.h>
52
53 #include <dwc2/dwc2.h>
54 #include "dwc2_core.h"
55
56 struct dwc2_fdt_softc {
57 struct dwc2_softc sc_dwc2;
58
59 struct dwc2_core_params sc_params;
60
61 void *sc_ih;
62 int sc_phandle;
63 };
64
65 static int dwc2_fdt_match(device_t, struct cfdata *, void *);
66 static void dwc2_fdt_attach(device_t, device_t, void *);
67 static void dwc2_fdt_deferred(device_t);
68
69 static void dwc2_fdt_rockchip_params(struct dwc2_fdt_softc *, struct dwc2_core_params *);
70
71 struct dwc2_fdt_config {
72 void (*params)(struct dwc2_fdt_softc *, struct dwc2_core_params *);
73 };
74
75 static const struct dwc2_fdt_config dwc2_fdt_rk3066_config = {
76 .params = dwc2_fdt_rockchip_params,
77 };
78
79 static const struct dwc2_fdt_config dwc2_fdt_generic_config = {
80 };
81
82 static const struct of_compat_data compat_data[] = {
83 { "rockchip,rk3066-usb", (uintptr_t)&dwc2_fdt_rk3066_config },
84 { "snps,dwc2", (uintptr_t)&dwc2_fdt_generic_config },
85 { NULL }
86 };
87
88 CFATTACH_DECL_NEW(dwc2_fdt, sizeof(struct dwc2_fdt_softc),
89 dwc2_fdt_match, dwc2_fdt_attach, NULL, NULL);
90
91 /* ARGSUSED */
92 static int
93 dwc2_fdt_match(device_t parent, struct cfdata *match, void *aux)
94 {
95 struct fdt_attach_args * const faa = aux;
96
97 return of_match_compat_data(faa->faa_phandle, compat_data);
98 }
99
100 /* ARGSUSED */
101 static void
102 dwc2_fdt_attach(device_t parent, device_t self, void *aux)
103 {
104 struct dwc2_fdt_softc *sc = device_private(self);
105 struct fdt_attach_args * const faa = aux;
106 const int phandle = faa->faa_phandle;
107 const struct dwc2_fdt_config *conf =
108 (void *)of_search_compatible(phandle, compat_data)->data;
109 char intrstr[128];
110 struct fdtbus_phy *phy;
111 struct clk *clk;
112 bus_addr_t addr;
113 bus_size_t size;
114 int error;
115
116 const char *dr_mode = fdtbus_get_string(phandle, "dr_mode");
117 if (dr_mode == NULL || strcmp(dr_mode, "host") != 0) {
118 aprint_error(": mode '%s' not supported\n", dr_mode);
119 return;
120 }
121
122 if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) {
123 aprint_error(": couldn't get registers\n");
124 return;
125 }
126
127 clk = fdtbus_clock_get(phandle, "otg");
128 if (clk == NULL || clk_enable(clk) != 0) {
129 aprint_error(": couldn't enable otg clock\n");
130 return;
131 }
132
133 /* Enable optional phy */
134 phy = fdtbus_phy_get(phandle, "usb2-phy");
135 if (phy && fdtbus_phy_enable(phy, true) != 0) {
136 aprint_error(": couldn't enable phy\n");
137 return;
138 }
139
140 sc->sc_phandle = phandle;
141 sc->sc_dwc2.sc_dev = self;
142 sc->sc_dwc2.sc_iot = faa->faa_bst;
143 sc->sc_dwc2.sc_bus.ub_dmatag = faa->faa_dmat;
144
145 error = bus_space_map(faa->faa_bst, addr, size, 0, &sc->sc_dwc2.sc_ioh);
146 if (error) {
147 aprint_error(": couldn't map device\n");
148 return;
149 }
150
151 if (conf->params) {
152 conf->params(sc, &sc->sc_params);
153 sc->sc_dwc2.sc_params = &sc->sc_params;
154 }
155
156 if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) {
157 aprint_error(": failed to decode interrupt\n");
158 return;
159 }
160
161 aprint_naive("\n");
162 aprint_normal(": DesignWare USB2 OTG\n");
163
164 sc->sc_ih = fdtbus_intr_establish(phandle, 0, IPL_VM, FDT_INTR_MPSAFE,
165 dwc2_intr, &sc->sc_dwc2);
166
167 if (sc->sc_ih == NULL) {
168 aprint_error_dev(self, "failed to establish interrupt %s\n",
169 intrstr);
170 goto fail;
171 }
172 aprint_normal_dev(self, "interrupting on %s\n", intrstr);
173 config_interrupts(self, dwc2_fdt_deferred);
174
175 return;
176
177 fail:
178 if (sc->sc_ih) {
179 fdtbus_intr_disestablish(sc->sc_phandle, sc->sc_ih);
180 sc->sc_ih = NULL;
181 }
182 bus_space_unmap(sc->sc_dwc2.sc_iot, sc->sc_dwc2.sc_ioh, size);
183 }
184
185 static void
186 dwc2_fdt_deferred(device_t self)
187 {
188 struct dwc2_fdt_softc *sc = device_private(self);
189 int error;
190
191 error = dwc2_init(&sc->sc_dwc2);
192 if (error != 0) {
193 aprint_error_dev(self, "couldn't initialize host, error=%d\n",
194 error);
195 return;
196 }
197 sc->sc_dwc2.sc_child = config_found(sc->sc_dwc2.sc_dev,
198 &sc->sc_dwc2.sc_bus, usbctlprint);
199 }
200
201 static void
202 dwc2_fdt_rockchip_params(struct dwc2_fdt_softc *sc, struct dwc2_core_params *params)
203 {
204 dwc2_set_all_params(params, -1);
205
206 params->otg_cap = DWC2_CAP_PARAM_NO_HNP_SRP_CAPABLE;
207 params->host_rx_fifo_size = 525;
208 params->host_nperio_tx_fifo_size = 128;
209 params->host_perio_tx_fifo_size = 256;
210 params->ahbcfg = GAHBCFG_HBSTLEN_INCR16 << GAHBCFG_HBSTLEN_SHIFT;
211 }
212