dwiic_fdt.c revision 1.9 1 /* $NetBSD: dwiic_fdt.c,v 1.9 2025/09/16 11:55:17 thorpej Exp $ */
2
3 /*-
4 * Copyright (c) 2017 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Manuel Bouyer.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31 /*
32 * Synopsys DesignWare I2C controller, FDT front-end
33 */
34
35 #include <sys/cdefs.h>
36 __KERNEL_RCSID(0, "$NetBSD: dwiic_fdt.c,v 1.9 2025/09/16 11:55:17 thorpej Exp $");
37
38 #include <sys/param.h>
39 #include <sys/systm.h>
40
41 #include <dev/fdt/fdtvar.h>
42 #include <dev/ic/dwiic_var.h>
43
44 static const struct device_compatible_entry compat_data[] = {
45 { .compat = "snps,designware-i2c" },
46 DEVICE_COMPAT_EOL
47 };
48
49 struct dwiic_fdt_softc {
50 struct dwiic_softc sc_dwiic;
51 };
52
53 static int dwiic_fdt_match(device_t, cfdata_t, void *);
54 static void dwiic_fdt_attach(device_t, device_t, void *);
55
56 CFATTACH_DECL_NEW(dwiic_fdt, sizeof(struct dwiic_fdt_softc),
57 dwiic_fdt_match, dwiic_fdt_attach, dwiic_detach, NULL);
58
59 int
60 dwiic_fdt_match(device_t parent, cfdata_t match, void *aux)
61 {
62 struct fdt_attach_args * const faa = aux;
63
64 return of_compatible_match(faa->faa_phandle, compat_data);
65 }
66
67 void
68 dwiic_fdt_attach(device_t parent, device_t self, void *aux)
69 {
70 struct dwiic_fdt_softc * const sc = device_private(self);
71 struct fdt_attach_args * const faa = aux;
72 const int phandle = faa->faa_phandle;
73 bus_addr_t addr;
74 bus_size_t size;
75 char intrstr[128];
76
77 sc->sc_dwiic.sc_dev = self;
78 sc->sc_dwiic.sc_power = NULL;
79 sc->sc_dwiic.sc_type = dwiic_type_generic;
80
81 if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) {
82 aprint_error(": couldn't get registers\n");
83 return;
84 }
85
86 sc->sc_dwiic.sc_iot = faa->faa_bst;
87 if (bus_space_map(sc->sc_dwiic.sc_iot, addr, size, 0, &sc->sc_dwiic.sc_ioh) != 0) {
88 aprint_error(": couldn't map registers\n");
89 return;
90 }
91
92 /* enable clock(s) */
93 struct clk *clk;
94 u_int c;
95 for (c = 0; (clk = fdtbus_clock_get_index(phandle, c)) != NULL; c++) {
96 if (clk_enable(clk) != 0) {
97 aprint_error(": couldn't enable clock #%d\n", c);
98 goto failed_clock;
99 }
100 }
101 if (c == 0) {
102 aprint_error(": missing clock\n");
103 goto failed_clock;
104 }
105
106 /* de-assert optional reset. */
107 struct fdtbus_reset *rst = fdtbus_reset_get_index(phandle, 0);
108 if (rst != NULL) {
109 if (fdtbus_reset_deassert(rst) != 0) {
110 aprint_error(": couldn't de-assert the reset\n");
111 goto failed_reset;
112 }
113 }
114
115 aprint_naive(": I2C controller\n");
116 aprint_normal(": I2C controller\n");
117
118 if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) {
119 aprint_error_dev(self, "failed to decode interrupt\n");
120 goto failed_intrstr;
121 }
122 aprint_normal_dev(self, "interrupting on %s\n", intrstr);
123
124 sc->sc_dwiic.sc_ih = fdtbus_intr_establish_xname(phandle, 0, IPL_VM, 0,
125 dwiic_intr, &sc->sc_dwiic, device_xname(self));
126 if (sc->sc_dwiic.sc_ih == NULL) {
127 aprint_error_dev(self, "couldn't establish interrupt\n");
128 goto failed_intr;
129 }
130
131 if (!dwiic_attach(&sc->sc_dwiic))
132 goto failed_attach;
133
134 pmf_device_register(self, dwiic_suspend, dwiic_resume);
135
136 iicbus_attach(self, &sc->sc_dwiic.sc_i2c_tag);
137
138 return;
139
140 failed_attach:
141 fdtbus_intr_disestablish(phandle, sc->sc_dwiic.sc_ih);
142
143 failed_intrstr:
144 failed_intr:
145 failed_reset:
146 failed_clock:
147 bus_space_unmap(sc->sc_dwiic.sc_iot, sc->sc_dwiic.sc_ioh, size);
148 }
149