mmc_pwrseq_emmc.c revision 1.1
11.1Sjmcneill/* $NetBSD: mmc_pwrseq_emmc.c,v 1.1 2019/03/03 12:54:07 jmcneill Exp $ */ 21.1Sjmcneill 31.1Sjmcneill/*- 41.1Sjmcneill * Copyright (c) 2019 Jared McNeill <jmcneill@invisible.ca> 51.1Sjmcneill * All rights reserved. 61.1Sjmcneill * 71.1Sjmcneill * Redistribution and use in source and binary forms, with or without 81.1Sjmcneill * modification, are permitted provided that the following conditions 91.1Sjmcneill * are met: 101.1Sjmcneill * 1. Redistributions of source code must retain the above copyright 111.1Sjmcneill * notice, this list of conditions and the following disclaimer. 121.1Sjmcneill * 2. Redistributions in binary form must reproduce the above copyright 131.1Sjmcneill * notice, this list of conditions and the following disclaimer in the 141.1Sjmcneill * documentation and/or other materials provided with the distribution. 151.1Sjmcneill * 161.1Sjmcneill * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 171.1Sjmcneill * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 181.1Sjmcneill * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 191.1Sjmcneill * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 201.1Sjmcneill * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 211.1Sjmcneill * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 221.1Sjmcneill * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 231.1Sjmcneill * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 241.1Sjmcneill * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 251.1Sjmcneill * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 261.1Sjmcneill * SUCH DAMAGE. 271.1Sjmcneill */ 281.1Sjmcneill 291.1Sjmcneill#include <sys/cdefs.h> 301.1Sjmcneill__KERNEL_RCSID(0, "$NetBSD: mmc_pwrseq_emmc.c,v 1.1 2019/03/03 12:54:07 jmcneill Exp $"); 311.1Sjmcneill 321.1Sjmcneill#include <sys/param.h> 331.1Sjmcneill#include <sys/kernel.h> 341.1Sjmcneill#include <sys/device.h> 351.1Sjmcneill#include <sys/systm.h> 361.1Sjmcneill#include <sys/proc.h> 371.1Sjmcneill#include <sys/gpio.h> 381.1Sjmcneill 391.1Sjmcneill#include <dev/fdt/fdtvar.h> 401.1Sjmcneill 411.1Sjmcneill#define MMCPWRSEQ_MAX_PINS 32 421.1Sjmcneill 431.1Sjmcneillstatic const char * const compatible[] = { 441.1Sjmcneill "mmc-pwrseq-emmc", 451.1Sjmcneill NULL 461.1Sjmcneill}; 471.1Sjmcneill 481.1Sjmcneillstruct mmcpwrseq_emmc_softc { 491.1Sjmcneill device_t sc_dev; 501.1Sjmcneill int sc_phandle; 511.1Sjmcneill struct fdtbus_gpio_pin *sc_pin; 521.1Sjmcneill}; 531.1Sjmcneill 541.1Sjmcneillstatic void 551.1Sjmcneillmmcpwrseq_emmc_reset(device_t dev) 561.1Sjmcneill{ 571.1Sjmcneill struct mmcpwrseq_emmc_softc * const sc = device_private(dev); 581.1Sjmcneill 591.1Sjmcneill fdtbus_gpio_write(sc->sc_pin, 1); 601.1Sjmcneill delay(1); 611.1Sjmcneill fdtbus_gpio_write(sc->sc_pin, 0); 621.1Sjmcneill delay(200); 631.1Sjmcneill} 641.1Sjmcneill 651.1Sjmcneillstatic const struct fdtbus_mmc_pwrseq_func mmcpwrseq_emmc_funcs = { 661.1Sjmcneill .reset = mmcpwrseq_emmc_reset, 671.1Sjmcneill}; 681.1Sjmcneill 691.1Sjmcneillstatic int 701.1Sjmcneillmmcpwrseq_emmc_match(device_t parent, cfdata_t cf, void *aux) 711.1Sjmcneill{ 721.1Sjmcneill struct fdt_attach_args * const faa = aux; 731.1Sjmcneill 741.1Sjmcneill return of_match_compatible(faa->faa_phandle, compatible); 751.1Sjmcneill} 761.1Sjmcneill 771.1Sjmcneillstatic void 781.1Sjmcneillmmcpwrseq_emmc_attach(device_t parent, device_t self, void *aux) 791.1Sjmcneill{ 801.1Sjmcneill struct mmcpwrseq_emmc_softc * const sc = device_private(self); 811.1Sjmcneill struct fdt_attach_args * const faa = aux; 821.1Sjmcneill const int phandle = faa->faa_phandle; 831.1Sjmcneill 841.1Sjmcneill sc->sc_dev = self; 851.1Sjmcneill sc->sc_phandle = phandle; 861.1Sjmcneill 871.1Sjmcneill sc->sc_pin = fdtbus_gpio_acquire_index(phandle, "reset-gpios", 0, GPIO_PIN_OUTPUT); 881.1Sjmcneill if (sc->sc_pin == NULL) { 891.1Sjmcneill aprint_error(": couldn't get reset GPIO\n"); 901.1Sjmcneill return; 911.1Sjmcneill } 921.1Sjmcneill 931.1Sjmcneill aprint_naive("\n"); 941.1Sjmcneill aprint_normal(": eMMC hardware reset provider\n"); 951.1Sjmcneill 961.1Sjmcneill fdtbus_register_mmc_pwrseq(self, phandle, &mmcpwrseq_emmc_funcs); 971.1Sjmcneill} 981.1Sjmcneill 991.1Sjmcneillstatic int 1001.1Sjmcneillmmcpwrseq_emmc_detach(device_t self, int flags) 1011.1Sjmcneill{ 1021.1Sjmcneill struct mmcpwrseq_emmc_softc * const sc = device_private(self); 1031.1Sjmcneill 1041.1Sjmcneill if (sc->sc_pin != NULL) 1051.1Sjmcneill mmcpwrseq_emmc_reset(self); 1061.1Sjmcneill 1071.1Sjmcneill return 0; 1081.1Sjmcneill} 1091.1Sjmcneill 1101.1SjmcneillCFATTACH_DECL_NEW(mmcpwrseq_emmc, sizeof(struct mmcpwrseq_emmc_softc), 1111.1Sjmcneill mmcpwrseq_emmc_match, mmcpwrseq_emmc_attach, mmcpwrseq_emmc_detach, NULL); 112