gpio.c revision 1.41
1 /* $NetBSD: gpio.c,v 1.41 2011/09/02 06:50:20 mbalmer Exp $ */ 2 /* $OpenBSD: gpio.c,v 1.6 2006/01/14 12:33:49 grange Exp $ */ 3 4 /* 5 * Copyright (c) 2008, 2009, 2010, 2011 Marc Balmer <marc (at) msys.ch> 6 * Copyright (c) 2004, 2006 Alexander Yurchenko <grange (at) openbsd.org> 7 * 8 * Permission to use, copy, modify, and distribute this software for any 9 * purpose with or without fee is hereby granted, provided that the above 10 * copyright notice and this permission notice appear in all copies. 11 * 12 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 13 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 14 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 15 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 16 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 17 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 18 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 19 */ 20 21 #include <sys/cdefs.h> 22 __KERNEL_RCSID(0, "$NetBSD: gpio.c,v 1.41 2011/09/02 06:50:20 mbalmer Exp $"); 23 24 /* 25 * General Purpose Input/Output framework. 26 */ 27 28 #include <sys/param.h> 29 #include <sys/callout.h> 30 #include <sys/systm.h> 31 #include <sys/conf.h> 32 #include <sys/device.h> 33 #include <sys/fcntl.h> 34 #include <sys/ioctl.h> 35 #include <sys/gpio.h> 36 #include <sys/kernel.h> 37 #include <sys/vnode.h> 38 #include <sys/kmem.h> 39 #include <sys/mutex.h> 40 #include <sys/condvar.h> 41 #include <sys/queue.h> 42 #include <sys/kauth.h> 43 #include <sys/module.h> 44 #include <dev/gpio/gpiovar.h> 45 46 #include "locators.h" 47 48 #ifdef GPIO_DEBUG 49 #define DPRINTFN(n, x) do { if (gpiodebug > (n)) printf x; } while (0) 50 int gpiodebug = 0; 51 #else 52 #define DPRINTFN(n, x) 53 #endif 54 #define DPRINTF(x) DPRINTFN(0, x) 55 56 struct gpio_softc { 57 device_t sc_dev; 58 59 gpio_chipset_tag_t sc_gc; /* GPIO controller */ 60 gpio_pin_t *sc_pins; /* pins array */ 61 int sc_npins; /* number of pins */ 62 63 kmutex_t sc_mtx; 64 kcondvar_t sc_ioctl; /* ioctl in progress */ 65 int sc_ioctl_busy; /* ioctl is busy */ 66 kcondvar_t sc_attach; /* attach/detach in progress */ 67 int sc_attach_busy;/* busy in attach/detach */ 68 LIST_HEAD(, gpio_dev) sc_devs; /* devices */ 69 LIST_HEAD(, gpio_name) sc_names; /* named pins */ 70 }; 71 72 static int gpio_match(device_t, cfdata_t, void *); 73 int gpio_submatch(device_t, cfdata_t, const int *, void *); 74 static void gpio_attach(device_t, device_t, void *); 75 static int gpio_rescan(device_t, const char *, const int *); 76 static void gpio_childdetached(device_t, device_t); 77 static bool gpio_resume(device_t, const pmf_qual_t *); 78 static int gpio_detach(device_t, int); 79 static int gpio_search(device_t, cfdata_t, const int *, void *); 80 static int gpio_print(void *, const char *); 81 static int gpio_pinbyname(struct gpio_softc *, char *); 82 static void gpio_pulse(void *); 83 static int gpio_ioctl(struct gpio_softc *, u_long, void *, int, 84 struct lwp *); 85 86 /* Old API */ 87 static int gpio_ioctl_oapi(struct gpio_softc *, u_long, void *, int, 88 kauth_cred_t); 89 90 CFATTACH_DECL3_NEW(gpio, sizeof(struct gpio_softc), 91 gpio_match, gpio_attach, gpio_detach, NULL, gpio_rescan, 92 gpio_childdetached, DVF_DETACH_SHUTDOWN); 93 94 dev_type_open(gpioopen); 95 dev_type_close(gpioclose); 96 dev_type_ioctl(gpioioctl); 97 dev_type_ioctl(gpioioctl_locked); 98 99 const struct cdevsw gpio_cdevsw = { 100 gpioopen, gpioclose, noread, nowrite, gpioioctl, 101 nostop, notty, nopoll, nommap, nokqfilter, D_OTHER | D_MPSAFE 102 }; 103 104 extern struct cfdriver gpio_cd; 105 106 static int 107 gpio_match(device_t parent, cfdata_t cf, void *aux) 108 { 109 return 1; 110 } 111 112 int 113 gpio_submatch(device_t parent, cfdata_t cf, const int *ip, void *aux) 114 { 115 struct gpio_attach_args *ga = aux; 116 117 if (ga->ga_offset == -1) 118 return 0; 119 120 return strcmp(ga->ga_dvname, cf->cf_name) == 0; 121 } 122 123 static bool 124 gpio_resume(device_t self, const pmf_qual_t *qual) 125 { 126 struct gpio_softc *sc = device_private(self); 127 int pin; 128 129 for (pin = 0; pin < sc->sc_npins; pin++) { 130 gpiobus_pin_ctl(sc->sc_gc, pin, sc->sc_pins[pin].pin_flags); 131 gpiobus_pin_write(sc->sc_gc, pin, sc->sc_pins[pin].pin_state); 132 } 133 return true; 134 } 135 136 static void 137 gpio_childdetached(device_t self, device_t child) 138 { 139 struct gpio_dev *gdev; 140 struct gpio_softc *sc; 141 int error; 142 143 /* 144 * gpio_childetached is serialized because it can be entered in 145 * different ways concurrently, e.g. via the GPIODETACH ioctl and 146 * drvctl(8) or modunload(8). 147 */ 148 sc = device_private(self); 149 error = 0; 150 mutex_enter(&sc->sc_mtx); 151 while (sc->sc_attach_busy) { 152 error = cv_wait_sig(&sc->sc_attach, &sc->sc_mtx); 153 if (error) 154 break; 155 } 156 if (!error) 157 sc->sc_attach_busy = 1; 158 mutex_exit(&sc->sc_mtx); 159 if (error) 160 return; 161 162 LIST_FOREACH(gdev, &sc->sc_devs, sc_next) 163 if (gdev->sc_dev == child) { 164 LIST_REMOVE(gdev, sc_next); 165 kmem_free(gdev, sizeof(struct gpio_dev)); 166 break; 167 } 168 169 mutex_enter(&sc->sc_mtx); 170 sc->sc_attach_busy = 0; 171 cv_signal(&sc->sc_attach); 172 mutex_exit(&sc->sc_mtx); 173 } 174 175 static int 176 gpio_rescan(device_t self, const char *ifattr, const int *locators) 177 { 178 struct gpio_softc *sc = device_private(self); 179 180 config_search_loc(gpio_search, self, ifattr, locators, sc); 181 182 return 0; 183 } 184 185 static void 186 gpio_attach(device_t parent, device_t self, void *aux) 187 { 188 struct gpio_softc *sc = device_private(self); 189 struct gpiobus_attach_args *gba = aux; 190 int pin; 191 sc->sc_dev = self; 192 sc->sc_gc = gba->gba_gc; 193 sc->sc_pins = gba->gba_pins; 194 sc->sc_npins = gba->gba_npins; 195 196 printf(": %d pins\n", sc->sc_npins); 197 198 for (pin = 0; pin < sc->sc_npins; pin++) { 199 callout_init(&sc->sc_pins[pin].pin_pulse, CALLOUT_MPSAFE); 200 callout_setfunc(&sc->sc_pins[pin].pin_pulse, gpio_pulse, 201 &sc->sc_pins[pin]); 202 } 203 if (!pmf_device_register(self, NULL, gpio_resume)) 204 aprint_error_dev(self, "couldn't establish power handler\n"); 205 mutex_init(&sc->sc_mtx, MUTEX_DEFAULT, IPL_VM); 206 cv_init(&sc->sc_ioctl, "gpioctl"); 207 cv_init(&sc->sc_attach, "gpioatch"); 208 /* 209 * Attach all devices that can be connected to the GPIO pins 210 * described in the kernel configuration file. 211 */ 212 gpio_rescan(self, "gpio", NULL); 213 } 214 215 static int 216 gpio_detach(device_t self, int flags) 217 { 218 struct gpio_softc *sc; 219 int pin, rc; 220 221 sc = device_private(self); 222 223 for (pin = 0; pin < sc->sc_npins; pin++) { 224 if (sc->sc_pins[pin].pin_state & GPIO_PIN_PULSE) { 225 callout_halt(&sc->sc_pins[pin].pin_pulse, NULL); 226 callout_destroy(&sc->sc_pins[pin].pin_pulse); 227 sc->sc_pins[pin].pin_state &= ~GPIO_PIN_PULSE; 228 } 229 } 230 231 if ((rc = config_detach_children(self, flags)) != 0) 232 return rc; 233 mutex_destroy(&sc->sc_mtx); 234 cv_destroy(&sc->sc_ioctl); 235 #if 0 236 int maj, mn; 237 238 /* Locate the major number */ 239 for (maj = 0; maj < nchrdev; maj++) 240 if (cdevsw[maj].d_open == gpioopen) 241 break; 242 243 /* Nuke the vnodes for any open instances (calls close) */ 244 mn = device_unit(self); 245 vdevgone(maj, mn, mn, VCHR); 246 #endif 247 return 0; 248 } 249 250 static int 251 gpio_search(device_t parent, cfdata_t cf, const int *ldesc, void *aux) 252 { 253 struct gpio_attach_args ga; 254 255 ga.ga_gpio = aux; 256 ga.ga_offset = cf->cf_loc[GPIOCF_OFFSET]; 257 ga.ga_mask = cf->cf_loc[GPIOCF_MASK]; 258 259 if (config_match(parent, cf, &ga) > 0) 260 config_attach(parent, cf, &ga, gpio_print); 261 262 return 0; 263 } 264 265 int 266 gpio_print(void *aux, const char *pnp) 267 { 268 struct gpio_attach_args *ga = aux; 269 int i; 270 271 printf(" pins"); 272 for (i = 0; i < 32; i++) 273 if (ga->ga_mask & (1 << i)) 274 printf(" %d", ga->ga_offset + i); 275 276 return UNCONF; 277 } 278 279 int 280 gpiobus_print(void *aux, const char *pnp) 281 { 282 #if 0 283 struct gpiobus_attach_args *gba = aux; 284 #endif 285 if (pnp != NULL) 286 aprint_normal("gpiobus at %s", pnp); 287 288 return UNCONF; 289 } 290 291 /* return 1 if all pins can be mapped, 0 if not */ 292 int 293 gpio_pin_can_map(void *gpio, int offset, uint32_t mask) 294 { 295 struct gpio_softc *sc = gpio; 296 int npins, pin, i; 297 298 npins = gpio_npins(mask); 299 if (npins > sc->sc_npins) 300 return 0; 301 302 for (npins = 0, i = 0; i < 32; i++) 303 if (mask & (1 << i)) { 304 pin = offset + i; 305 if (pin < 0 || pin >= sc->sc_npins) 306 return 0; 307 if (sc->sc_pins[pin].pin_mapped) 308 return 0; 309 } 310 311 return 1; 312 } 313 314 int 315 gpio_pin_map(void *gpio, int offset, uint32_t mask, struct gpio_pinmap *map) 316 { 317 struct gpio_softc *sc = gpio; 318 int npins, pin, i; 319 320 npins = gpio_npins(mask); 321 if (npins > sc->sc_npins) 322 return 1; 323 324 for (npins = 0, i = 0; i < 32; i++) 325 if (mask & (1 << i)) { 326 pin = offset + i; 327 if (pin < 0 || pin >= sc->sc_npins) 328 return 1; 329 if (sc->sc_pins[pin].pin_mapped) 330 return 1; 331 sc->sc_pins[pin].pin_mapped = 1; 332 map->pm_map[npins++] = pin; 333 } 334 map->pm_size = npins; 335 336 return 0; 337 } 338 339 void 340 gpio_pin_unmap(void *gpio, struct gpio_pinmap *map) 341 { 342 struct gpio_softc *sc = gpio; 343 int pin, i; 344 345 for (i = 0; i < map->pm_size; i++) { 346 pin = map->pm_map[i]; 347 sc->sc_pins[pin].pin_mapped = 0; 348 } 349 } 350 351 int 352 gpio_pin_read(void *gpio, struct gpio_pinmap *map, int pin) 353 { 354 struct gpio_softc *sc = gpio; 355 356 return gpiobus_pin_read(sc->sc_gc, map->pm_map[pin]); 357 } 358 359 void 360 gpio_pin_write(void *gpio, struct gpio_pinmap *map, int pin, int value) 361 { 362 struct gpio_softc *sc = gpio; 363 364 gpiobus_pin_write(sc->sc_gc, map->pm_map[pin], value); 365 sc->sc_pins[map->pm_map[pin]].pin_state = value; 366 } 367 368 void 369 gpio_pin_ctl(void *gpio, struct gpio_pinmap *map, int pin, int flags) 370 { 371 struct gpio_softc *sc = gpio; 372 373 return gpiobus_pin_ctl(sc->sc_gc, map->pm_map[pin], flags); 374 } 375 376 int 377 gpio_pin_caps(void *gpio, struct gpio_pinmap *map, int pin) 378 { 379 struct gpio_softc *sc = gpio; 380 381 return sc->sc_pins[map->pm_map[pin]].pin_caps; 382 } 383 384 int 385 gpio_npins(uint32_t mask) 386 { 387 int npins, i; 388 389 for (npins = 0, i = 0; i < 32; i++) 390 if (mask & (1 << i)) 391 npins++; 392 393 return npins; 394 } 395 396 int 397 gpio_lock(void *data) 398 { 399 struct gpio_softc *sc; 400 int error; 401 402 error = 0; 403 sc = (struct gpio_softc *)data; 404 mutex_enter(&sc->sc_mtx); 405 while (sc->sc_ioctl_busy) { 406 error = cv_wait_sig(&sc->sc_ioctl, &sc->sc_mtx); 407 if (error) 408 break; 409 } 410 if (!error) 411 sc->sc_ioctl_busy = 1; 412 mutex_exit(&sc->sc_mtx); 413 return error; 414 } 415 416 void 417 gpio_unlock(void *data) 418 { 419 struct gpio_softc *sc; 420 421 sc = (struct gpio_softc *)data; 422 mutex_enter(&sc->sc_mtx); 423 sc->sc_ioctl_busy = 0; 424 cv_signal(&sc->sc_ioctl); 425 mutex_exit(&sc->sc_mtx); 426 } 427 428 int 429 gpioopen(dev_t dev, int flag, int mode, struct lwp *l) 430 { 431 struct gpio_softc *sc; 432 433 sc = device_lookup_private(&gpio_cd, minor(dev)); 434 if (sc == NULL) 435 return ENXIO; 436 437 return gpiobus_open(sc->sc_gc, sc->sc_dev); 438 } 439 440 int 441 gpioclose(dev_t dev, int flag, int mode, struct lwp *l) 442 { 443 struct gpio_softc *sc; 444 445 sc = device_lookup_private(&gpio_cd, minor(dev)); 446 gpiobus_close(sc->sc_gc, sc->sc_dev); 447 return 0; 448 } 449 450 static int 451 gpio_pinbyname(struct gpio_softc *sc, char *gp_name) 452 { 453 struct gpio_name *nm; 454 455 LIST_FOREACH(nm, &sc->sc_names, gp_next) 456 if (!strcmp(nm->gp_name, gp_name)) 457 return nm->gp_pin; 458 return -1; 459 } 460 461 static void 462 gpio_pulse(void *arg) 463 { 464 struct gpio_pin *pin; 465 466 pin = (struct gpio_pin *)arg; 467 if ((pin->pin_state & GPIO_PIN_PULSE) == 0) 468 return; 469 470 if (pin->pin_state & GPIO_PIN_HIGH) { 471 gpiobus_pin_write(pin->pin_gc, pin->pin_num, GPIO_PIN_LOW); 472 pin->pin_state &= ~GPIO_PIN_HIGH; 473 callout_schedule(&pin->pin_pulse, pin->pin_ticks_off); 474 } else { 475 gpiobus_pin_write(pin->pin_gc, pin->pin_num, GPIO_PIN_HIGH); 476 pin->pin_state |= GPIO_PIN_HIGH; 477 callout_schedule(&pin->pin_pulse, pin->pin_ticks_on); 478 } 479 } 480 481 int 482 gpioioctl(dev_t dev, u_long cmd, void *data, int flag, struct lwp *l) 483 { 484 int error; 485 struct gpio_softc *sc; 486 487 sc = device_lookup_private(&gpio_cd, minor(dev)); 488 489 error = gpio_lock(sc); 490 if (error) 491 return error; 492 493 error = gpio_ioctl(sc, cmd, data, flag, l); 494 gpio_unlock(sc); 495 return error; 496 } 497 498 static int 499 gpio_ioctl(struct gpio_softc *sc, u_long cmd, void *data, int flag, 500 struct lwp *l) 501 { 502 gpio_chipset_tag_t gc; 503 struct gpio_info *info; 504 struct gpio_attach *attach; 505 struct gpio_attach_args ga; 506 struct gpio_dev *gdev; 507 struct gpio_req *req; 508 struct gpio_pulse *pulse; 509 struct gpio_name *nm; 510 struct gpio_set *set; 511 struct gpio_pin *gpin; 512 device_t dv; 513 cfdata_t cf; 514 kauth_cred_t cred; 515 int locs[GPIOCF_NLOCS]; 516 int error, pin, value, flags, npins; 517 518 gc = sc->sc_gc; 519 520 if (cmd != GPIOINFO && !device_is_active(sc->sc_dev)) { 521 DPRINTF(("%s: device is not active\n", 522 device_xname(sc->sc_dev))); 523 return EBUSY; 524 } 525 526 cred = kauth_cred_get(); 527 528 switch (cmd) { 529 case GPIOINFO: 530 info = (struct gpio_info *)data; 531 if (!kauth_authorize_device(cred, KAUTH_DEVICE_GPIO_PINSET, 532 NULL, NULL, NULL, NULL)) 533 info->gpio_npins = sc->sc_npins; 534 else { 535 for (pin = npins = 0; pin < sc->sc_npins; pin++) 536 if (sc->sc_pins[pin].pin_flags & GPIO_PIN_SET) 537 ++npins; 538 info->gpio_npins = npins; 539 } 540 break; 541 case GPIOREAD: 542 req = (struct gpio_req *)data; 543 544 if (req->gp_name[0] != '\0') 545 pin = gpio_pinbyname(sc, req->gp_name); 546 else 547 pin = req->gp_pin; 548 549 if (pin < 0 || pin >= sc->sc_npins) 550 return EINVAL; 551 552 if (!(sc->sc_pins[pin].pin_flags & GPIO_PIN_SET) && 553 kauth_authorize_device(cred, KAUTH_DEVICE_GPIO_PINSET, 554 NULL, NULL, NULL, NULL)) 555 return EPERM; 556 557 /* return read value */ 558 req->gp_value = gpiobus_pin_read(gc, pin); 559 break; 560 case GPIOWRITE: 561 if ((flag & FWRITE) == 0) 562 return EBADF; 563 564 req = (struct gpio_req *)data; 565 566 if (req->gp_name[0] != '\0') 567 pin = gpio_pinbyname(sc, req->gp_name); 568 else 569 pin = req->gp_pin; 570 571 if (pin < 0 || pin >= sc->sc_npins) 572 return EINVAL; 573 574 if (sc->sc_pins[pin].pin_mapped) 575 return EBUSY; 576 577 if (!(sc->sc_pins[pin].pin_flags & GPIO_PIN_SET) && 578 kauth_authorize_device(cred, KAUTH_DEVICE_GPIO_PINSET, 579 NULL, NULL, NULL, NULL)) 580 return EPERM; 581 582 value = req->gp_value; 583 if (value != GPIO_PIN_LOW && value != GPIO_PIN_HIGH) 584 return EINVAL; 585 586 if (sc->sc_pins[pin].pin_state & GPIO_PIN_PULSE) { 587 callout_halt(&sc->sc_pins[pin].pin_pulse, NULL); 588 sc->sc_pins[pin].pin_state &= ~GPIO_PIN_PULSE; 589 } 590 gpiobus_pin_write(gc, pin, value); 591 /* return old value */ 592 req->gp_value = sc->sc_pins[pin].pin_state; 593 /* update current value */ 594 sc->sc_pins[pin].pin_state = value; 595 break; 596 case GPIOPULSE: 597 if ((flag & FWRITE) == 0) 598 return EBADF; 599 600 pulse = (struct gpio_pulse *)data; 601 if (pulse->gp_name[0] != '\0') 602 pin = gpio_pinbyname(sc, pulse->gp_name); 603 else 604 pin = pulse->gp_pin; 605 606 if (pin < 0 || pin >= sc->sc_npins) 607 return EINVAL; 608 609 gpin = &sc->sc_pins[pin]; 610 if (gpin->pin_mapped) 611 return EBUSY; 612 613 if (!(gpin->pin_flags & GPIO_PIN_SET) && 614 kauth_authorize_device(cred, KAUTH_DEVICE_GPIO_PINSET, 615 NULL, NULL, NULL, NULL)) 616 return EPERM; 617 618 if (gpin->pin_flags & GPIO_PIN_PULSATE) { 619 gpiobus_pin_write(gc, pin, GPIO_PIN_HIGH); 620 gpin->pin_state = GPIO_PIN_PULSE; 621 return 0; 622 } 623 624 if (gpin->pin_state & GPIO_PIN_PULSE) 625 callout_halt(&gpin->pin_pulse, NULL); 626 627 gpin->pin_gc = gc; 628 629 gpin->pin_ticks_on = tvtohz(&pulse->gp_pulse_on); 630 gpin->pin_ticks_off = tvtohz(&pulse->gp_pulse_off); 631 if (gpin->pin_ticks_on == 0 || gpin->pin_ticks_off == 0) { 632 gpin->pin_ticks_on = hz / 2; 633 gpin->pin_ticks_off = hz / 2; 634 } 635 gpiobus_pin_write(gc, pin, GPIO_PIN_HIGH); 636 gpin->pin_state = GPIO_PIN_HIGH | GPIO_PIN_PULSE; 637 callout_schedule(&gpin->pin_pulse, gpin->pin_ticks_on); 638 break; 639 case GPIOTOGGLE: 640 if ((flag & FWRITE) == 0) 641 return EBADF; 642 643 req = (struct gpio_req *)data; 644 645 if (req->gp_name[0] != '\0') 646 pin = gpio_pinbyname(sc, req->gp_name); 647 else 648 pin = req->gp_pin; 649 650 if (pin < 0 || pin >= sc->sc_npins) 651 return EINVAL; 652 653 if (sc->sc_pins[pin].pin_mapped) 654 return EBUSY; 655 656 if (!(sc->sc_pins[pin].pin_flags & GPIO_PIN_SET) && 657 kauth_authorize_device(cred, KAUTH_DEVICE_GPIO_PINSET, 658 NULL, NULL, NULL, NULL)) 659 return EPERM; 660 661 value = (sc->sc_pins[pin].pin_state == GPIO_PIN_LOW ? 662 GPIO_PIN_HIGH : GPIO_PIN_LOW); 663 gpiobus_pin_write(gc, pin, value); 664 /* return old value */ 665 req->gp_value = sc->sc_pins[pin].pin_state; 666 /* update current value */ 667 sc->sc_pins[pin].pin_state = value; 668 break; 669 case GPIOATTACH: 670 if (kauth_authorize_device(cred, KAUTH_DEVICE_GPIO_PINSET, 671 NULL, NULL, NULL, NULL)) 672 return EPERM; 673 674 attach = (struct gpio_attach *)data; 675 676 /* do not try to attach if the pins are already mapped */ 677 if (!gpio_pin_can_map(sc, attach->ga_offset, attach->ga_mask)) 678 return EBUSY; 679 680 error = 0; 681 mutex_enter(&sc->sc_mtx); 682 while (sc->sc_attach_busy) { 683 error = cv_wait_sig(&sc->sc_attach, &sc->sc_mtx); 684 if (error) 685 break; 686 } 687 if (!error) 688 sc->sc_attach_busy = 1; 689 mutex_exit(&sc->sc_mtx); 690 if (error) 691 return EBUSY; 692 693 ga.ga_gpio = sc; 694 ga.ga_dvname = attach->ga_dvname; 695 ga.ga_offset = attach->ga_offset; 696 ga.ga_mask = attach->ga_mask; 697 DPRINTF(("%s: attach %s with offset %d and mask " 698 "0x%02x\n", device_xname(sc->sc_dev), ga.ga_dvname, 699 ga.ga_offset, ga.ga_mask)); 700 701 locs[GPIOCF_OFFSET] = ga.ga_offset; 702 locs[GPIOCF_MASK] = ga.ga_mask; 703 704 cf = config_search_loc(NULL, sc->sc_dev, "gpio", locs, &ga); 705 if (cf != NULL) { 706 dv = config_attach_loc(sc->sc_dev, cf, locs, &ga, 707 gpiobus_print); 708 if (dv != NULL) { 709 gdev = kmem_alloc(sizeof(struct gpio_dev), 710 KM_SLEEP); 711 gdev->sc_dev = dv; 712 LIST_INSERT_HEAD(&sc->sc_devs, gdev, sc_next); 713 } else 714 error = EINVAL; 715 } else 716 error = EINVAL; 717 mutex_enter(&sc->sc_mtx); 718 sc->sc_attach_busy = 0; 719 cv_signal(&sc->sc_attach); 720 mutex_exit(&sc->sc_mtx); 721 return error; 722 case GPIODETACH: 723 if (kauth_authorize_device(cred, KAUTH_DEVICE_GPIO_PINSET, 724 NULL, NULL, NULL, NULL)) 725 return EPERM; 726 727 error = 0; 728 mutex_enter(&sc->sc_mtx); 729 while (sc->sc_attach_busy) { 730 error = cv_wait_sig(&sc->sc_attach, &sc->sc_mtx); 731 if (error) 732 break; 733 } 734 if (!error) 735 sc->sc_attach_busy = 1; 736 mutex_exit(&sc->sc_mtx); 737 if (error) 738 return EBUSY; 739 740 attach = (struct gpio_attach *)data; 741 LIST_FOREACH(gdev, &sc->sc_devs, sc_next) { 742 if (strcmp(device_xname(gdev->sc_dev), 743 attach->ga_dvname) == 0) { 744 mutex_enter(&sc->sc_mtx); 745 sc->sc_attach_busy = 0; 746 cv_signal(&sc->sc_attach); 747 mutex_exit(&sc->sc_mtx); 748 749 if (config_detach(gdev->sc_dev, 0) == 0) 750 return 0; 751 break; 752 } 753 } 754 if (gdev == NULL) { 755 mutex_enter(&sc->sc_mtx); 756 sc->sc_attach_busy = 0; 757 cv_signal(&sc->sc_attach); 758 mutex_exit(&sc->sc_mtx); 759 } 760 return EINVAL; 761 case GPIOSET: 762 if (kauth_authorize_device(cred, KAUTH_DEVICE_GPIO_PINSET, 763 NULL, NULL, NULL, NULL)) 764 return EPERM; 765 766 set = (struct gpio_set *)data; 767 768 if (set->gp_name[0] != '\0') 769 pin = gpio_pinbyname(sc, set->gp_name); 770 else 771 pin = set->gp_pin; 772 773 if (pin < 0 || pin >= sc->sc_npins) 774 return EINVAL; 775 flags = set->gp_flags; 776 777 /* check that the controller supports all requested flags */ 778 if ((flags & sc->sc_pins[pin].pin_caps) != flags) 779 return ENODEV; 780 flags = set->gp_flags | GPIO_PIN_SET; 781 782 set->gp_caps = sc->sc_pins[pin].pin_caps; 783 /* return old value */ 784 set->gp_flags = sc->sc_pins[pin].pin_flags; 785 if (flags > 0) { 786 gpiobus_pin_ctl(gc, pin, flags); 787 /* update current value */ 788 sc->sc_pins[pin].pin_flags = flags; 789 } 790 791 /* rename pin or new pin? */ 792 if (set->gp_name2[0] != '\0') { 793 struct gpio_name *gnm; 794 795 gnm = NULL; 796 LIST_FOREACH(nm, &sc->sc_names, gp_next) { 797 if (!strcmp(nm->gp_name, set->gp_name2) && 798 nm->gp_pin != pin) 799 return EINVAL; /* duplicate name */ 800 if (nm->gp_pin == pin) 801 gnm = nm; 802 } 803 if (gnm != NULL) 804 strlcpy(gnm->gp_name, set->gp_name2, 805 sizeof(gnm->gp_name)); 806 else { 807 nm = kmem_alloc(sizeof(struct gpio_name), 808 KM_SLEEP); 809 strlcpy(nm->gp_name, set->gp_name2, 810 sizeof(nm->gp_name)); 811 nm->gp_pin = set->gp_pin; 812 LIST_INSERT_HEAD(&sc->sc_names, nm, gp_next); 813 } 814 } 815 break; 816 case GPIOUNSET: 817 if (kauth_authorize_device(cred, KAUTH_DEVICE_GPIO_PINSET, 818 NULL, NULL, NULL, NULL)) 819 return EPERM; 820 821 set = (struct gpio_set *)data; 822 if (set->gp_name[0] != '\0') 823 pin = gpio_pinbyname(sc, set->gp_name); 824 else 825 pin = set->gp_pin; 826 827 if (pin < 0 || pin >= sc->sc_npins) 828 return EINVAL; 829 if (sc->sc_pins[pin].pin_mapped) 830 return EBUSY; 831 if (!(sc->sc_pins[pin].pin_flags & GPIO_PIN_SET)) 832 return EINVAL; 833 834 LIST_FOREACH(nm, &sc->sc_names, gp_next) { 835 if (nm->gp_pin == pin) { 836 LIST_REMOVE(nm, gp_next); 837 kmem_free(nm, sizeof(struct gpio_name)); 838 break; 839 } 840 } 841 sc->sc_pins[pin].pin_flags &= ~GPIO_PIN_SET; 842 break; 843 default: 844 /* Try the old API */ 845 DPRINTF(("%s: trying the old API\n", device_xname(sc->sc_dev))); 846 return gpio_ioctl_oapi(sc, cmd, data, flag, cred); 847 } 848 return 0; 849 } 850 851 static int 852 gpio_ioctl_oapi(struct gpio_softc *sc, u_long cmd, void *data, int flag, 853 kauth_cred_t cred) 854 { 855 gpio_chipset_tag_t gc; 856 struct gpio_pin_op *op; 857 struct gpio_pin_ctl *ctl; 858 int pin, value, flags; 859 860 gc = sc->sc_gc; 861 862 switch (cmd) { 863 case GPIOPINREAD: 864 op = (struct gpio_pin_op *)data; 865 866 pin = op->gp_pin; 867 868 if (pin < 0 || pin >= sc->sc_npins) 869 return EINVAL; 870 871 if (!(sc->sc_pins[pin].pin_flags & GPIO_PIN_SET) && 872 kauth_authorize_device(cred, KAUTH_DEVICE_GPIO_PINSET, 873 NULL, NULL, NULL, NULL)) 874 return EPERM; 875 876 /* return read value */ 877 op->gp_value = gpiobus_pin_read(gc, pin); 878 break; 879 case GPIOPINWRITE: 880 if ((flag & FWRITE) == 0) 881 return EBADF; 882 883 op = (struct gpio_pin_op *)data; 884 885 pin = op->gp_pin; 886 887 if (pin < 0 || pin >= sc->sc_npins) 888 return EINVAL; 889 890 if (sc->sc_pins[pin].pin_mapped) 891 return EBUSY; 892 893 if (!(sc->sc_pins[pin].pin_flags & GPIO_PIN_SET) && 894 kauth_authorize_device(cred, KAUTH_DEVICE_GPIO_PINSET, 895 NULL, NULL, NULL, NULL)) 896 return EPERM; 897 898 value = op->gp_value; 899 if (value != GPIO_PIN_LOW && value != GPIO_PIN_HIGH) 900 return EINVAL; 901 902 gpiobus_pin_write(gc, pin, value); 903 /* return old value */ 904 op->gp_value = sc->sc_pins[pin].pin_state; 905 /* update current value */ 906 sc->sc_pins[pin].pin_state = value; 907 break; 908 case GPIOPINTOGGLE: 909 if ((flag & FWRITE) == 0) 910 return EBADF; 911 912 op = (struct gpio_pin_op *)data; 913 914 pin = op->gp_pin; 915 916 if (pin < 0 || pin >= sc->sc_npins) 917 return EINVAL; 918 919 if (sc->sc_pins[pin].pin_mapped) 920 return EBUSY; 921 922 if (!(sc->sc_pins[pin].pin_flags & GPIO_PIN_SET) && 923 kauth_authorize_device(cred, KAUTH_DEVICE_GPIO_PINSET, 924 NULL, NULL, NULL, NULL)) 925 return EPERM; 926 927 value = (sc->sc_pins[pin].pin_state == GPIO_PIN_LOW ? 928 GPIO_PIN_HIGH : GPIO_PIN_LOW); 929 gpiobus_pin_write(gc, pin, value); 930 /* return old value */ 931 op->gp_value = sc->sc_pins[pin].pin_state; 932 /* update current value */ 933 sc->sc_pins[pin].pin_state = value; 934 break; 935 case GPIOPINCTL: 936 ctl = (struct gpio_pin_ctl *) data; 937 938 if (kauth_authorize_device(cred, KAUTH_DEVICE_GPIO_PINSET, 939 NULL, NULL, NULL, NULL)) 940 return EPERM; 941 942 pin = ctl->gp_pin; 943 944 if (pin < 0 || pin >= sc->sc_npins) 945 return EINVAL; 946 if (sc->sc_pins[pin].pin_mapped) 947 return EBUSY; 948 flags = ctl->gp_flags; 949 950 /* check that the controller supports all requested flags */ 951 if ((flags & sc->sc_pins[pin].pin_caps) != flags) 952 return ENODEV; 953 954 ctl->gp_caps = sc->sc_pins[pin].pin_caps; 955 /* return old value */ 956 ctl->gp_flags = sc->sc_pins[pin].pin_flags; 957 if (flags > 0) { 958 gpiobus_pin_ctl(gc, pin, flags); 959 /* update current value */ 960 sc->sc_pins[pin].pin_flags = flags; 961 } 962 break; 963 default: 964 return ENOTTY; 965 } 966 return 0; 967 } 968 969 MODULE(MODULE_CLASS_DRIVER, gpio, NULL); 970 971 #ifdef _MODULE 972 #include "ioconf.c" 973 #endif 974 975 static int 976 gpio_modcmd(modcmd_t cmd, void *opaque) 977 { 978 #ifdef _MODULE 979 devmajor_t cmajor = NODEVMAJOR, bmajor = NODEVMAJOR; 980 int error; 981 #endif 982 switch (cmd) { 983 case MODULE_CMD_INIT: 984 #ifdef _MODULE 985 error = config_init_component(cfdriver_ioconf_gpio, 986 cfattach_ioconf_gpio, cfdata_ioconf_gpio); 987 if (error) { 988 aprint_error("%s: unable to init component\n", 989 gpio_cd.cd_name); 990 return error; 991 } 992 error = devsw_attach(gpio_cd.cd_name, NULL, &bmajor, 993 &gpio_cdevsw, &cmajor); 994 if (error) { 995 aprint_error("%s: unable to register devsw\n", 996 gpio_cd.cd_name); 997 return config_fini_component(cfdriver_ioconf_gpio, 998 cfattach_ioconf_gpio, cfdata_ioconf_gpio); 999 } 1000 #endif 1001 return 0; 1002 case MODULE_CMD_FINI: 1003 #ifdef _MODULE 1004 config_fini_component(cfdriver_ioconf_gpio, 1005 cfattach_ioconf_gpio, cfdata_ioconf_gpio); 1006 devsw_detach(NULL, &gpio_cdevsw); 1007 #endif 1008 return 0; 1009 default: 1010 return ENOTTY; 1011 } 1012 } 1013
Indexes created Tue Sep 23 02:09:52 GMT 2025