gpio.c revision 1.47
1 /* $NetBSD: gpio.c,v 1.47 2011/11/13 13:20:02 mbalmer Exp $ */ 2 /* $OpenBSD: gpio.c,v 1.6 2006/01/14 12:33:49 grange Exp $ */ 3 4 /* 5 * Copyright (c) 2008, 2009, 2010, 2011 Marc Balmer <marc (at) msys.ch> 6 * Copyright (c) 2004, 2006 Alexander Yurchenko <grange (at) openbsd.org> 7 * 8 * Permission to use, copy, modify, and distribute this software for any 9 * purpose with or without fee is hereby granted, provided that the above 10 * copyright notice and this permission notice appear in all copies. 11 * 12 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 13 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 14 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 15 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 16 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 17 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 18 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 19 */ 20 21 #include <sys/cdefs.h> 22 __KERNEL_RCSID(0, "$NetBSD: gpio.c,v 1.47 2011/11/13 13:20:02 mbalmer Exp $"); 23 24 /* 25 * General Purpose Input/Output framework. 26 */ 27 28 #include <sys/param.h> 29 #include <sys/callout.h> 30 #include <sys/systm.h> 31 #include <sys/conf.h> 32 #include <sys/device.h> 33 #include <sys/fcntl.h> 34 #include <sys/ioctl.h> 35 #include <sys/gpio.h> 36 #include <sys/kernel.h> 37 #include <sys/vnode.h> 38 #include <sys/kmem.h> 39 #include <sys/mutex.h> 40 #include <sys/condvar.h> 41 #include <sys/queue.h> 42 #include <sys/kauth.h> 43 #include <sys/module.h> 44 #include <dev/gpio/gpiovar.h> 45 46 #include "locators.h" 47 48 #ifdef GPIO_DEBUG 49 #define DPRINTFN(n, x) do { if (gpiodebug > (n)) printf x; } while (0) 50 int gpiodebug = 0; 51 #else 52 #define DPRINTFN(n, x) 53 #endif 54 #define DPRINTF(x) DPRINTFN(0, x) 55 56 struct gpio_softc { 57 device_t sc_dev; 58 59 gpio_chipset_tag_t sc_gc; /* GPIO controller */ 60 gpio_pin_t *sc_pins; /* pins array */ 61 int sc_npins; /* number of pins */ 62 63 kmutex_t sc_mtx; 64 kcondvar_t sc_ioctl; /* ioctl in progress */ 65 int sc_ioctl_busy; /* ioctl is busy */ 66 kcondvar_t sc_attach; /* attach/detach in progress */ 67 int sc_attach_busy;/* busy in attach/detach */ 68 #ifdef COMPAT_50 69 LIST_HEAD(, gpio_dev) sc_devs; /* devices */ 70 #endif 71 LIST_HEAD(, gpio_name) sc_names; /* named pins */ 72 }; 73 74 static int gpio_match(device_t, cfdata_t, void *); 75 int gpio_submatch(device_t, cfdata_t, const int *, void *); 76 static void gpio_attach(device_t, device_t, void *); 77 static int gpio_rescan(device_t, const char *, const int *); 78 static void gpio_childdetached(device_t, device_t); 79 static bool gpio_resume(device_t, const pmf_qual_t *); 80 static int gpio_detach(device_t, int); 81 static int gpio_search(device_t, cfdata_t, const int *, void *); 82 static int gpio_print(void *, const char *); 83 static int gpio_pinbyname(struct gpio_softc *, char *); 84 static int gpio_ioctl(struct gpio_softc *, u_long, void *, int, 85 struct lwp *); 86 87 #ifdef COMPAT_50 88 /* Old API */ 89 static int gpio_ioctl_oapi(struct gpio_softc *, u_long, void *, int, 90 kauth_cred_t); 91 #endif 92 93 CFATTACH_DECL3_NEW(gpio, sizeof(struct gpio_softc), 94 gpio_match, gpio_attach, gpio_detach, NULL, gpio_rescan, 95 gpio_childdetached, DVF_DETACH_SHUTDOWN); 96 97 dev_type_open(gpioopen); 98 dev_type_close(gpioclose); 99 dev_type_ioctl(gpioioctl); 100 dev_type_ioctl(gpioioctl_locked); 101 102 const struct cdevsw gpio_cdevsw = { 103 gpioopen, gpioclose, noread, nowrite, gpioioctl, 104 nostop, notty, nopoll, nommap, nokqfilter, D_OTHER | D_MPSAFE 105 }; 106 107 extern struct cfdriver gpio_cd; 108 109 static int 110 gpio_match(device_t parent, cfdata_t cf, void *aux) 111 { 112 return 1; 113 } 114 115 int 116 gpio_submatch(device_t parent, cfdata_t cf, const int *ip, void *aux) 117 { 118 struct gpio_attach_args *ga = aux; 119 120 if (ga->ga_offset == -1) 121 return 0; 122 123 return strcmp(ga->ga_dvname, cf->cf_name) == 0; 124 } 125 126 static bool 127 gpio_resume(device_t self, const pmf_qual_t *qual) 128 { 129 struct gpio_softc *sc = device_private(self); 130 int pin; 131 132 for (pin = 0; pin < sc->sc_npins; pin++) { 133 gpiobus_pin_ctl(sc->sc_gc, pin, sc->sc_pins[pin].pin_flags); 134 gpiobus_pin_write(sc->sc_gc, pin, sc->sc_pins[pin].pin_state); 135 } 136 return true; 137 } 138 139 static void 140 gpio_childdetached(device_t self, device_t child) 141 { 142 #ifdef COMPAT_50 143 struct gpio_dev *gdev; 144 struct gpio_softc *sc; 145 int error; 146 147 /* 148 * gpio_childetached is serialized because it can be entered in 149 * different ways concurrently, e.g. via the GPIODETACH ioctl and 150 * drvctl(8) or modunload(8). 151 */ 152 sc = device_private(self); 153 error = 0; 154 mutex_enter(&sc->sc_mtx); 155 while (sc->sc_attach_busy) { 156 error = cv_wait_sig(&sc->sc_attach, &sc->sc_mtx); 157 if (error) 158 break; 159 } 160 if (!error) 161 sc->sc_attach_busy = 1; 162 mutex_exit(&sc->sc_mtx); 163 if (error) 164 return; 165 166 LIST_FOREACH(gdev, &sc->sc_devs, sc_next) 167 if (gdev->sc_dev == child) { 168 LIST_REMOVE(gdev, sc_next); 169 kmem_free(gdev, sizeof(struct gpio_dev)); 170 break; 171 } 172 173 mutex_enter(&sc->sc_mtx); 174 sc->sc_attach_busy = 0; 175 cv_signal(&sc->sc_attach); 176 mutex_exit(&sc->sc_mtx); 177 #endif 178 } 179 180 static int 181 gpio_rescan(device_t self, const char *ifattr, const int *locators) 182 { 183 struct gpio_softc *sc = device_private(self); 184 185 config_search_loc(gpio_search, self, ifattr, locators, sc); 186 187 return 0; 188 } 189 190 static void 191 gpio_attach(device_t parent, device_t self, void *aux) 192 { 193 struct gpio_softc *sc = device_private(self); 194 struct gpiobus_attach_args *gba = aux; 195 196 sc->sc_dev = self; 197 sc->sc_gc = gba->gba_gc; 198 sc->sc_pins = gba->gba_pins; 199 sc->sc_npins = gba->gba_npins; 200 201 printf(": %d pins\n", sc->sc_npins); 202 203 if (!pmf_device_register(self, NULL, gpio_resume)) 204 aprint_error_dev(self, "couldn't establish power handler\n"); 205 mutex_init(&sc->sc_mtx, MUTEX_DEFAULT, IPL_VM); 206 cv_init(&sc->sc_ioctl, "gpioctl"); 207 cv_init(&sc->sc_attach, "gpioatch"); 208 /* 209 * Attach all devices that can be connected to the GPIO pins 210 * described in the kernel configuration file. 211 */ 212 gpio_rescan(self, "gpio", NULL); 213 } 214 215 static int 216 gpio_detach(device_t self, int flags) 217 { 218 struct gpio_softc *sc; 219 int rc; 220 221 sc = device_private(self); 222 223 if ((rc = config_detach_children(self, flags)) != 0) 224 return rc; 225 mutex_destroy(&sc->sc_mtx); 226 cv_destroy(&sc->sc_ioctl); 227 #if 0 228 int maj, mn; 229 230 /* Locate the major number */ 231 for (maj = 0; maj < nchrdev; maj++) 232 if (cdevsw[maj].d_open == gpioopen) 233 break; 234 235 /* Nuke the vnodes for any open instances (calls close) */ 236 mn = device_unit(self); 237 vdevgone(maj, mn, mn, VCHR); 238 #endif 239 return 0; 240 } 241 242 static int 243 gpio_search(device_t parent, cfdata_t cf, const int *ldesc, void *aux) 244 { 245 struct gpio_attach_args ga; 246 247 ga.ga_gpio = aux; 248 ga.ga_offset = cf->cf_loc[GPIOCF_OFFSET]; 249 ga.ga_mask = cf->cf_loc[GPIOCF_MASK]; 250 ga.ga_flags = cf->cf_loc[GPIOCF_FLAG]; 251 252 if (config_match(parent, cf, &ga) > 0) 253 config_attach(parent, cf, &ga, gpio_print); 254 255 return 0; 256 } 257 258 int 259 gpio_print(void *aux, const char *pnp) 260 { 261 struct gpio_attach_args *ga = aux; 262 int i; 263 264 printf(" pins"); 265 for (i = 0; i < 32; i++) 266 if (ga->ga_mask & (1 << i)) 267 printf(" %d", ga->ga_offset + i); 268 269 return UNCONF; 270 } 271 272 int 273 gpiobus_print(void *aux, const char *pnp) 274 { 275 #if 0 276 struct gpiobus_attach_args *gba = aux; 277 #endif 278 if (pnp != NULL) 279 aprint_normal("gpiobus at %s", pnp); 280 281 return UNCONF; 282 } 283 284 /* return 1 if all pins can be mapped, 0 if not */ 285 int 286 gpio_pin_can_map(void *gpio, int offset, uint32_t mask) 287 { 288 struct gpio_softc *sc = gpio; 289 int npins, pin, i; 290 291 npins = gpio_npins(mask); 292 if (npins > sc->sc_npins) 293 return 0; 294 295 for (npins = 0, i = 0; i < 32; i++) 296 if (mask & (1 << i)) { 297 pin = offset + i; 298 if (pin < 0 || pin >= sc->sc_npins) 299 return 0; 300 if (sc->sc_pins[pin].pin_mapped) 301 return 0; 302 } 303 304 return 1; 305 } 306 307 int 308 gpio_pin_map(void *gpio, int offset, uint32_t mask, struct gpio_pinmap *map) 309 { 310 struct gpio_softc *sc = gpio; 311 int npins, pin, i; 312 313 npins = gpio_npins(mask); 314 if (npins > sc->sc_npins) 315 return 1; 316 317 for (npins = 0, i = 0; i < 32; i++) 318 if (mask & (1 << i)) { 319 pin = offset + i; 320 if (pin < 0 || pin >= sc->sc_npins) 321 return 1; 322 if (sc->sc_pins[pin].pin_mapped) 323 return 1; 324 sc->sc_pins[pin].pin_mapped = 1; 325 map->pm_map[npins++] = pin; 326 } 327 map->pm_size = npins; 328 329 return 0; 330 } 331 332 void 333 gpio_pin_unmap(void *gpio, struct gpio_pinmap *map) 334 { 335 struct gpio_softc *sc = gpio; 336 int pin, i; 337 338 for (i = 0; i < map->pm_size; i++) { 339 pin = map->pm_map[i]; 340 sc->sc_pins[pin].pin_mapped = 0; 341 } 342 } 343 344 int 345 gpio_pin_read(void *gpio, struct gpio_pinmap *map, int pin) 346 { 347 struct gpio_softc *sc = gpio; 348 349 return gpiobus_pin_read(sc->sc_gc, map->pm_map[pin]); 350 } 351 352 void 353 gpio_pin_write(void *gpio, struct gpio_pinmap *map, int pin, int value) 354 { 355 struct gpio_softc *sc = gpio; 356 357 gpiobus_pin_write(sc->sc_gc, map->pm_map[pin], value); 358 sc->sc_pins[map->pm_map[pin]].pin_state = value; 359 } 360 361 void 362 gpio_pin_ctl(void *gpio, struct gpio_pinmap *map, int pin, int flags) 363 { 364 struct gpio_softc *sc = gpio; 365 366 return gpiobus_pin_ctl(sc->sc_gc, map->pm_map[pin], flags); 367 } 368 369 int 370 gpio_pin_caps(void *gpio, struct gpio_pinmap *map, int pin) 371 { 372 struct gpio_softc *sc = gpio; 373 374 return sc->sc_pins[map->pm_map[pin]].pin_caps; 375 } 376 377 int 378 gpio_npins(uint32_t mask) 379 { 380 int npins, i; 381 382 for (npins = 0, i = 0; i < 32; i++) 383 if (mask & (1 << i)) 384 npins++; 385 386 return npins; 387 } 388 389 int 390 gpio_lock(void *data) 391 { 392 struct gpio_softc *sc; 393 int error; 394 395 error = 0; 396 sc = data; 397 mutex_enter(&sc->sc_mtx); 398 while (sc->sc_ioctl_busy) { 399 error = cv_wait_sig(&sc->sc_ioctl, &sc->sc_mtx); 400 if (error) 401 break; 402 } 403 if (!error) 404 sc->sc_ioctl_busy = 1; 405 mutex_exit(&sc->sc_mtx); 406 return error; 407 } 408 409 void 410 gpio_unlock(void *data) 411 { 412 struct gpio_softc *sc; 413 414 sc = data; 415 mutex_enter(&sc->sc_mtx); 416 sc->sc_ioctl_busy = 0; 417 cv_signal(&sc->sc_ioctl); 418 mutex_exit(&sc->sc_mtx); 419 } 420 421 int 422 gpioopen(dev_t dev, int flag, int mode, struct lwp *l) 423 { 424 struct gpio_softc *sc; 425 426 sc = device_lookup_private(&gpio_cd, minor(dev)); 427 if (sc == NULL) 428 return ENXIO; 429 430 return gpiobus_open(sc->sc_gc, sc->sc_dev); 431 } 432 433 int 434 gpioclose(dev_t dev, int flag, int mode, struct lwp *l) 435 { 436 struct gpio_softc *sc; 437 438 sc = device_lookup_private(&gpio_cd, minor(dev)); 439 gpiobus_close(sc->sc_gc, sc->sc_dev); 440 return 0; 441 } 442 443 static int 444 gpio_pinbyname(struct gpio_softc *sc, char *gp_name) 445 { 446 struct gpio_name *nm; 447 448 LIST_FOREACH(nm, &sc->sc_names, gp_next) 449 if (!strcmp(nm->gp_name, gp_name)) 450 return nm->gp_pin; 451 return -1; 452 } 453 454 int 455 gpioioctl(dev_t dev, u_long cmd, void *data, int flag, struct lwp *l) 456 { 457 int error; 458 struct gpio_softc *sc; 459 460 sc = device_lookup_private(&gpio_cd, minor(dev)); 461 462 error = gpio_lock(sc); 463 if (error) 464 return error; 465 466 error = gpio_ioctl(sc, cmd, data, flag, l); 467 gpio_unlock(sc); 468 return error; 469 } 470 471 static int 472 gpio_ioctl(struct gpio_softc *sc, u_long cmd, void *data, int flag, 473 struct lwp *l) 474 { 475 gpio_chipset_tag_t gc; 476 struct gpio_info *info; 477 struct gpio_attach *attach; 478 struct gpio_attach_args ga; 479 struct gpio_req *req; 480 struct gpio_name *nm; 481 struct gpio_set *set; 482 struct gpio_pin *gpin; 483 #ifdef COMPAT_50 484 struct gpio_dev *gdev; 485 #endif 486 device_t dv; 487 cfdata_t cf; 488 kauth_cred_t cred; 489 int locs[GPIOCF_NLOCS]; 490 int error, pin, value, flags, npins; 491 492 gc = sc->sc_gc; 493 ga.ga_flags = 0; 494 495 if (cmd != GPIOINFO && !device_is_active(sc->sc_dev)) { 496 DPRINTF(("%s: device is not active\n", 497 device_xname(sc->sc_dev))); 498 return EBUSY; 499 } 500 501 cred = kauth_cred_get(); 502 503 switch (cmd) { 504 case GPIOINFO: 505 info = data; 506 if (!kauth_authorize_device(cred, KAUTH_DEVICE_GPIO_PINSET, 507 NULL, NULL, NULL, NULL)) 508 info->gpio_npins = sc->sc_npins; 509 else { 510 for (pin = npins = 0; pin < sc->sc_npins; pin++) 511 if (sc->sc_pins[pin].pin_flags & GPIO_PIN_SET) 512 ++npins; 513 info->gpio_npins = npins; 514 } 515 break; 516 case GPIOREAD: 517 req = data; 518 519 if (req->gp_name[0] != '\0') 520 pin = gpio_pinbyname(sc, req->gp_name); 521 else 522 pin = req->gp_pin; 523 524 if (pin < 0 || pin >= sc->sc_npins) 525 return EINVAL; 526 527 if (!(sc->sc_pins[pin].pin_flags & GPIO_PIN_SET) && 528 kauth_authorize_device(cred, KAUTH_DEVICE_GPIO_PINSET, 529 NULL, NULL, NULL, NULL)) 530 return EPERM; 531 532 /* return read value */ 533 req->gp_value = gpiobus_pin_read(gc, pin); 534 break; 535 case GPIOWRITE: 536 if ((flag & FWRITE) == 0) 537 return EBADF; 538 539 req = data; 540 541 if (req->gp_name[0] != '\0') 542 pin = gpio_pinbyname(sc, req->gp_name); 543 else 544 pin = req->gp_pin; 545 546 if (pin < 0 || pin >= sc->sc_npins) 547 return EINVAL; 548 549 if (sc->sc_pins[pin].pin_mapped) 550 return EBUSY; 551 552 if (!(sc->sc_pins[pin].pin_flags & GPIO_PIN_SET) && 553 kauth_authorize_device(cred, KAUTH_DEVICE_GPIO_PINSET, 554 NULL, NULL, NULL, NULL)) 555 return EPERM; 556 557 value = req->gp_value; 558 if (value != GPIO_PIN_LOW && value != GPIO_PIN_HIGH) 559 return EINVAL; 560 561 gpiobus_pin_write(gc, pin, value); 562 /* return old value */ 563 req->gp_value = sc->sc_pins[pin].pin_state; 564 /* update current value */ 565 sc->sc_pins[pin].pin_state = value; 566 break; 567 case GPIOTOGGLE: 568 if ((flag & FWRITE) == 0) 569 return EBADF; 570 571 req = data; 572 573 if (req->gp_name[0] != '\0') 574 pin = gpio_pinbyname(sc, req->gp_name); 575 else 576 pin = req->gp_pin; 577 578 if (pin < 0 || pin >= sc->sc_npins) 579 return EINVAL; 580 581 if (sc->sc_pins[pin].pin_mapped) 582 return EBUSY; 583 584 if (!(sc->sc_pins[pin].pin_flags & GPIO_PIN_SET) && 585 kauth_authorize_device(cred, KAUTH_DEVICE_GPIO_PINSET, 586 NULL, NULL, NULL, NULL)) 587 return EPERM; 588 589 value = (sc->sc_pins[pin].pin_state == GPIO_PIN_LOW ? 590 GPIO_PIN_HIGH : GPIO_PIN_LOW); 591 gpiobus_pin_write(gc, pin, value); 592 /* return old value */ 593 req->gp_value = sc->sc_pins[pin].pin_state; 594 /* update current value */ 595 sc->sc_pins[pin].pin_state = value; 596 break; 597 case GPIOATTACH: 598 attach = data; 599 ga.ga_flags = attach->ga_flags; 600 #ifdef COMPAT_50 601 /* FALLTHROUGH */ 602 case GPIOATTACH50: 603 /* 604 * The double assignment to 'attach' in case of GPIOATTACH 605 * and COMPAT_50 is on purpose. It ensures backward 606 * compatability in case we are called through the old 607 * GPIOATTACH50 ioctl(2), which had not the ga_flags field 608 * in struct gpio_attach. 609 */ 610 attach = data; 611 #endif 612 if (kauth_authorize_device(cred, KAUTH_DEVICE_GPIO_PINSET, 613 NULL, NULL, NULL, NULL)) 614 return EPERM; 615 616 /* do not try to attach if the pins are already mapped */ 617 if (!gpio_pin_can_map(sc, attach->ga_offset, attach->ga_mask)) 618 return EBUSY; 619 620 error = 0; 621 mutex_enter(&sc->sc_mtx); 622 while (sc->sc_attach_busy) { 623 error = cv_wait_sig(&sc->sc_attach, &sc->sc_mtx); 624 if (error) 625 break; 626 } 627 if (!error) 628 sc->sc_attach_busy = 1; 629 mutex_exit(&sc->sc_mtx); 630 if (error) 631 return EBUSY; 632 633 ga.ga_gpio = sc; 634 /* Don't access attach->ga_flags here. */ 635 ga.ga_dvname = attach->ga_dvname; 636 ga.ga_offset = attach->ga_offset; 637 ga.ga_mask = attach->ga_mask; 638 DPRINTF(("%s: attach %s with offset %d, mask " 639 "0x%02x, and flags 0x%02x\n", device_xname(sc->sc_dev), 640 ga.ga_dvname, ga.ga_offset, ga.ga_mask, ga.ga_flags)); 641 642 locs[GPIOCF_OFFSET] = ga.ga_offset; 643 locs[GPIOCF_MASK] = ga.ga_mask; 644 locs[GPIOCF_FLAG] = ga.ga_flags; 645 646 cf = config_search_loc(NULL, sc->sc_dev, "gpio", locs, &ga); 647 if (cf != NULL) { 648 dv = config_attach_loc(sc->sc_dev, cf, locs, &ga, 649 gpiobus_print); 650 #ifdef COMPAT_50 651 if (dv != NULL) { 652 gdev = kmem_alloc(sizeof(struct gpio_dev), 653 KM_SLEEP); 654 gdev->sc_dev = dv; 655 LIST_INSERT_HEAD(&sc->sc_devs, gdev, sc_next); 656 } else 657 error = EINVAL; 658 #else 659 if (dv == NULL) 660 error = EINVAL; 661 #endif 662 } else 663 error = EINVAL; 664 mutex_enter(&sc->sc_mtx); 665 sc->sc_attach_busy = 0; 666 cv_signal(&sc->sc_attach); 667 mutex_exit(&sc->sc_mtx); 668 return error; 669 case GPIOSET: 670 if (kauth_authorize_device(cred, KAUTH_DEVICE_GPIO_PINSET, 671 NULL, NULL, NULL, NULL)) 672 return EPERM; 673 674 set = data; 675 676 if (set->gp_name[0] != '\0') 677 pin = gpio_pinbyname(sc, set->gp_name); 678 else 679 pin = set->gp_pin; 680 681 if (pin < 0 || pin >= sc->sc_npins) 682 return EINVAL; 683 flags = set->gp_flags; 684 685 /* check that the controller supports all requested flags */ 686 if ((flags & sc->sc_pins[pin].pin_caps) != flags) 687 return ENODEV; 688 flags = set->gp_flags | GPIO_PIN_SET; 689 690 set->gp_caps = sc->sc_pins[pin].pin_caps; 691 /* return old value */ 692 set->gp_flags = sc->sc_pins[pin].pin_flags; 693 if (flags > 0) { 694 gpiobus_pin_ctl(gc, pin, flags); 695 /* update current value */ 696 sc->sc_pins[pin].pin_flags = flags; 697 } 698 699 /* rename pin or new pin? */ 700 if (set->gp_name2[0] != '\0') { 701 struct gpio_name *gnm; 702 703 gnm = NULL; 704 LIST_FOREACH(nm, &sc->sc_names, gp_next) { 705 if (!strcmp(nm->gp_name, set->gp_name2) && 706 nm->gp_pin != pin) 707 return EINVAL; /* duplicate name */ 708 if (nm->gp_pin == pin) 709 gnm = nm; 710 } 711 if (gnm != NULL) 712 strlcpy(gnm->gp_name, set->gp_name2, 713 sizeof(gnm->gp_name)); 714 else { 715 nm = kmem_alloc(sizeof(struct gpio_name), 716 KM_SLEEP); 717 strlcpy(nm->gp_name, set->gp_name2, 718 sizeof(nm->gp_name)); 719 nm->gp_pin = set->gp_pin; 720 LIST_INSERT_HEAD(&sc->sc_names, nm, gp_next); 721 } 722 } 723 break; 724 case GPIOUNSET: 725 if (kauth_authorize_device(cred, KAUTH_DEVICE_GPIO_PINSET, 726 NULL, NULL, NULL, NULL)) 727 return EPERM; 728 729 set = data; 730 if (set->gp_name[0] != '\0') 731 pin = gpio_pinbyname(sc, set->gp_name); 732 else 733 pin = set->gp_pin; 734 735 if (pin < 0 || pin >= sc->sc_npins) 736 return EINVAL; 737 if (sc->sc_pins[pin].pin_mapped) 738 return EBUSY; 739 if (!(sc->sc_pins[pin].pin_flags & GPIO_PIN_SET)) 740 return EINVAL; 741 742 LIST_FOREACH(nm, &sc->sc_names, gp_next) { 743 if (nm->gp_pin == pin) { 744 LIST_REMOVE(nm, gp_next); 745 kmem_free(nm, sizeof(struct gpio_name)); 746 break; 747 } 748 } 749 sc->sc_pins[pin].pin_flags &= ~GPIO_PIN_SET; 750 break; 751 default: 752 #ifdef COMPAT_50 753 /* Try the old API */ 754 DPRINTF(("%s: trying the old API\n", device_xname(sc->sc_dev))); 755 return gpio_ioctl_oapi(sc, cmd, data, flag, cred); 756 #else 757 return ENOTTY; 758 #endif 759 } 760 return 0; 761 } 762 763 #ifdef COMPAT_50 764 static int 765 gpio_ioctl_oapi(struct gpio_softc *sc, u_long cmd, void *data, int flag, 766 kauth_cred_t cred) 767 { 768 gpio_chipset_tag_t gc; 769 struct gpio_pin_op *op; 770 struct gpio_pin_ctl *ctl; 771 struct gpio_attach *attach; 772 struct gpio_dev *gdev; 773 774 int error, pin, value, flags; 775 776 gc = sc->sc_gc; 777 778 switch (cmd) { 779 case GPIOPINREAD: 780 op = data; 781 782 pin = op->gp_pin; 783 784 if (pin < 0 || pin >= sc->sc_npins) 785 return EINVAL; 786 787 if (!(sc->sc_pins[pin].pin_flags & GPIO_PIN_SET) && 788 kauth_authorize_device(cred, KAUTH_DEVICE_GPIO_PINSET, 789 NULL, NULL, NULL, NULL)) 790 return EPERM; 791 792 /* return read value */ 793 op->gp_value = gpiobus_pin_read(gc, pin); 794 break; 795 case GPIOPINWRITE: 796 if ((flag & FWRITE) == 0) 797 return EBADF; 798 799 op = data; 800 801 pin = op->gp_pin; 802 803 if (pin < 0 || pin >= sc->sc_npins) 804 return EINVAL; 805 806 if (sc->sc_pins[pin].pin_mapped) 807 return EBUSY; 808 809 if (!(sc->sc_pins[pin].pin_flags & GPIO_PIN_SET) && 810 kauth_authorize_device(cred, KAUTH_DEVICE_GPIO_PINSET, 811 NULL, NULL, NULL, NULL)) 812 return EPERM; 813 814 value = op->gp_value; 815 if (value != GPIO_PIN_LOW && value != GPIO_PIN_HIGH) 816 return EINVAL; 817 818 gpiobus_pin_write(gc, pin, value); 819 /* return old value */ 820 op->gp_value = sc->sc_pins[pin].pin_state; 821 /* update current value */ 822 sc->sc_pins[pin].pin_state = value; 823 break; 824 case GPIOPINTOGGLE: 825 if ((flag & FWRITE) == 0) 826 return EBADF; 827 828 op = data; 829 830 pin = op->gp_pin; 831 832 if (pin < 0 || pin >= sc->sc_npins) 833 return EINVAL; 834 835 if (sc->sc_pins[pin].pin_mapped) 836 return EBUSY; 837 838 if (!(sc->sc_pins[pin].pin_flags & GPIO_PIN_SET) && 839 kauth_authorize_device(cred, KAUTH_DEVICE_GPIO_PINSET, 840 NULL, NULL, NULL, NULL)) 841 return EPERM; 842 843 value = (sc->sc_pins[pin].pin_state == GPIO_PIN_LOW ? 844 GPIO_PIN_HIGH : GPIO_PIN_LOW); 845 gpiobus_pin_write(gc, pin, value); 846 /* return old value */ 847 op->gp_value = sc->sc_pins[pin].pin_state; 848 /* update current value */ 849 sc->sc_pins[pin].pin_state = value; 850 break; 851 case GPIOPINCTL: 852 ctl = data; 853 854 if (kauth_authorize_device(cred, KAUTH_DEVICE_GPIO_PINSET, 855 NULL, NULL, NULL, NULL)) 856 return EPERM; 857 858 pin = ctl->gp_pin; 859 860 if (pin < 0 || pin >= sc->sc_npins) 861 return EINVAL; 862 if (sc->sc_pins[pin].pin_mapped) 863 return EBUSY; 864 flags = ctl->gp_flags; 865 866 /* check that the controller supports all requested flags */ 867 if ((flags & sc->sc_pins[pin].pin_caps) != flags) 868 return ENODEV; 869 870 ctl->gp_caps = sc->sc_pins[pin].pin_caps; 871 /* return old value */ 872 ctl->gp_flags = sc->sc_pins[pin].pin_flags; 873 if (flags > 0) { 874 gpiobus_pin_ctl(gc, pin, flags); 875 /* update current value */ 876 sc->sc_pins[pin].pin_flags = flags; 877 } 878 break; 879 case GPIODETACH50: 880 /* FALLTHOUGH */ 881 case GPIODETACH: 882 if (kauth_authorize_device(cred, KAUTH_DEVICE_GPIO_PINSET, 883 NULL, NULL, NULL, NULL)) 884 return EPERM; 885 886 error = 0; 887 mutex_enter(&sc->sc_mtx); 888 while (sc->sc_attach_busy) { 889 error = cv_wait_sig(&sc->sc_attach, &sc->sc_mtx); 890 if (error) 891 break; 892 } 893 if (!error) 894 sc->sc_attach_busy = 1; 895 mutex_exit(&sc->sc_mtx); 896 if (error) 897 return EBUSY; 898 899 attach = data; 900 LIST_FOREACH(gdev, &sc->sc_devs, sc_next) { 901 if (strcmp(device_xname(gdev->sc_dev), 902 attach->ga_dvname) == 0) { 903 mutex_enter(&sc->sc_mtx); 904 sc->sc_attach_busy = 0; 905 cv_signal(&sc->sc_attach); 906 mutex_exit(&sc->sc_mtx); 907 908 if (config_detach(gdev->sc_dev, 0) == 0) 909 return 0; 910 break; 911 } 912 } 913 if (gdev == NULL) { 914 mutex_enter(&sc->sc_mtx); 915 sc->sc_attach_busy = 0; 916 cv_signal(&sc->sc_attach); 917 mutex_exit(&sc->sc_mtx); 918 } 919 return EINVAL; 920 921 default: 922 return ENOTTY; 923 } 924 return 0; 925 } 926 #endif /* COMPAT_50 */ 927 928 MODULE(MODULE_CLASS_DRIVER, gpio, NULL); 929 930 #ifdef _MODULE 931 #include "ioconf.c" 932 #endif 933 934 static int 935 gpio_modcmd(modcmd_t cmd, void *opaque) 936 { 937 #ifdef _MODULE 938 devmajor_t cmajor = NODEVMAJOR, bmajor = NODEVMAJOR; 939 int error; 940 #endif 941 switch (cmd) { 942 case MODULE_CMD_INIT: 943 #ifdef _MODULE 944 error = config_init_component(cfdriver_ioconf_gpio, 945 cfattach_ioconf_gpio, cfdata_ioconf_gpio); 946 if (error) { 947 aprint_error("%s: unable to init component\n", 948 gpio_cd.cd_name); 949 return error; 950 } 951 error = devsw_attach(gpio_cd.cd_name, NULL, &bmajor, 952 &gpio_cdevsw, &cmajor); 953 if (error) { 954 aprint_error("%s: unable to register devsw\n", 955 gpio_cd.cd_name); 956 return config_fini_component(cfdriver_ioconf_gpio, 957 cfattach_ioconf_gpio, cfdata_ioconf_gpio); 958 } 959 #endif 960 return 0; 961 case MODULE_CMD_FINI: 962 #ifdef _MODULE 963 config_fini_component(cfdriver_ioconf_gpio, 964 cfattach_ioconf_gpio, cfdata_ioconf_gpio); 965 devsw_detach(NULL, &gpio_cdevsw); 966 #endif 967 return 0; 968 default: 969 return ENOTTY; 970 } 971 } 972
Indexes created Tue Sep 23 14:10:03 GMT 2025