gpio.c revision 1.61
1 /* $NetBSD: gpio.c,v 1.61 2018/05/19 13:59:06 thorpej Exp $ */ 2 /* $OpenBSD: gpio.c,v 1.6 2006/01/14 12:33:49 grange Exp $ */ 3 4 /* 5 * Copyright (c) 2008, 2009, 2010, 2011 Marc Balmer <marc (at) msys.ch> 6 * Copyright (c) 2004, 2006 Alexander Yurchenko <grange (at) openbsd.org> 7 * 8 * Permission to use, copy, modify, and distribute this software for any 9 * purpose with or without fee is hereby granted, provided that the above 10 * copyright notice and this permission notice appear in all copies. 11 * 12 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 13 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 14 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 15 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 16 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 17 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 18 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 19 */ 20 21 #include <sys/cdefs.h> 22 __KERNEL_RCSID(0, "$NetBSD: gpio.c,v 1.61 2018/05/19 13:59:06 thorpej Exp $"); 23 24 /* 25 * General Purpose Input/Output framework. 26 */ 27 28 #include <sys/param.h> 29 #include <sys/callout.h> 30 #include <sys/systm.h> 31 #include <sys/conf.h> 32 #include <sys/device.h> 33 #include <sys/fcntl.h> 34 #include <sys/ioctl.h> 35 #include <sys/gpio.h> 36 #include <sys/kernel.h> 37 #include <sys/vnode.h> 38 #include <sys/kmem.h> 39 #include <sys/mutex.h> 40 #include <sys/condvar.h> 41 #include <sys/queue.h> 42 #include <sys/kauth.h> 43 #include <sys/module.h> 44 #include <dev/gpio/gpiovar.h> 45 46 #include "ioconf.h" 47 #include "locators.h" 48 49 #ifdef GPIO_DEBUG 50 #define DPRINTFN(n, x) do { if (gpiodebug > (n)) printf x; } while (0) 51 int gpiodebug = 0; 52 #else 53 #define DPRINTFN(n, x) 54 #endif 55 #define DPRINTF(x) DPRINTFN(0, x) 56 57 struct gpio_softc { 58 device_t sc_dev; 59 60 gpio_chipset_tag_t sc_gc; /* GPIO controller */ 61 gpio_pin_t *sc_pins; /* pins array */ 62 int sc_npins; /* number of pins */ 63 64 kmutex_t sc_mtx; 65 kcondvar_t sc_ioctl; /* ioctl in progress */ 66 int sc_ioctl_busy; /* ioctl is busy */ 67 kcondvar_t sc_attach; /* attach/detach in progress */ 68 int sc_attach_busy;/* busy in attach/detach */ 69 #ifdef COMPAT_50 70 LIST_HEAD(, gpio_dev) sc_devs; /* devices */ 71 #endif 72 LIST_HEAD(, gpio_name) sc_names; /* named pins */ 73 }; 74 75 static int gpio_match(device_t, cfdata_t, void *); 76 int gpio_submatch(device_t, cfdata_t, const int *, void *); 77 static void gpio_attach(device_t, device_t, void *); 78 static int gpio_rescan(device_t, const char *, const int *); 79 static void gpio_childdetached(device_t, device_t); 80 static bool gpio_resume(device_t, const pmf_qual_t *); 81 static int gpio_detach(device_t, int); 82 static int gpio_search(device_t, cfdata_t, const int *, void *); 83 static int gpio_print(void *, const char *); 84 static int gpio_pinbyname(struct gpio_softc *, char *); 85 static int gpio_ioctl(struct gpio_softc *, u_long, void *, int, 86 struct lwp *); 87 88 #ifdef COMPAT_50 89 /* Old API */ 90 static int gpio_ioctl_oapi(struct gpio_softc *, u_long, void *, int, 91 kauth_cred_t); 92 #endif 93 94 CFATTACH_DECL3_NEW(gpio, sizeof(struct gpio_softc), 95 gpio_match, gpio_attach, gpio_detach, NULL, gpio_rescan, 96 gpio_childdetached, DVF_DETACH_SHUTDOWN); 97 98 dev_type_open(gpioopen); 99 dev_type_close(gpioclose); 100 dev_type_ioctl(gpioioctl); 101 dev_type_ioctl(gpioioctl_locked); 102 103 const struct cdevsw gpio_cdevsw = { 104 .d_open = gpioopen, 105 .d_close = gpioclose, 106 .d_read = noread, 107 .d_write = nowrite, 108 .d_ioctl = gpioioctl, 109 .d_stop = nostop, 110 .d_tty = notty, 111 .d_poll = nopoll, 112 .d_mmap = nommap, 113 .d_kqfilter = nokqfilter, 114 .d_discard = nodiscard, 115 .d_flag = D_OTHER | D_MPSAFE 116 }; 117 118 static int 119 gpio_match(device_t parent, cfdata_t cf, void *aux) 120 { 121 return 1; 122 } 123 124 int 125 gpio_submatch(device_t parent, cfdata_t cf, const int *ip, void *aux) 126 { 127 struct gpio_attach_args *ga = aux; 128 129 if (ga->ga_offset == -1) 130 return 0; 131 132 return strcmp(ga->ga_dvname, cf->cf_name) == 0; 133 } 134 135 static bool 136 gpio_resume(device_t self, const pmf_qual_t *qual) 137 { 138 struct gpio_softc *sc = device_private(self); 139 int pin; 140 141 for (pin = 0; pin < sc->sc_npins; pin++) { 142 gpiobus_pin_ctl(sc->sc_gc, pin, sc->sc_pins[pin].pin_flags); 143 gpiobus_pin_write(sc->sc_gc, pin, sc->sc_pins[pin].pin_state); 144 } 145 return true; 146 } 147 148 static void 149 gpio_childdetached(device_t self, device_t child) 150 { 151 #ifdef COMPAT_50 152 struct gpio_dev *gdev; 153 struct gpio_softc *sc; 154 int error; 155 156 /* 157 * gpio_childetached is serialized because it can be entered in 158 * different ways concurrently, e.g. via the GPIODETACH ioctl and 159 * drvctl(8) or modunload(8). 160 */ 161 sc = device_private(self); 162 error = 0; 163 mutex_enter(&sc->sc_mtx); 164 while (sc->sc_attach_busy) { 165 error = cv_wait_sig(&sc->sc_attach, &sc->sc_mtx); 166 if (error) 167 break; 168 } 169 if (!error) 170 sc->sc_attach_busy = 1; 171 mutex_exit(&sc->sc_mtx); 172 if (error) 173 return; 174 175 LIST_FOREACH(gdev, &sc->sc_devs, sc_next) 176 if (gdev->sc_dev == child) { 177 LIST_REMOVE(gdev, sc_next); 178 kmem_free(gdev, sizeof(struct gpio_dev)); 179 break; 180 } 181 182 mutex_enter(&sc->sc_mtx); 183 sc->sc_attach_busy = 0; 184 cv_signal(&sc->sc_attach); 185 mutex_exit(&sc->sc_mtx); 186 #endif 187 } 188 189 static int 190 gpio_rescan(device_t self, const char *ifattr, const int *locators) 191 { 192 struct gpio_softc *sc = device_private(self); 193 194 config_search_loc(gpio_search, self, ifattr, locators, sc); 195 196 return 0; 197 } 198 199 static void 200 gpio_attach(device_t parent, device_t self, void *aux) 201 { 202 struct gpio_softc *sc = device_private(self); 203 struct gpiobus_attach_args *gba = aux; 204 struct gpio_name *nm; 205 int pin; 206 207 sc->sc_dev = self; 208 sc->sc_gc = gba->gba_gc; 209 sc->sc_pins = gba->gba_pins; 210 sc->sc_npins = gba->gba_npins; 211 212 aprint_normal(": %d pins\n", sc->sc_npins); 213 aprint_naive("\n"); 214 215 /* Configure default pin names */ 216 for (pin = 0; pin < sc->sc_npins; pin++) { 217 if (sc->sc_pins[pin].pin_defname[0] == '\0') 218 continue; 219 nm = kmem_alloc(sizeof(*nm), KM_SLEEP); 220 strlcpy(nm->gp_name, sc->sc_pins[pin].pin_defname, 221 sizeof(nm->gp_name)); 222 nm->gp_pin = pin; 223 LIST_INSERT_HEAD(&sc->sc_names, nm, gp_next); 224 } 225 226 if (!pmf_device_register(self, NULL, gpio_resume)) 227 aprint_error_dev(self, "couldn't establish power handler\n"); 228 mutex_init(&sc->sc_mtx, MUTEX_DEFAULT, IPL_VM); 229 cv_init(&sc->sc_ioctl, "gpioctl"); 230 cv_init(&sc->sc_attach, "gpioatch"); 231 /* 232 * Attach all devices that can be connected to the GPIO pins 233 * described in the kernel configuration file. 234 */ 235 gpio_rescan(self, "gpio", NULL); 236 } 237 238 static int 239 gpio_detach(device_t self, int flags) 240 { 241 struct gpio_softc *sc; 242 int rc; 243 244 sc = device_private(self); 245 246 if ((rc = config_detach_children(self, flags)) != 0) 247 return rc; 248 mutex_destroy(&sc->sc_mtx); 249 cv_destroy(&sc->sc_ioctl); 250 #if 0 251 int maj, mn; 252 253 /* Locate the major number */ 254 for (maj = 0; maj < nchrdev; maj++) 255 if (cdevsw[maj].d_open == gpioopen) 256 break; 257 258 /* Nuke the vnodes for any open instances (calls close) */ 259 mn = device_unit(self); 260 vdevgone(maj, mn, mn, VCHR); 261 #endif 262 return 0; 263 } 264 265 static int 266 gpio_search(device_t parent, cfdata_t cf, const int *ldesc, void *aux) 267 { 268 struct gpio_attach_args ga; 269 size_t namlen; 270 271 ga.ga_gpio = aux; 272 ga.ga_offset = cf->cf_loc[GPIOCF_OFFSET]; 273 ga.ga_mask = cf->cf_loc[GPIOCF_MASK]; 274 ga.ga_flags = cf->cf_loc[GPIOCF_FLAG]; 275 namlen = strlen(cf->cf_name) + 1; 276 ga.ga_dvname = kmem_alloc(namlen, KM_NOSLEEP); 277 if (ga.ga_dvname == NULL) 278 return 0; 279 strcpy(ga.ga_dvname, cf->cf_name); 280 281 if (config_match(parent, cf, &ga) > 0) 282 config_attach(parent, cf, &ga, gpio_print); 283 kmem_free(ga.ga_dvname, namlen); 284 return 0; 285 } 286 287 int 288 gpio_print(void *aux, const char *pnp) 289 { 290 struct gpio_attach_args *ga = aux; 291 int i; 292 293 aprint_normal(" pins"); 294 for (i = 0; i < 32; i++) 295 if (ga->ga_mask & (1 << i)) 296 aprint_normal(" %d", ga->ga_offset + i); 297 298 return UNCONF; 299 } 300 301 int 302 gpiobus_print(void *aux, const char *pnp) 303 { 304 #if 0 305 struct gpiobus_attach_args *gba = aux; 306 #endif 307 if (pnp != NULL) 308 aprint_normal("gpiobus at %s", pnp); 309 310 return UNCONF; 311 } 312 313 void * 314 gpio_find_device(const char *name) 315 { 316 device_t gpio_dev; 317 gpio_dev = device_find_by_xname(name); 318 if (gpio_dev == NULL) 319 return NULL; 320 return device_private(gpio_dev); 321 } 322 323 const char * 324 gpio_get_name(void *gpio) 325 { 326 struct gpio_softc *sc = gpio; 327 return device_xname(sc->sc_dev); 328 } 329 330 /* return 1 if all pins can be mapped, 0 if not */ 331 int 332 gpio_pin_can_map(void *gpio, int offset, uint32_t mask) 333 { 334 struct gpio_softc *sc = gpio; 335 int npins, pin, i; 336 337 npins = gpio_npins(mask); 338 if (npins > sc->sc_npins) 339 return 0; 340 341 for (npins = 0, i = 0; i < 32; i++) 342 if (mask & (1 << i)) { 343 pin = offset + i; 344 if (pin < 0 || pin >= sc->sc_npins) 345 return 0; 346 if (sc->sc_pins[pin].pin_mapped) 347 return 0; 348 } 349 350 return 1; 351 } 352 353 int 354 gpio_pin_map(void *gpio, int offset, uint32_t mask, struct gpio_pinmap *map) 355 { 356 struct gpio_softc *sc = gpio; 357 int npins, pin, i; 358 359 npins = gpio_npins(mask); 360 if (npins > sc->sc_npins) 361 return 1; 362 363 for (npins = 0, i = 0; i < 32; i++) 364 if (mask & (1 << i)) { 365 pin = offset + i; 366 if (pin < 0 || pin >= sc->sc_npins) 367 return 1; 368 if (sc->sc_pins[pin].pin_mapped) 369 return 1; 370 sc->sc_pins[pin].pin_mapped = 1; 371 map->pm_map[npins++] = pin; 372 } 373 map->pm_size = npins; 374 375 return 0; 376 } 377 378 void 379 gpio_pin_unmap(void *gpio, struct gpio_pinmap *map) 380 { 381 struct gpio_softc *sc = gpio; 382 int pin, i; 383 384 for (i = 0; i < map->pm_size; i++) { 385 pin = map->pm_map[i]; 386 sc->sc_pins[pin].pin_mapped = 0; 387 } 388 } 389 390 int 391 gpio_pin_read(void *gpio, struct gpio_pinmap *map, int pin) 392 { 393 struct gpio_softc *sc = gpio; 394 395 return gpiobus_pin_read(sc->sc_gc, map->pm_map[pin]); 396 } 397 398 void 399 gpio_pin_write(void *gpio, struct gpio_pinmap *map, int pin, int value) 400 { 401 struct gpio_softc *sc = gpio; 402 403 gpiobus_pin_write(sc->sc_gc, map->pm_map[pin], value); 404 sc->sc_pins[map->pm_map[pin]].pin_state = value; 405 } 406 407 int 408 gpio_pin_get_conf(void *gpio, struct gpio_pinmap *map, int pin) 409 { 410 struct gpio_softc *sc = gpio; 411 int rv; 412 413 mutex_enter(&sc->sc_mtx); 414 rv = sc->sc_pins[map->pm_map[pin]].pin_flags; 415 mutex_exit(&sc->sc_mtx); 416 417 return (rv); 418 } 419 420 bool 421 gpio_pin_set_conf(void *gpio, struct gpio_pinmap *map, int pin, int flags) 422 { 423 struct gpio_softc *sc = gpio; 424 int checkflags = flags & GPIO_PIN_HWCAPS; 425 426 if ((sc->sc_pins[map->pm_map[pin]].pin_caps & checkflags) != checkflags) 427 return (false); 428 429 gpio_pin_ctl(gpio, map, pin, flags); 430 431 return (true); 432 } 433 434 void 435 gpio_pin_ctl(void *gpio, struct gpio_pinmap *map, int pin, int flags) 436 { 437 struct gpio_softc *sc = gpio; 438 439 /* loosey-goosey version of gpio_pin_set_conf(). */ 440 441 mutex_enter(&sc->sc_mtx); 442 gpiobus_pin_ctl(sc->sc_gc, map->pm_map[pin], flags); 443 sc->sc_pins[map->pm_map[pin]].pin_flags = flags; 444 mutex_exit(&sc->sc_mtx); 445 } 446 447 int 448 gpio_pin_caps(void *gpio, struct gpio_pinmap *map, int pin) 449 { 450 struct gpio_softc *sc = gpio; 451 452 return sc->sc_pins[map->pm_map[pin]].pin_caps; 453 } 454 455 int 456 gpio_pin_intrcaps(void *gpio, struct gpio_pinmap *map, int pin) 457 { 458 struct gpio_softc *sc = gpio; 459 460 return sc->sc_pins[map->pm_map[pin]].pin_intrcaps; 461 } 462 463 static int 464 gpio_irqmode_sanitize(int irqmode) 465 { 466 int has_edge, has_level; 467 468 has_edge = irqmode & GPIO_INTR_EDGE_MASK; 469 has_level = irqmode & GPIO_INTR_LEVEL_MASK; 470 471 /* Must specify an interrupt mode. */ 472 if ((irqmode & GPIO_INTR_MODE_MASK) == 0) 473 return (0); 474 475 /* Can't specify edge and level together */ 476 if (has_level && has_edge) 477 return (0); 478 479 /* "Be liberal in what you accept..." */ 480 if (has_edge) { 481 if (irqmode & GPIO_INTR_DOUBLE_EDGE) { 482 /* if DOUBLE is set, just pass through DOUBLE */ 483 irqmode = (irqmode & ~GPIO_INTR_EDGE_MASK) | 484 GPIO_INTR_DOUBLE_EDGE; 485 } else if ((irqmode ^ 486 (GPIO_INTR_POS_EDGE | GPIO_INTR_NEG_EDGE)) == 0) { 487 /* both POS and NEG set; treat as DOUBLE */ 488 irqmode = (irqmode & ~GPIO_INTR_EDGE_MASK) | 489 GPIO_INTR_DOUBLE_EDGE; 490 } 491 } else { 492 /* Can't specify both levels together. */ 493 if (has_level == GPIO_INTR_LEVEL_MASK) 494 return (0); 495 } 496 497 return (irqmode); 498 } 499 500 bool 501 gpio_pin_irqmode_issupported(void *gpio, struct gpio_pinmap *map, 502 int pin, int irqmode) 503 { 504 struct gpio_softc *sc = gpio; 505 int match; 506 507 irqmode = gpio_irqmode_sanitize(irqmode) & GPIO_INTR_MODE_MASK; 508 509 /* Make sure the pin can do what is being asked. */ 510 match = sc->sc_pins[map->pm_map[pin]].pin_intrcaps & irqmode; 511 512 return (irqmode && irqmode == match); 513 } 514 515 void * 516 gpio_intr_establish(void *gpio, struct gpio_pinmap *map, int pin, int ipl, 517 int irqmode, int (*func)(void *), void *arg) 518 { 519 struct gpio_softc *sc = gpio; 520 521 if (sc->sc_gc->gp_intr_establish == NULL) 522 return (NULL); 523 524 irqmode = gpio_irqmode_sanitize(irqmode); 525 if (irqmode == 0) 526 return (NULL); 527 528 if (! gpio_pin_irqmode_issupported(gpio, map, pin, irqmode)) 529 return (NULL); 530 531 /* XXX Right now, everything has to be at IPL_VM. */ 532 if (ipl != IPL_VM) 533 return (NULL); 534 535 return ((*sc->sc_gc->gp_intr_establish)(sc->sc_gc->gp_cookie, 536 sc->sc_pins[map->pm_map[pin]].pin_num, ipl, irqmode, func, arg)); 537 } 538 539 void 540 gpio_intr_disestablish(void *gpio, void *ih) 541 { 542 struct gpio_softc *sc = gpio; 543 544 if (sc->sc_gc->gp_intr_disestablish != NULL && ih != NULL) 545 (*sc->sc_gc->gp_intr_disestablish)(sc->sc_gc->gp_cookie, ih); 546 } 547 548 bool 549 gpio_intr_str(void *gpio, struct gpio_pinmap *map, int pin, int irqmode, 550 char *intrstr, size_t intrstrlen) 551 { 552 struct gpio_softc *sc = gpio; 553 const char *mode; 554 char hwstr[64]; 555 556 if (sc->sc_gc->gp_intr_str == NULL) 557 return (false); 558 559 irqmode = gpio_irqmode_sanitize(irqmode); 560 if (irqmode == 0) 561 return (false); 562 563 if (irqmode & GPIO_INTR_DOUBLE_EDGE) 564 mode = "double edge"; 565 else if (irqmode & GPIO_INTR_POS_EDGE) 566 mode = "positive edge"; 567 else if (irqmode & GPIO_INTR_NEG_EDGE) 568 mode = "negative edge"; 569 else if (irqmode & GPIO_INTR_HIGH_LEVEL) 570 mode = "high level"; 571 else if (irqmode & GPIO_INTR_LOW_LEVEL) 572 mode = "low level"; 573 else 574 return (false); 575 576 if (! (*sc->sc_gc->gp_intr_str)(sc->sc_gc->gp_cookie, 577 sc->sc_pins[map->pm_map[pin]].pin_num, 578 irqmode, hwstr, sizeof(hwstr))) 579 return (false); 580 581 (void) snprintf(intrstr, intrstrlen, "%s (%s)", hwstr, mode); 582 583 return (true); 584 } 585 586 int 587 gpio_npins(uint32_t mask) 588 { 589 int npins, i; 590 591 for (npins = 0, i = 0; i < 32; i++) 592 if (mask & (1 << i)) 593 npins++; 594 595 return npins; 596 } 597 598 int 599 gpio_lock(void *data) 600 { 601 struct gpio_softc *sc; 602 int error; 603 604 error = 0; 605 sc = data; 606 mutex_enter(&sc->sc_mtx); 607 while (sc->sc_ioctl_busy) { 608 error = cv_wait_sig(&sc->sc_ioctl, &sc->sc_mtx); 609 if (error) 610 break; 611 } 612 if (!error) 613 sc->sc_ioctl_busy = 1; 614 mutex_exit(&sc->sc_mtx); 615 return error; 616 } 617 618 void 619 gpio_unlock(void *data) 620 { 621 struct gpio_softc *sc; 622 623 sc = data; 624 mutex_enter(&sc->sc_mtx); 625 sc->sc_ioctl_busy = 0; 626 cv_signal(&sc->sc_ioctl); 627 mutex_exit(&sc->sc_mtx); 628 } 629 630 int 631 gpioopen(dev_t dev, int flag, int mode, struct lwp *l) 632 { 633 struct gpio_softc *sc; 634 635 sc = device_lookup_private(&gpio_cd, minor(dev)); 636 if (sc == NULL) 637 return ENXIO; 638 639 return gpiobus_open(sc->sc_gc, sc->sc_dev); 640 } 641 642 int 643 gpioclose(dev_t dev, int flag, int mode, struct lwp *l) 644 { 645 struct gpio_softc *sc; 646 647 sc = device_lookup_private(&gpio_cd, minor(dev)); 648 return gpiobus_close(sc->sc_gc, sc->sc_dev); 649 } 650 651 static int 652 gpio_pinbyname(struct gpio_softc *sc, char *gp_name) 653 { 654 struct gpio_name *nm; 655 656 LIST_FOREACH(nm, &sc->sc_names, gp_next) 657 if (!strcmp(nm->gp_name, gp_name)) 658 return nm->gp_pin; 659 return -1; 660 } 661 662 int 663 gpioioctl(dev_t dev, u_long cmd, void *data, int flag, struct lwp *l) 664 { 665 int error; 666 struct gpio_softc *sc; 667 668 sc = device_lookup_private(&gpio_cd, minor(dev)); 669 670 error = gpio_lock(sc); 671 if (error) 672 return error; 673 674 error = gpio_ioctl(sc, cmd, data, flag, l); 675 gpio_unlock(sc); 676 return error; 677 } 678 679 static int 680 gpio_ioctl(struct gpio_softc *sc, u_long cmd, void *data, int flag, 681 struct lwp *l) 682 { 683 gpio_chipset_tag_t gc; 684 struct gpio_info *info; 685 struct gpio_attach *attach; 686 struct gpio_attach_args ga; 687 struct gpio_req *req; 688 struct gpio_name *nm; 689 struct gpio_set *set; 690 #ifdef COMPAT_50 691 struct gpio_dev *gdev; 692 #endif 693 device_t dv; 694 cfdata_t cf; 695 kauth_cred_t cred; 696 int locs[GPIOCF_NLOCS]; 697 int error, pin, value, flags, npins; 698 699 gc = sc->sc_gc; 700 ga.ga_flags = 0; 701 702 if (cmd != GPIOINFO && !device_is_active(sc->sc_dev)) { 703 DPRINTF(("%s: device is not active\n", 704 device_xname(sc->sc_dev))); 705 return EBUSY; 706 } 707 708 cred = kauth_cred_get(); 709 710 switch (cmd) { 711 case GPIOINFO: 712 info = data; 713 if (!kauth_authorize_device(cred, KAUTH_DEVICE_GPIO_PINSET, 714 NULL, NULL, NULL, NULL)) 715 info->gpio_npins = sc->sc_npins; 716 else { 717 for (pin = npins = 0; pin < sc->sc_npins; pin++) 718 if (sc->sc_pins[pin].pin_flags & GPIO_PIN_SET) 719 ++npins; 720 info->gpio_npins = npins; 721 } 722 break; 723 case GPIOREAD: 724 req = data; 725 726 if (req->gp_name[0] != '\0') 727 pin = gpio_pinbyname(sc, req->gp_name); 728 else 729 pin = req->gp_pin; 730 731 if (pin < 0 || pin >= sc->sc_npins) 732 return EINVAL; 733 734 if (!(sc->sc_pins[pin].pin_flags & GPIO_PIN_SET) && 735 kauth_authorize_device(cred, KAUTH_DEVICE_GPIO_PINSET, 736 NULL, NULL, NULL, NULL)) 737 return EPERM; 738 739 /* return read value */ 740 req->gp_value = gpiobus_pin_read(gc, pin); 741 break; 742 case GPIOWRITE: 743 if ((flag & FWRITE) == 0) 744 return EBADF; 745 746 req = data; 747 748 if (req->gp_name[0] != '\0') 749 pin = gpio_pinbyname(sc, req->gp_name); 750 else 751 pin = req->gp_pin; 752 753 if (pin < 0 || pin >= sc->sc_npins) 754 return EINVAL; 755 756 if (sc->sc_pins[pin].pin_mapped) 757 return EBUSY; 758 759 if (!(sc->sc_pins[pin].pin_flags & GPIO_PIN_SET) && 760 kauth_authorize_device(cred, KAUTH_DEVICE_GPIO_PINSET, 761 NULL, NULL, NULL, NULL)) 762 return EPERM; 763 764 value = req->gp_value; 765 if (value != GPIO_PIN_LOW && value != GPIO_PIN_HIGH) 766 return EINVAL; 767 768 /* return old value */ 769 req->gp_value = gpiobus_pin_read(gc, pin); 770 gpiobus_pin_write(gc, pin, value); 771 /* update current value */ 772 sc->sc_pins[pin].pin_state = value; 773 break; 774 case GPIOTOGGLE: 775 if ((flag & FWRITE) == 0) 776 return EBADF; 777 778 req = data; 779 780 if (req->gp_name[0] != '\0') 781 pin = gpio_pinbyname(sc, req->gp_name); 782 else 783 pin = req->gp_pin; 784 785 if (pin < 0 || pin >= sc->sc_npins) 786 return EINVAL; 787 788 if (sc->sc_pins[pin].pin_mapped) 789 return EBUSY; 790 791 if (!(sc->sc_pins[pin].pin_flags & GPIO_PIN_SET) && 792 kauth_authorize_device(cred, KAUTH_DEVICE_GPIO_PINSET, 793 NULL, NULL, NULL, NULL)) 794 return EPERM; 795 796 value = (sc->sc_pins[pin].pin_state == GPIO_PIN_LOW ? 797 GPIO_PIN_HIGH : GPIO_PIN_LOW); 798 gpiobus_pin_write(gc, pin, value); 799 /* return old value */ 800 req->gp_value = sc->sc_pins[pin].pin_state; 801 /* update current value */ 802 sc->sc_pins[pin].pin_state = value; 803 break; 804 case GPIOATTACH: 805 attach = data; 806 ga.ga_flags = attach->ga_flags; 807 #ifdef COMPAT_50 808 /* FALLTHROUGH */ 809 case GPIOATTACH50: 810 /* 811 * The double assignment to 'attach' in case of GPIOATTACH 812 * and COMPAT_50 is on purpose. It ensures backward 813 * compatability in case we are called through the old 814 * GPIOATTACH50 ioctl(2), which had not the ga_flags field 815 * in struct gpio_attach. 816 */ 817 attach = data; 818 #endif 819 if (kauth_authorize_device(cred, KAUTH_DEVICE_GPIO_PINSET, 820 NULL, NULL, NULL, NULL)) 821 return EPERM; 822 823 /* do not try to attach if the pins are already mapped */ 824 if (!gpio_pin_can_map(sc, attach->ga_offset, attach->ga_mask)) 825 return EBUSY; 826 827 error = 0; 828 mutex_enter(&sc->sc_mtx); 829 while (sc->sc_attach_busy) { 830 error = cv_wait_sig(&sc->sc_attach, &sc->sc_mtx); 831 if (error) 832 break; 833 } 834 if (!error) 835 sc->sc_attach_busy = 1; 836 mutex_exit(&sc->sc_mtx); 837 if (error) 838 return EBUSY; 839 840 ga.ga_gpio = sc; 841 /* Don't access attach->ga_flags here. */ 842 ga.ga_dvname = attach->ga_dvname; 843 ga.ga_offset = attach->ga_offset; 844 ga.ga_mask = attach->ga_mask; 845 DPRINTF(("%s: attach %s with offset %d, mask " 846 "0x%02x, and flags 0x%02x\n", device_xname(sc->sc_dev), 847 ga.ga_dvname, ga.ga_offset, ga.ga_mask, ga.ga_flags)); 848 849 locs[GPIOCF_OFFSET] = ga.ga_offset; 850 locs[GPIOCF_MASK] = ga.ga_mask; 851 locs[GPIOCF_FLAG] = ga.ga_flags; 852 853 cf = config_search_loc(NULL, sc->sc_dev, "gpio", locs, &ga); 854 if (cf != NULL) { 855 dv = config_attach_loc(sc->sc_dev, cf, locs, &ga, 856 gpiobus_print); 857 #ifdef COMPAT_50 858 if (dv != NULL) { 859 gdev = kmem_alloc(sizeof(struct gpio_dev), 860 KM_SLEEP); 861 gdev->sc_dev = dv; 862 LIST_INSERT_HEAD(&sc->sc_devs, gdev, sc_next); 863 } else 864 error = EINVAL; 865 #else 866 if (dv == NULL) 867 error = EINVAL; 868 #endif 869 } else 870 error = EINVAL; 871 mutex_enter(&sc->sc_mtx); 872 sc->sc_attach_busy = 0; 873 cv_signal(&sc->sc_attach); 874 mutex_exit(&sc->sc_mtx); 875 return error; 876 case GPIOSET: 877 if (kauth_authorize_device(cred, KAUTH_DEVICE_GPIO_PINSET, 878 NULL, NULL, NULL, NULL)) 879 return EPERM; 880 881 set = data; 882 883 if (set->gp_name[0] != '\0') 884 pin = gpio_pinbyname(sc, set->gp_name); 885 else 886 pin = set->gp_pin; 887 888 if (pin < 0 || pin >= sc->sc_npins) 889 return EINVAL; 890 flags = set->gp_flags; 891 892 /* check that the controller supports all requested flags */ 893 if ((flags & sc->sc_pins[pin].pin_caps) != flags) 894 return ENODEV; 895 flags = set->gp_flags; 896 897 set->gp_caps = sc->sc_pins[pin].pin_caps; 898 /* return old value */ 899 set->gp_flags = sc->sc_pins[pin].pin_flags; 900 901 if (flags > 0) { 902 flags |= GPIO_PIN_SET; 903 gpiobus_pin_ctl(gc, pin, flags); 904 /* update current value */ 905 sc->sc_pins[pin].pin_flags = flags; 906 } 907 908 /* rename pin or new pin? */ 909 if (set->gp_name2[0] != '\0') { 910 struct gpio_name *gnm; 911 912 gnm = NULL; 913 LIST_FOREACH(nm, &sc->sc_names, gp_next) { 914 if (!strcmp(nm->gp_name, set->gp_name2) && 915 nm->gp_pin != pin) 916 return EINVAL; /* duplicate name */ 917 if (nm->gp_pin == pin) 918 gnm = nm; 919 } 920 if (gnm != NULL) 921 strlcpy(gnm->gp_name, set->gp_name2, 922 sizeof(gnm->gp_name)); 923 else { 924 nm = kmem_alloc(sizeof(struct gpio_name), 925 KM_SLEEP); 926 strlcpy(nm->gp_name, set->gp_name2, 927 sizeof(nm->gp_name)); 928 nm->gp_pin = set->gp_pin; 929 LIST_INSERT_HEAD(&sc->sc_names, nm, gp_next); 930 } 931 } 932 break; 933 case GPIOUNSET: 934 if (kauth_authorize_device(cred, KAUTH_DEVICE_GPIO_PINSET, 935 NULL, NULL, NULL, NULL)) 936 return EPERM; 937 938 set = data; 939 if (set->gp_name[0] != '\0') 940 pin = gpio_pinbyname(sc, set->gp_name); 941 else 942 pin = set->gp_pin; 943 944 if (pin < 0 || pin >= sc->sc_npins) 945 return EINVAL; 946 if (sc->sc_pins[pin].pin_mapped) 947 return EBUSY; 948 if (!(sc->sc_pins[pin].pin_flags & GPIO_PIN_SET)) 949 return EINVAL; 950 951 LIST_FOREACH(nm, &sc->sc_names, gp_next) { 952 if (nm->gp_pin == pin) { 953 LIST_REMOVE(nm, gp_next); 954 kmem_free(nm, sizeof(struct gpio_name)); 955 break; 956 } 957 } 958 sc->sc_pins[pin].pin_flags &= ~GPIO_PIN_SET; 959 break; 960 default: 961 #ifdef COMPAT_50 962 /* Try the old API */ 963 DPRINTF(("%s: trying the old API\n", device_xname(sc->sc_dev))); 964 return gpio_ioctl_oapi(sc, cmd, data, flag, cred); 965 #else 966 return ENOTTY; 967 #endif 968 } 969 return 0; 970 } 971 972 #ifdef COMPAT_50 973 static int 974 gpio_ioctl_oapi(struct gpio_softc *sc, u_long cmd, void *data, int flag, 975 kauth_cred_t cred) 976 { 977 gpio_chipset_tag_t gc; 978 struct gpio_pin_op *op; 979 struct gpio_pin_ctl *ctl; 980 struct gpio_attach *attach; 981 struct gpio_dev *gdev; 982 983 int error, pin, value, flags; 984 985 gc = sc->sc_gc; 986 987 switch (cmd) { 988 case GPIOPINREAD: 989 op = data; 990 991 pin = op->gp_pin; 992 993 if (pin < 0 || pin >= sc->sc_npins) 994 return EINVAL; 995 996 if (!(sc->sc_pins[pin].pin_flags & GPIO_PIN_SET) && 997 kauth_authorize_device(cred, KAUTH_DEVICE_GPIO_PINSET, 998 NULL, NULL, NULL, NULL)) 999 return EPERM; 1000 1001 /* return read value */ 1002 op->gp_value = gpiobus_pin_read(gc, pin); 1003 break; 1004 case GPIOPINWRITE: 1005 if ((flag & FWRITE) == 0) 1006 return EBADF; 1007 1008 op = data; 1009 1010 pin = op->gp_pin; 1011 1012 if (pin < 0 || pin >= sc->sc_npins) 1013 return EINVAL; 1014 1015 if (sc->sc_pins[pin].pin_mapped) 1016 return EBUSY; 1017 1018 if (!(sc->sc_pins[pin].pin_flags & GPIO_PIN_SET) && 1019 kauth_authorize_device(cred, KAUTH_DEVICE_GPIO_PINSET, 1020 NULL, NULL, NULL, NULL)) 1021 return EPERM; 1022 1023 value = op->gp_value; 1024 if (value != GPIO_PIN_LOW && value != GPIO_PIN_HIGH) 1025 return EINVAL; 1026 1027 gpiobus_pin_write(gc, pin, value); 1028 /* return old value */ 1029 op->gp_value = sc->sc_pins[pin].pin_state; 1030 /* update current value */ 1031 sc->sc_pins[pin].pin_state = value; 1032 break; 1033 case GPIOPINTOGGLE: 1034 if ((flag & FWRITE) == 0) 1035 return EBADF; 1036 1037 op = data; 1038 1039 pin = op->gp_pin; 1040 1041 if (pin < 0 || pin >= sc->sc_npins) 1042 return EINVAL; 1043 1044 if (sc->sc_pins[pin].pin_mapped) 1045 return EBUSY; 1046 1047 if (!(sc->sc_pins[pin].pin_flags & GPIO_PIN_SET) && 1048 kauth_authorize_device(cred, KAUTH_DEVICE_GPIO_PINSET, 1049 NULL, NULL, NULL, NULL)) 1050 return EPERM; 1051 1052 value = (sc->sc_pins[pin].pin_state == GPIO_PIN_LOW ? 1053 GPIO_PIN_HIGH : GPIO_PIN_LOW); 1054 gpiobus_pin_write(gc, pin, value); 1055 /* return old value */ 1056 op->gp_value = sc->sc_pins[pin].pin_state; 1057 /* update current value */ 1058 sc->sc_pins[pin].pin_state = value; 1059 break; 1060 case GPIOPINCTL: 1061 ctl = data; 1062 1063 if (kauth_authorize_device(cred, KAUTH_DEVICE_GPIO_PINSET, 1064 NULL, NULL, NULL, NULL)) 1065 return EPERM; 1066 1067 pin = ctl->gp_pin; 1068 1069 if (pin < 0 || pin >= sc->sc_npins) 1070 return EINVAL; 1071 if (sc->sc_pins[pin].pin_mapped) 1072 return EBUSY; 1073 flags = ctl->gp_flags; 1074 1075 /* check that the controller supports all requested flags */ 1076 if ((flags & sc->sc_pins[pin].pin_caps) != flags) 1077 return ENODEV; 1078 1079 ctl->gp_caps = sc->sc_pins[pin].pin_caps; 1080 /* return old value */ 1081 ctl->gp_flags = sc->sc_pins[pin].pin_flags; 1082 if (flags > 0) { 1083 gpiobus_pin_ctl(gc, pin, flags); 1084 /* update current value */ 1085 sc->sc_pins[pin].pin_flags = flags; 1086 } 1087 break; 1088 case GPIODETACH50: 1089 /* FALLTHOUGH */ 1090 case GPIODETACH: 1091 if (kauth_authorize_device(cred, KAUTH_DEVICE_GPIO_PINSET, 1092 NULL, NULL, NULL, NULL)) 1093 return EPERM; 1094 1095 error = 0; 1096 mutex_enter(&sc->sc_mtx); 1097 while (sc->sc_attach_busy) { 1098 error = cv_wait_sig(&sc->sc_attach, &sc->sc_mtx); 1099 if (error) 1100 break; 1101 } 1102 if (!error) 1103 sc->sc_attach_busy = 1; 1104 mutex_exit(&sc->sc_mtx); 1105 if (error) 1106 return EBUSY; 1107 1108 attach = data; 1109 LIST_FOREACH(gdev, &sc->sc_devs, sc_next) { 1110 if (strcmp(device_xname(gdev->sc_dev), 1111 attach->ga_dvname) == 0) { 1112 mutex_enter(&sc->sc_mtx); 1113 sc->sc_attach_busy = 0; 1114 cv_signal(&sc->sc_attach); 1115 mutex_exit(&sc->sc_mtx); 1116 1117 if (config_detach(gdev->sc_dev, 0) == 0) 1118 return 0; 1119 break; 1120 } 1121 } 1122 if (gdev == NULL) { 1123 mutex_enter(&sc->sc_mtx); 1124 sc->sc_attach_busy = 0; 1125 cv_signal(&sc->sc_attach); 1126 mutex_exit(&sc->sc_mtx); 1127 } 1128 return EINVAL; 1129 1130 default: 1131 return ENOTTY; 1132 } 1133 return 0; 1134 } 1135 #endif /* COMPAT_50 */ 1136 1137 MODULE(MODULE_CLASS_DRIVER, gpio, NULL); 1138 1139 #ifdef _MODULE 1140 #include "ioconf.c" 1141 #endif 1142 1143 static int 1144 gpio_modcmd(modcmd_t cmd, void *opaque) 1145 { 1146 #ifdef _MODULE 1147 devmajor_t cmajor = NODEVMAJOR, bmajor = NODEVMAJOR; 1148 int error; 1149 #endif 1150 switch (cmd) { 1151 case MODULE_CMD_INIT: 1152 #ifdef _MODULE 1153 error = config_init_component(cfdriver_ioconf_gpio, 1154 cfattach_ioconf_gpio, cfdata_ioconf_gpio); 1155 if (error) { 1156 aprint_error("%s: unable to init component\n", 1157 gpio_cd.cd_name); 1158 return error; 1159 } 1160 error = devsw_attach(gpio_cd.cd_name, NULL, &bmajor, 1161 &gpio_cdevsw, &cmajor); 1162 if (error) { 1163 aprint_error("%s: unable to register devsw\n", 1164 gpio_cd.cd_name); 1165 return config_fini_component(cfdriver_ioconf_gpio, 1166 cfattach_ioconf_gpio, cfdata_ioconf_gpio); 1167 } 1168 #endif 1169 return 0; 1170 case MODULE_CMD_FINI: 1171 #ifdef _MODULE 1172 config_fini_component(cfdriver_ioconf_gpio, 1173 cfattach_ioconf_gpio, cfdata_ioconf_gpio); 1174 devsw_detach(NULL, &gpio_cdevsw); 1175 #endif 1176 return 0; 1177 default: 1178 return ENOTTY; 1179 } 1180 } 1181
Indexes created Tue Sep 23 07:09:52 GMT 2025