gpio.c revision 1.74
1 /* $NetBSD: gpio.c,v 1.74 2024/12/08 20:40:38 jmcneill Exp $ */ 2 /* $OpenBSD: gpio.c,v 1.6 2006/01/14 12:33:49 grange Exp $ */ 3 4 /* 5 * Copyright (c) 2008, 2009, 2010, 2011 Marc Balmer <marc (at) msys.ch> 6 * Copyright (c) 2004, 2006 Alexander Yurchenko <grange (at) openbsd.org> 7 * 8 * Permission to use, copy, modify, and distribute this software for any 9 * purpose with or without fee is hereby granted, provided that the above 10 * copyright notice and this permission notice appear in all copies. 11 * 12 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 13 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 14 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 15 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 16 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 17 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 18 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 19 */ 20 21 #ifdef _KERNEL_OPT 22 #include "opt_fdt.h" 23 #endif 24 25 #include <sys/cdefs.h> 26 __KERNEL_RCSID(0, "$NetBSD: gpio.c,v 1.74 2024/12/08 20:40:38 jmcneill Exp $"); 27 28 /* 29 * General Purpose Input/Output framework. 30 */ 31 32 #include <sys/param.h> 33 #include <sys/callout.h> 34 #include <sys/systm.h> 35 #include <sys/conf.h> 36 #include <sys/device.h> 37 #include <sys/fcntl.h> 38 #include <sys/ioctl.h> 39 #include <sys/gpio.h> 40 #include <sys/kernel.h> 41 #include <sys/vnode.h> 42 #include <sys/kmem.h> 43 #include <sys/mutex.h> 44 #include <sys/condvar.h> 45 #include <sys/queue.h> 46 #include <sys/kauth.h> 47 #include <sys/module.h> 48 49 #include <dev/gpio/gpiovar.h> 50 51 #ifdef FDT 52 #include <dev/fdt/fdtvar.h> 53 #endif 54 55 #include "ioconf.h" 56 #include "locators.h" 57 58 #ifdef GPIO_DEBUG 59 #define DPRINTFN(n, x) do { if (gpiodebug > (n)) printf x; } while (0) 60 int gpiodebug = 0; 61 #else 62 #define DPRINTFN(n, x) 63 #endif 64 #define DPRINTF(x) DPRINTFN(0, x) 65 66 struct gpio_softc { 67 device_t sc_dev; 68 69 gpio_chipset_tag_t sc_gc; /* GPIO controller */ 70 gpio_pin_t *sc_pins; /* pins array */ 71 int sc_npins; /* number of pins */ 72 73 kmutex_t sc_mtx; 74 kcondvar_t sc_ioctl; /* ioctl in progress */ 75 int sc_ioctl_busy; /* ioctl is busy */ 76 kcondvar_t sc_attach; /* attach/detach in progress */ 77 int sc_attach_busy;/* busy in attach/detach */ 78 #ifdef COMPAT_50 79 LIST_HEAD(, gpio_dev) sc_devs; /* devices */ 80 #endif 81 LIST_HEAD(, gpio_name) sc_names; /* named pins */ 82 }; 83 84 static int gpio_match(device_t, cfdata_t, void *); 85 int gpio_submatch(device_t, cfdata_t, const int *, void *); 86 static void gpio_attach(device_t, device_t, void *); 87 static int gpio_rescan(device_t, const char *, const int *); 88 static void gpio_childdetached(device_t, device_t); 89 static bool gpio_resume(device_t, const pmf_qual_t *); 90 static int gpio_detach(device_t, int); 91 static int gpio_search(device_t, cfdata_t, const int *, void *); 92 static int gpio_print(void *, const char *); 93 static int gpio_pinbyname(struct gpio_softc *, char *); 94 static int gpio_ioctl(struct gpio_softc *, u_long, void *, int, 95 struct lwp *); 96 97 #ifdef COMPAT_50 98 /* Old API */ 99 static int gpio_ioctl_oapi(struct gpio_softc *, u_long, void *, int, 100 struct lwp *); 101 #endif 102 103 CFATTACH_DECL3_NEW(gpio, sizeof(struct gpio_softc), 104 gpio_match, gpio_attach, gpio_detach, NULL, gpio_rescan, 105 gpio_childdetached, DVF_DETACH_SHUTDOWN); 106 107 dev_type_open(gpioopen); 108 dev_type_close(gpioclose); 109 dev_type_ioctl(gpioioctl); 110 dev_type_ioctl(gpioioctl_locked); 111 112 const struct cdevsw gpio_cdevsw = { 113 .d_open = gpioopen, 114 .d_close = gpioclose, 115 .d_read = noread, 116 .d_write = nowrite, 117 .d_ioctl = gpioioctl, 118 .d_stop = nostop, 119 .d_tty = notty, 120 .d_poll = nopoll, 121 .d_mmap = nommap, 122 .d_kqfilter = nokqfilter, 123 .d_discard = nodiscard, 124 .d_flag = D_OTHER | D_MPSAFE 125 }; 126 127 static int 128 gpio_match(device_t parent, cfdata_t cf, void *aux) 129 { 130 return 1; 131 } 132 133 int 134 gpio_submatch(device_t parent, cfdata_t cf, const int *ip, void *aux) 135 { 136 struct gpio_attach_args *ga = aux; 137 138 if (ga->ga_offset == -1) 139 return 0; 140 141 return strcmp(ga->ga_dvname, cf->cf_name) == 0; 142 } 143 144 static bool 145 gpio_resume(device_t self, const pmf_qual_t *qual) 146 { 147 struct gpio_softc *sc = device_private(self); 148 int pin; 149 150 for (pin = 0; pin < sc->sc_npins; pin++) { 151 gpiobus_pin_ctl(sc->sc_gc, pin, sc->sc_pins[pin].pin_flags); 152 gpiobus_pin_write(sc->sc_gc, pin, sc->sc_pins[pin].pin_state); 153 } 154 return true; 155 } 156 157 static void 158 gpio_childdetached(device_t self, device_t child) 159 { 160 #ifdef COMPAT_50 161 struct gpio_dev *gdev; 162 struct gpio_softc *sc; 163 int error; 164 165 /* 166 * gpio_childetached is serialized because it can be entered in 167 * different ways concurrently, e.g. via the GPIODETACH ioctl and 168 * drvctl(8) or modunload(8). 169 */ 170 sc = device_private(self); 171 error = 0; 172 mutex_enter(&sc->sc_mtx); 173 while (sc->sc_attach_busy) { 174 error = cv_wait_sig(&sc->sc_attach, &sc->sc_mtx); 175 if (error) 176 break; 177 } 178 if (!error) 179 sc->sc_attach_busy = 1; 180 mutex_exit(&sc->sc_mtx); 181 if (error) 182 return; 183 184 KERNEL_LOCK(1, NULL); 185 LIST_FOREACH(gdev, &sc->sc_devs, sc_next) 186 if (gdev->sc_dev == child) { 187 LIST_REMOVE(gdev, sc_next); 188 kmem_free(gdev, sizeof(struct gpio_dev)); 189 break; 190 } 191 KERNEL_UNLOCK_ONE(NULL); 192 193 mutex_enter(&sc->sc_mtx); 194 sc->sc_attach_busy = 0; 195 cv_signal(&sc->sc_attach); 196 mutex_exit(&sc->sc_mtx); 197 #endif 198 } 199 200 static int 201 gpio_rescan(device_t self, const char *ifattr, const int *locators) 202 { 203 204 KERNEL_LOCK(1, NULL); 205 config_search(self, NULL, 206 CFARGS(.search = gpio_search)); 207 KERNEL_UNLOCK_ONE(NULL); 208 209 return 0; 210 } 211 212 static const char * 213 gpio_pin_defname(struct gpio_softc *sc, int pin) 214 { 215 KASSERT(pin >= 0); 216 217 #ifdef FDT 218 devhandle_t devhandle = device_handle(sc->sc_dev); 219 220 if (devhandle_type(devhandle) == DEVHANDLE_TYPE_OF) { 221 return fdtbus_get_string_index(devhandle_to_of(devhandle), 222 "gpio-line-names", pin); 223 } 224 #endif /* FDT */ 225 226 return NULL; 227 } 228 229 static void 230 gpio_attach(device_t parent, device_t self, void *aux) 231 { 232 struct gpio_softc *sc = device_private(self); 233 struct gpiobus_attach_args *gba = aux; 234 struct gpio_name *nm; 235 int pin; 236 237 sc->sc_dev = self; 238 sc->sc_gc = gba->gba_gc; 239 sc->sc_pins = gba->gba_pins; 240 sc->sc_npins = gba->gba_npins; 241 242 aprint_normal(": %d pins\n", sc->sc_npins); 243 aprint_naive("\n"); 244 245 /* Configure default pin names */ 246 for (pin = 0; pin < sc->sc_npins; pin++) { 247 const char *defname; 248 249 defname = gpio_pin_defname(sc, pin); 250 if (defname == NULL && 251 sc->sc_pins[pin].pin_defname[0] != '\0') { 252 defname = sc->sc_pins[pin].pin_defname; 253 } 254 if (defname == NULL) { 255 continue; 256 } 257 nm = kmem_alloc(sizeof(*nm), KM_SLEEP); 258 strlcpy(nm->gp_name, defname, sizeof(nm->gp_name)); 259 nm->gp_pin = pin; 260 LIST_INSERT_HEAD(&sc->sc_names, nm, gp_next); 261 } 262 263 if (!pmf_device_register(self, NULL, gpio_resume)) 264 aprint_error_dev(self, "couldn't establish power handler\n"); 265 mutex_init(&sc->sc_mtx, MUTEX_DEFAULT, IPL_VM); 266 cv_init(&sc->sc_ioctl, "gpioctl"); 267 cv_init(&sc->sc_attach, "gpioatch"); 268 /* 269 * Attach all devices that can be connected to the GPIO pins 270 * described in the kernel configuration file. 271 */ 272 gpio_rescan(self, "gpio", NULL); 273 } 274 275 static int 276 gpio_detach(device_t self, int flags) 277 { 278 struct gpio_softc *sc; 279 int rc; 280 281 sc = device_private(self); 282 283 if ((rc = config_detach_children(self, flags)) != 0) 284 return rc; 285 mutex_destroy(&sc->sc_mtx); 286 cv_destroy(&sc->sc_ioctl); 287 #if 0 288 int maj, mn; 289 290 /* Locate the major number */ 291 for (maj = 0; maj < nchrdev; maj++) 292 if (cdevsw[maj].d_open == gpioopen) 293 break; 294 295 /* Nuke the vnodes for any open instances (calls close) */ 296 mn = device_unit(self); 297 vdevgone(maj, mn, mn, VCHR); 298 #endif 299 return 0; 300 } 301 302 static int 303 gpio_search(device_t parent, cfdata_t cf, const int *ldesc, void *aux) 304 { 305 struct gpio_attach_args ga; 306 size_t namlen; 307 308 ga.ga_gpio = device_private(parent); 309 ga.ga_offset = cf->cf_loc[GPIOCF_OFFSET]; 310 ga.ga_mask = cf->cf_loc[GPIOCF_MASK]; 311 ga.ga_flags = cf->cf_loc[GPIOCF_FLAG]; 312 namlen = strlen(cf->cf_name) + 1; 313 ga.ga_dvname = kmem_alloc(namlen, KM_SLEEP); 314 strcpy(ga.ga_dvname, cf->cf_name); 315 316 if (config_probe(parent, cf, &ga)) 317 config_attach(parent, cf, &ga, gpio_print, CFARGS_NONE); 318 kmem_free(ga.ga_dvname, namlen); 319 return 0; 320 } 321 322 int 323 gpio_print(void *aux, const char *pnp) 324 { 325 struct gpio_attach_args *ga = aux; 326 int i; 327 328 aprint_normal(" pins"); 329 for (i = 0; i < 32; i++) 330 if (ga->ga_mask & (1 << i)) 331 aprint_normal(" %d", ga->ga_offset + i); 332 333 return UNCONF; 334 } 335 336 int 337 gpiobus_print(void *aux, const char *pnp) 338 { 339 #if 0 340 struct gpiobus_attach_args *gba = aux; 341 #endif 342 if (pnp != NULL) 343 aprint_normal("gpiobus at %s", pnp); 344 345 return UNCONF; 346 } 347 348 void * 349 gpio_find_device(const char *name) 350 { 351 device_t gpio_dev; 352 gpio_dev = device_find_by_xname(name); 353 if (gpio_dev == NULL) 354 return NULL; 355 return device_private(gpio_dev); 356 } 357 358 const char * 359 gpio_get_name(void *gpio) 360 { 361 struct gpio_softc *sc = gpio; 362 return device_xname(sc->sc_dev); 363 } 364 365 /* return 1 if all pins can be mapped, 0 if not */ 366 int 367 gpio_pin_can_map(void *gpio, int offset, uint32_t mask) 368 { 369 struct gpio_softc *sc = gpio; 370 int npins, pin, i; 371 372 npins = gpio_npins(mask); 373 if (npins > sc->sc_npins) 374 return 0; 375 376 for (npins = 0, i = 0; i < 32; i++) 377 if (mask & (1 << i)) { 378 pin = offset + i; 379 if (pin < 0 || pin >= sc->sc_npins) 380 return 0; 381 if (sc->sc_pins[pin].pin_mapped) 382 return 0; 383 } 384 385 return 1; 386 } 387 388 int 389 gpio_pin_map(void *gpio, int offset, uint32_t mask, struct gpio_pinmap *map) 390 { 391 struct gpio_softc *sc = gpio; 392 int npins, pin, i; 393 394 npins = gpio_npins(mask); 395 if (npins > sc->sc_npins) 396 return 1; 397 398 for (npins = 0, i = 0; i < 32; i++) 399 if (mask & (1 << i)) { 400 pin = offset + i; 401 if (pin < 0 || pin >= sc->sc_npins) 402 return 1; 403 if (sc->sc_pins[pin].pin_mapped) 404 return 1; 405 sc->sc_pins[pin].pin_mapped = 1; 406 map->pm_map[npins++] = pin; 407 } 408 map->pm_size = npins; 409 410 return 0; 411 } 412 413 void 414 gpio_pin_unmap(void *gpio, struct gpio_pinmap *map) 415 { 416 struct gpio_softc *sc = gpio; 417 int pin, i; 418 419 for (i = 0; i < map->pm_size; i++) { 420 pin = map->pm_map[i]; 421 sc->sc_pins[pin].pin_mapped = 0; 422 } 423 } 424 425 int 426 gpio_pin_read(void *gpio, struct gpio_pinmap *map, int pin) 427 { 428 struct gpio_softc *sc = gpio; 429 430 return gpiobus_pin_read(sc->sc_gc, map->pm_map[pin]); 431 } 432 433 void 434 gpio_pin_write(void *gpio, struct gpio_pinmap *map, int pin, int value) 435 { 436 struct gpio_softc *sc = gpio; 437 438 gpiobus_pin_write(sc->sc_gc, map->pm_map[pin], value); 439 sc->sc_pins[map->pm_map[pin]].pin_state = value; 440 } 441 442 int 443 gpio_pin_get_conf(void *gpio, struct gpio_pinmap *map, int pin) 444 { 445 struct gpio_softc *sc = gpio; 446 int rv; 447 448 mutex_enter(&sc->sc_mtx); 449 rv = sc->sc_pins[map->pm_map[pin]].pin_flags; 450 mutex_exit(&sc->sc_mtx); 451 452 return (rv); 453 } 454 455 bool 456 gpio_pin_set_conf(void *gpio, struct gpio_pinmap *map, int pin, int flags) 457 { 458 struct gpio_softc *sc = gpio; 459 int checkflags = flags & GPIO_PIN_HWCAPS; 460 461 if ((sc->sc_pins[map->pm_map[pin]].pin_caps & checkflags) != checkflags) 462 return (false); 463 464 gpio_pin_ctl(gpio, map, pin, flags); 465 466 return (true); 467 } 468 469 void 470 gpio_pin_ctl(void *gpio, struct gpio_pinmap *map, int pin, int flags) 471 { 472 struct gpio_softc *sc = gpio; 473 474 /* loosey-goosey version of gpio_pin_set_conf(). */ 475 476 mutex_enter(&sc->sc_mtx); 477 gpiobus_pin_ctl(sc->sc_gc, map->pm_map[pin], flags); 478 sc->sc_pins[map->pm_map[pin]].pin_flags = flags; 479 mutex_exit(&sc->sc_mtx); 480 } 481 482 int 483 gpio_pin_caps(void *gpio, struct gpio_pinmap *map, int pin) 484 { 485 struct gpio_softc *sc = gpio; 486 487 return sc->sc_pins[map->pm_map[pin]].pin_caps; 488 } 489 490 int 491 gpio_pin_intrcaps(void *gpio, struct gpio_pinmap *map, int pin) 492 { 493 struct gpio_softc *sc = gpio; 494 495 return sc->sc_pins[map->pm_map[pin]].pin_intrcaps; 496 } 497 498 static int 499 gpio_irqmode_sanitize(int irqmode) 500 { 501 int has_edge, has_level; 502 503 has_edge = irqmode & GPIO_INTR_EDGE_MASK; 504 has_level = irqmode & GPIO_INTR_LEVEL_MASK; 505 506 /* Must specify an interrupt mode. */ 507 if ((irqmode & GPIO_INTR_MODE_MASK) == 0) 508 return (0); 509 510 /* Can't specify edge and level together */ 511 if (has_level && has_edge) 512 return (0); 513 514 /* "Be liberal in what you accept..." */ 515 if (has_edge) { 516 if (irqmode & GPIO_INTR_DOUBLE_EDGE) { 517 /* if DOUBLE is set, just pass through DOUBLE */ 518 irqmode = (irqmode & ~GPIO_INTR_EDGE_MASK) | 519 GPIO_INTR_DOUBLE_EDGE; 520 } else if ((irqmode ^ 521 (GPIO_INTR_POS_EDGE | GPIO_INTR_NEG_EDGE)) == 0) { 522 /* both POS and NEG set; treat as DOUBLE */ 523 irqmode = (irqmode & ~GPIO_INTR_EDGE_MASK) | 524 GPIO_INTR_DOUBLE_EDGE; 525 } 526 } else { 527 /* Can't specify both levels together. */ 528 if (has_level == GPIO_INTR_LEVEL_MASK) 529 return (0); 530 } 531 532 return (irqmode); 533 } 534 535 bool 536 gpio_pin_irqmode_issupported(void *gpio, struct gpio_pinmap *map, 537 int pin, int irqmode) 538 { 539 struct gpio_softc *sc = gpio; 540 int match; 541 542 irqmode = gpio_irqmode_sanitize(irqmode) & GPIO_INTR_MODE_MASK; 543 544 /* Make sure the pin can do what is being asked. */ 545 match = sc->sc_pins[map->pm_map[pin]].pin_intrcaps & irqmode; 546 547 return (irqmode && irqmode == match); 548 } 549 550 void * 551 gpio_intr_establish(void *gpio, struct gpio_pinmap *map, int pin, int ipl, 552 int irqmode, int (*func)(void *), void *arg) 553 { 554 struct gpio_softc *sc = gpio; 555 556 if (sc->sc_gc->gp_intr_establish == NULL) 557 return (NULL); 558 559 irqmode = gpio_irqmode_sanitize(irqmode); 560 if (irqmode == 0) 561 return (NULL); 562 563 if (! gpio_pin_irqmode_issupported(gpio, map, pin, irqmode)) 564 return (NULL); 565 566 /* XXX Right now, everything has to be at IPL_VM. */ 567 if (ipl != IPL_VM) 568 return (NULL); 569 570 return ((*sc->sc_gc->gp_intr_establish)(sc->sc_gc->gp_cookie, 571 sc->sc_pins[map->pm_map[pin]].pin_num, ipl, irqmode, func, arg)); 572 } 573 574 void 575 gpio_intr_disestablish(void *gpio, void *ih) 576 { 577 struct gpio_softc *sc = gpio; 578 579 if (sc->sc_gc->gp_intr_disestablish != NULL && ih != NULL) 580 (*sc->sc_gc->gp_intr_disestablish)(sc->sc_gc->gp_cookie, ih); 581 } 582 583 bool 584 gpio_intr_str(void *gpio, struct gpio_pinmap *map, int pin, int irqmode, 585 char *intrstr, size_t intrstrlen) 586 { 587 struct gpio_softc *sc = gpio; 588 const char *mode; 589 char hwstr[64]; 590 591 if (sc->sc_gc->gp_intr_str == NULL) 592 return (false); 593 594 irqmode = gpio_irqmode_sanitize(irqmode); 595 if (irqmode == 0) 596 return (false); 597 598 if (irqmode & GPIO_INTR_DOUBLE_EDGE) 599 mode = "double edge"; 600 else if (irqmode & GPIO_INTR_POS_EDGE) 601 mode = "positive edge"; 602 else if (irqmode & GPIO_INTR_NEG_EDGE) 603 mode = "negative edge"; 604 else if (irqmode & GPIO_INTR_HIGH_LEVEL) 605 mode = "high level"; 606 else if (irqmode & GPIO_INTR_LOW_LEVEL) 607 mode = "low level"; 608 else 609 return (false); 610 611 if (! (*sc->sc_gc->gp_intr_str)(sc->sc_gc->gp_cookie, 612 sc->sc_pins[map->pm_map[pin]].pin_num, 613 irqmode, hwstr, sizeof(hwstr))) 614 return (false); 615 616 (void) snprintf(intrstr, intrstrlen, "%s (%s)", hwstr, mode); 617 618 return (true); 619 } 620 621 void 622 gpio_intr_mask(void *gpio, void *ih) 623 { 624 struct gpio_softc *sc = gpio; 625 626 if (sc->sc_gc->gp_intr_mask == NULL) 627 return; 628 629 sc->sc_gc->gp_intr_mask(sc->sc_gc->gp_cookie, ih); 630 } 631 632 void 633 gpio_intr_unmask(void *gpio, void *ih) 634 { 635 struct gpio_softc *sc = gpio; 636 637 if (sc->sc_gc->gp_intr_unmask == NULL) 638 return; 639 640 sc->sc_gc->gp_intr_unmask(sc->sc_gc->gp_cookie, ih); 641 } 642 643 int 644 gpio_pin_to_pin_num(void *gpio, struct gpio_pinmap *map, int pin) 645 { 646 struct gpio_softc *sc = gpio; 647 648 return sc->sc_pins[map->pm_map[pin]].pin_num; 649 } 650 651 int 652 gpio_npins(uint32_t mask) 653 { 654 int npins, i; 655 656 for (npins = 0, i = 0; i < 32; i++) 657 if (mask & (1 << i)) 658 npins++; 659 660 return npins; 661 } 662 663 int 664 gpio_lock(void *data) 665 { 666 struct gpio_softc *sc; 667 int error; 668 669 error = 0; 670 sc = data; 671 mutex_enter(&sc->sc_mtx); 672 while (sc->sc_ioctl_busy) { 673 error = cv_wait_sig(&sc->sc_ioctl, &sc->sc_mtx); 674 if (error) 675 break; 676 } 677 if (!error) 678 sc->sc_ioctl_busy = 1; 679 mutex_exit(&sc->sc_mtx); 680 return error; 681 } 682 683 void 684 gpio_unlock(void *data) 685 { 686 struct gpio_softc *sc; 687 688 sc = data; 689 mutex_enter(&sc->sc_mtx); 690 sc->sc_ioctl_busy = 0; 691 cv_signal(&sc->sc_ioctl); 692 mutex_exit(&sc->sc_mtx); 693 } 694 695 int 696 gpioopen(dev_t dev, int flag, int mode, struct lwp *l) 697 { 698 struct gpio_softc *sc; 699 700 sc = device_lookup_private(&gpio_cd, minor(dev)); 701 if (sc == NULL) 702 return ENXIO; 703 704 return gpiobus_open(sc->sc_gc, sc->sc_dev); 705 } 706 707 int 708 gpioclose(dev_t dev, int flag, int mode, struct lwp *l) 709 { 710 struct gpio_softc *sc; 711 712 sc = device_lookup_private(&gpio_cd, minor(dev)); 713 return gpiobus_close(sc->sc_gc, sc->sc_dev); 714 } 715 716 static int 717 gpio_pinbyname(struct gpio_softc *sc, char *gp_name) 718 { 719 struct gpio_name *nm; 720 721 LIST_FOREACH(nm, &sc->sc_names, gp_next) 722 if (!strcmp(nm->gp_name, gp_name)) 723 return nm->gp_pin; 724 return -1; 725 } 726 727 int 728 gpioioctl(dev_t dev, u_long cmd, void *data, int flag, struct lwp *l) 729 { 730 int error; 731 struct gpio_softc *sc; 732 733 sc = device_lookup_private(&gpio_cd, minor(dev)); 734 735 error = gpio_lock(sc); 736 if (error) 737 return error; 738 739 error = gpio_ioctl(sc, cmd, data, flag, l); 740 gpio_unlock(sc); 741 return error; 742 } 743 744 static int 745 gpio_ioctl(struct gpio_softc *sc, u_long cmd, void *data, int flag, 746 struct lwp *l) 747 { 748 gpio_chipset_tag_t gc; 749 struct gpio_info *info; 750 struct gpio_attach *attach; 751 struct gpio_attach_args ga; 752 struct gpio_req *req; 753 struct gpio_name *nm; 754 struct gpio_set *set; 755 #ifdef COMPAT_50 756 struct gpio_dev *gdev; 757 #endif 758 device_t dv; 759 cfdata_t cf; 760 int locs[GPIOCF_NLOCS]; 761 int error, pin, value, flags; 762 763 gc = sc->sc_gc; 764 ga.ga_flags = 0; 765 766 if (cmd != GPIOINFO && !device_is_active(sc->sc_dev)) { 767 DPRINTF(("%s: device is not active\n", 768 device_xname(sc->sc_dev))); 769 return EBUSY; 770 } 771 772 switch (cmd) { 773 case GPIOINFO: 774 info = data; 775 info->gpio_npins = sc->sc_npins; 776 break; 777 case GPIOREAD: 778 req = data; 779 780 if (req->gp_name[0] != '\0') 781 req->gp_pin = gpio_pinbyname(sc, req->gp_name); 782 pin = req->gp_pin; 783 784 if (pin < 0 || pin >= sc->sc_npins) 785 return EINVAL; 786 787 if (!(sc->sc_pins[pin].pin_flags & GPIO_PIN_SET) && 788 kauth_authorize_device(l->l_cred, 789 KAUTH_DEVICE_GPIO_PINSET, NULL, NULL, NULL, NULL)) 790 return EPERM; 791 792 /* return read value */ 793 req->gp_value = gpiobus_pin_read(gc, pin); 794 LIST_FOREACH(nm, &sc->sc_names, gp_next) 795 if (nm->gp_pin == pin) { 796 strlcpy(req->gp_name, nm->gp_name, GPIOMAXNAME); 797 break; 798 } 799 break; 800 case GPIOWRITE: 801 if ((flag & FWRITE) == 0) 802 return EBADF; 803 804 req = data; 805 806 if (req->gp_name[0] != '\0') 807 pin = gpio_pinbyname(sc, req->gp_name); 808 else 809 pin = req->gp_pin; 810 811 if (pin < 0 || pin >= sc->sc_npins) 812 return EINVAL; 813 814 if (sc->sc_pins[pin].pin_mapped) 815 return EBUSY; 816 817 if (!(sc->sc_pins[pin].pin_flags & GPIO_PIN_SET) && 818 kauth_authorize_device(l->l_cred, 819 KAUTH_DEVICE_GPIO_PINSET, NULL, NULL, NULL, NULL)) 820 return EPERM; 821 822 value = req->gp_value; 823 if (value != GPIO_PIN_LOW && value != GPIO_PIN_HIGH) 824 return EINVAL; 825 826 /* return old value */ 827 req->gp_value = gpiobus_pin_read(gc, pin); 828 gpiobus_pin_write(gc, pin, value); 829 /* update current value */ 830 sc->sc_pins[pin].pin_state = value; 831 break; 832 case GPIOTOGGLE: 833 if ((flag & FWRITE) == 0) 834 return EBADF; 835 836 req = data; 837 838 if (req->gp_name[0] != '\0') 839 pin = gpio_pinbyname(sc, req->gp_name); 840 else 841 pin = req->gp_pin; 842 843 if (pin < 0 || pin >= sc->sc_npins) 844 return EINVAL; 845 846 if (sc->sc_pins[pin].pin_mapped) 847 return EBUSY; 848 849 if (!(sc->sc_pins[pin].pin_flags & GPIO_PIN_SET) && 850 kauth_authorize_device(l->l_cred, 851 KAUTH_DEVICE_GPIO_PINSET, NULL, NULL, NULL, NULL)) 852 return EPERM; 853 854 value = (sc->sc_pins[pin].pin_state == GPIO_PIN_LOW ? 855 GPIO_PIN_HIGH : GPIO_PIN_LOW); 856 gpiobus_pin_write(gc, pin, value); 857 /* return old value */ 858 req->gp_value = sc->sc_pins[pin].pin_state; 859 /* update current value */ 860 sc->sc_pins[pin].pin_state = value; 861 break; 862 case GPIOATTACH: 863 attach = data; 864 ga.ga_flags = attach->ga_flags; 865 #ifdef COMPAT_50 866 /* FALLTHROUGH */ 867 case GPIOATTACH50: 868 /* 869 * The double assignment to 'attach' in case of GPIOATTACH 870 * and COMPAT_50 is on purpose. It ensures backward 871 * compatibility in case we are called through the old 872 * GPIOATTACH50 ioctl(2), which had not the ga_flags field 873 * in struct gpio_attach. 874 */ 875 attach = data; 876 #endif 877 if (kauth_authorize_device(l->l_cred, 878 KAUTH_DEVICE_GPIO_PINSET, NULL, NULL, NULL, NULL)) 879 return EPERM; 880 881 /* do not try to attach if the pins are already mapped */ 882 if (!gpio_pin_can_map(sc, attach->ga_offset, attach->ga_mask)) 883 return EBUSY; 884 885 error = 0; 886 mutex_enter(&sc->sc_mtx); 887 while (sc->sc_attach_busy) { 888 error = cv_wait_sig(&sc->sc_attach, &sc->sc_mtx); 889 if (error) 890 break; 891 } 892 if (!error) 893 sc->sc_attach_busy = 1; 894 mutex_exit(&sc->sc_mtx); 895 if (error) 896 return EBUSY; 897 898 ga.ga_gpio = sc; 899 /* Don't access attach->ga_flags here. */ 900 ga.ga_dvname = attach->ga_dvname; 901 ga.ga_offset = attach->ga_offset; 902 ga.ga_mask = attach->ga_mask; 903 DPRINTF(("%s: attach %s with offset %d, mask " 904 "0x%02x, and flags 0x%02x\n", device_xname(sc->sc_dev), 905 ga.ga_dvname, ga.ga_offset, ga.ga_mask, ga.ga_flags)); 906 907 locs[GPIOCF_OFFSET] = ga.ga_offset; 908 locs[GPIOCF_MASK] = ga.ga_mask; 909 locs[GPIOCF_FLAG] = ga.ga_flags; 910 911 KERNEL_LOCK(1, NULL); 912 cf = config_search(sc->sc_dev, &ga, 913 CFARGS(.locators = locs)); 914 if (cf != NULL) { 915 dv = config_attach(sc->sc_dev, cf, &ga, 916 gpiobus_print, 917 CFARGS(.locators = locs)); 918 #ifdef COMPAT_50 919 if (dv != NULL) { 920 gdev = kmem_alloc(sizeof(struct gpio_dev), 921 KM_SLEEP); 922 gdev->sc_dev = dv; 923 LIST_INSERT_HEAD(&sc->sc_devs, gdev, sc_next); 924 } else 925 error = EINVAL; 926 #else 927 if (dv == NULL) 928 error = EINVAL; 929 #endif 930 } else 931 error = EINVAL; 932 KERNEL_UNLOCK_ONE(NULL); 933 934 mutex_enter(&sc->sc_mtx); 935 sc->sc_attach_busy = 0; 936 cv_signal(&sc->sc_attach); 937 mutex_exit(&sc->sc_mtx); 938 return error; 939 case GPIOSET: 940 if (kauth_authorize_device(l->l_cred, 941 KAUTH_DEVICE_GPIO_PINSET, NULL, NULL, NULL, NULL)) 942 return EPERM; 943 944 set = data; 945 946 if (set->gp_name[0] != '\0') 947 pin = gpio_pinbyname(sc, set->gp_name); 948 else 949 pin = set->gp_pin; 950 951 if (pin < 0 || pin >= sc->sc_npins) 952 return EINVAL; 953 flags = set->gp_flags; 954 955 /* check that the controller supports all requested flags */ 956 if ((flags & sc->sc_pins[pin].pin_caps) != flags) 957 return ENODEV; 958 flags = set->gp_flags; 959 960 set->gp_caps = sc->sc_pins[pin].pin_caps; 961 /* return old value */ 962 set->gp_flags = sc->sc_pins[pin].pin_flags; 963 964 if (flags > 0) { 965 flags |= GPIO_PIN_SET; 966 gpiobus_pin_ctl(gc, pin, flags); 967 /* update current value */ 968 sc->sc_pins[pin].pin_flags = flags; 969 } 970 971 /* rename pin or new pin? */ 972 if (set->gp_name2[0] != '\0') { 973 struct gpio_name *gnm; 974 975 gnm = NULL; 976 LIST_FOREACH(nm, &sc->sc_names, gp_next) { 977 if (!strcmp(nm->gp_name, set->gp_name2) && 978 nm->gp_pin != pin) 979 return EINVAL; /* duplicate name */ 980 if (nm->gp_pin == pin) 981 gnm = nm; 982 } 983 if (gnm != NULL) 984 strlcpy(gnm->gp_name, set->gp_name2, 985 sizeof(gnm->gp_name)); 986 else { 987 nm = kmem_alloc(sizeof(struct gpio_name), 988 KM_SLEEP); 989 strlcpy(nm->gp_name, set->gp_name2, 990 sizeof(nm->gp_name)); 991 nm->gp_pin = set->gp_pin; 992 LIST_INSERT_HEAD(&sc->sc_names, nm, gp_next); 993 } 994 } 995 break; 996 case GPIOUNSET: 997 if (kauth_authorize_device(l->l_cred, 998 KAUTH_DEVICE_GPIO_PINSET, NULL, NULL, NULL, NULL)) 999 return EPERM; 1000 1001 set = data; 1002 if (set->gp_name[0] != '\0') 1003 pin = gpio_pinbyname(sc, set->gp_name); 1004 else 1005 pin = set->gp_pin; 1006 1007 if (pin < 0 || pin >= sc->sc_npins) 1008 return EINVAL; 1009 if (sc->sc_pins[pin].pin_mapped) 1010 return EBUSY; 1011 if (!(sc->sc_pins[pin].pin_flags & GPIO_PIN_SET)) 1012 return EINVAL; 1013 1014 LIST_FOREACH(nm, &sc->sc_names, gp_next) { 1015 if (nm->gp_pin == pin) { 1016 LIST_REMOVE(nm, gp_next); 1017 kmem_free(nm, sizeof(struct gpio_name)); 1018 break; 1019 } 1020 } 1021 sc->sc_pins[pin].pin_flags &= ~GPIO_PIN_SET; 1022 break; 1023 default: 1024 #ifdef COMPAT_50 1025 /* Try the old API */ 1026 DPRINTF(("%s: trying the old API\n", device_xname(sc->sc_dev))); 1027 return gpio_ioctl_oapi(sc, cmd, data, flag, l); 1028 #else 1029 return ENOTTY; 1030 #endif 1031 } 1032 return 0; 1033 } 1034 1035 #ifdef COMPAT_50 1036 static int 1037 gpio_ioctl_oapi(struct gpio_softc *sc, u_long cmd, void *data, int flag, 1038 struct lwp *l) 1039 { 1040 gpio_chipset_tag_t gc; 1041 struct gpio_pin_op *op; 1042 struct gpio_pin_ctl *ctl; 1043 struct gpio_attach *attach; 1044 struct gpio_dev *gdev; 1045 1046 int error, pin, value, flags; 1047 1048 gc = sc->sc_gc; 1049 1050 switch (cmd) { 1051 case GPIOPINREAD: 1052 op = data; 1053 1054 pin = op->gp_pin; 1055 1056 if (pin < 0 || pin >= sc->sc_npins) 1057 return EINVAL; 1058 1059 if (!(sc->sc_pins[pin].pin_flags & GPIO_PIN_SET) && 1060 kauth_authorize_device(l->l_cred, 1061 KAUTH_DEVICE_GPIO_PINSET, NULL, NULL, NULL, NULL)) 1062 return EPERM; 1063 1064 /* return read value */ 1065 op->gp_value = gpiobus_pin_read(gc, pin); 1066 break; 1067 case GPIOPINWRITE: 1068 if ((flag & FWRITE) == 0) 1069 return EBADF; 1070 1071 op = data; 1072 1073 pin = op->gp_pin; 1074 1075 if (pin < 0 || pin >= sc->sc_npins) 1076 return EINVAL; 1077 1078 if (sc->sc_pins[pin].pin_mapped) 1079 return EBUSY; 1080 1081 if (!(sc->sc_pins[pin].pin_flags & GPIO_PIN_SET) && 1082 kauth_authorize_device(l->l_cred, 1083 KAUTH_DEVICE_GPIO_PINSET, NULL, NULL, NULL, NULL)) 1084 return EPERM; 1085 1086 value = op->gp_value; 1087 if (value != GPIO_PIN_LOW && value != GPIO_PIN_HIGH) 1088 return EINVAL; 1089 1090 gpiobus_pin_write(gc, pin, value); 1091 /* return old value */ 1092 op->gp_value = sc->sc_pins[pin].pin_state; 1093 /* update current value */ 1094 sc->sc_pins[pin].pin_state = value; 1095 break; 1096 case GPIOPINTOGGLE: 1097 if ((flag & FWRITE) == 0) 1098 return EBADF; 1099 1100 op = data; 1101 1102 pin = op->gp_pin; 1103 1104 if (pin < 0 || pin >= sc->sc_npins) 1105 return EINVAL; 1106 1107 if (sc->sc_pins[pin].pin_mapped) 1108 return EBUSY; 1109 1110 if (!(sc->sc_pins[pin].pin_flags & GPIO_PIN_SET) && 1111 kauth_authorize_device(l->l_cred, 1112 KAUTH_DEVICE_GPIO_PINSET, NULL, NULL, NULL, NULL)) 1113 return EPERM; 1114 1115 value = (sc->sc_pins[pin].pin_state == GPIO_PIN_LOW ? 1116 GPIO_PIN_HIGH : GPIO_PIN_LOW); 1117 gpiobus_pin_write(gc, pin, value); 1118 /* return old value */ 1119 op->gp_value = sc->sc_pins[pin].pin_state; 1120 /* update current value */ 1121 sc->sc_pins[pin].pin_state = value; 1122 break; 1123 case GPIOPINCTL: 1124 ctl = data; 1125 1126 if (kauth_authorize_device(l->l_cred, 1127 KAUTH_DEVICE_GPIO_PINSET, NULL, NULL, NULL, NULL)) 1128 return EPERM; 1129 1130 pin = ctl->gp_pin; 1131 1132 if (pin < 0 || pin >= sc->sc_npins) 1133 return EINVAL; 1134 if (sc->sc_pins[pin].pin_mapped) 1135 return EBUSY; 1136 flags = ctl->gp_flags; 1137 1138 /* check that the controller supports all requested flags */ 1139 if ((flags & sc->sc_pins[pin].pin_caps) != flags) 1140 return ENODEV; 1141 1142 ctl->gp_caps = sc->sc_pins[pin].pin_caps; 1143 /* return old value */ 1144 ctl->gp_flags = sc->sc_pins[pin].pin_flags; 1145 if (flags > 0) { 1146 gpiobus_pin_ctl(gc, pin, flags); 1147 /* update current value */ 1148 sc->sc_pins[pin].pin_flags = flags; 1149 } 1150 break; 1151 case GPIODETACH50: 1152 /* FALLTHOUGH */ 1153 case GPIODETACH: 1154 if (kauth_authorize_device(l->l_cred, 1155 KAUTH_DEVICE_GPIO_PINSET, NULL, NULL, NULL, NULL)) 1156 return EPERM; 1157 1158 error = 0; 1159 mutex_enter(&sc->sc_mtx); 1160 while (sc->sc_attach_busy) { 1161 error = cv_wait_sig(&sc->sc_attach, &sc->sc_mtx); 1162 if (error) 1163 break; 1164 } 1165 if (!error) 1166 sc->sc_attach_busy = 1; 1167 mutex_exit(&sc->sc_mtx); 1168 if (error) 1169 return EBUSY; 1170 1171 KERNEL_LOCK(1, NULL); 1172 attach = data; 1173 LIST_FOREACH(gdev, &sc->sc_devs, sc_next) { 1174 if (strcmp(device_xname(gdev->sc_dev), 1175 attach->ga_dvname) == 0) { 1176 mutex_enter(&sc->sc_mtx); 1177 sc->sc_attach_busy = 0; 1178 cv_signal(&sc->sc_attach); 1179 mutex_exit(&sc->sc_mtx); 1180 1181 if (config_detach(gdev->sc_dev, 0) == 0) { 1182 KERNEL_UNLOCK_ONE(NULL); 1183 return 0; 1184 } 1185 break; 1186 } 1187 } 1188 KERNEL_UNLOCK_ONE(NULL); 1189 1190 if (gdev == NULL) { 1191 mutex_enter(&sc->sc_mtx); 1192 sc->sc_attach_busy = 0; 1193 cv_signal(&sc->sc_attach); 1194 mutex_exit(&sc->sc_mtx); 1195 } 1196 return EINVAL; 1197 1198 default: 1199 return ENOTTY; 1200 } 1201 return 0; 1202 } 1203 #endif /* COMPAT_50 */ 1204 1205 MODULE(MODULE_CLASS_DRIVER, gpio, NULL); 1206 1207 #ifdef _MODULE 1208 #include "ioconf.c" 1209 #endif 1210 1211 static int 1212 gpio_modcmd(modcmd_t cmd, void *opaque) 1213 { 1214 #ifdef _MODULE 1215 devmajor_t cmajor = NODEVMAJOR, bmajor = NODEVMAJOR; 1216 int error; 1217 #endif 1218 switch (cmd) { 1219 case MODULE_CMD_INIT: 1220 #ifdef _MODULE 1221 error = devsw_attach(gpio_cd.cd_name, NULL, &bmajor, 1222 &gpio_cdevsw, &cmajor); 1223 if (error) { 1224 aprint_error("%s: unable to register devsw\n", 1225 gpio_cd.cd_name); 1226 return error; 1227 } 1228 error = config_init_component(cfdriver_ioconf_gpio, 1229 cfattach_ioconf_gpio, cfdata_ioconf_gpio); 1230 if (error) { 1231 aprint_error("%s: unable to init component\n", 1232 gpio_cd.cd_name); 1233 devsw_detach(NULL, &gpio_cdevsw); 1234 return error; 1235 } 1236 #endif 1237 return 0; 1238 case MODULE_CMD_FINI: 1239 #ifdef _MODULE 1240 config_fini_component(cfdriver_ioconf_gpio, 1241 cfattach_ioconf_gpio, cfdata_ioconf_gpio); 1242 devsw_detach(NULL, &gpio_cdevsw); 1243 #endif 1244 return 0; 1245 default: 1246 return ENOTTY; 1247 } 1248 } 1249
Indexes created Tue Sep 23 23:09:58 GMT 2025