gpioiic.c revision 1.1.2.2
1 /* $NetBSD: gpioiic.c,v 1.1.2.2 2009/08/19 18:47:05 yamt Exp $ */ 2 /* $OpenBSD: gpioiic.c,v 1.8 2008/11/24 12:12:12 mbalmer Exp $ */ 3 4 /* 5 * Copyright (c) 2006 Alexander Yurchenko <grange (at) openbsd.org> 6 * 7 * Permission to use, copy, modify, and distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 #include <sys/cdefs.h> 21 __KERNEL_RCSID(0, "$NetBSD: gpioiic.c,v 1.1.2.2 2009/08/19 18:47:05 yamt Exp $"); 22 23 /* 24 * I2C bus bit-banging through GPIO pins. 25 */ 26 27 #include <sys/param.h> 28 #include <sys/systm.h> 29 #include <sys/device.h> 30 #include <sys/gpio.h> 31 #include <sys/rwlock.h> 32 33 #include <dev/gpio/gpiovar.h> 34 35 #include <dev/i2c/i2cvar.h> 36 #include <dev/i2c/i2c_bitbang.h> 37 38 #define GPIOIIC_PIN_SDA 0 39 #define GPIOIIC_PIN_SCL 1 40 #define GPIOIIC_NPINS 2 41 42 #define GPIOIIC_SDA 0x01 43 #define GPIOIIC_SCL 0x02 44 45 struct gpioiic_softc { 46 void * sc_gpio; 47 struct gpio_pinmap sc_map; 48 int _map[GPIOIIC_NPINS]; 49 50 struct i2c_controller sc_i2c_tag; 51 device_t sc_i2c_dev; 52 krwlock_t sc_i2c_lock; 53 54 int sc_sda; 55 int sc_scl; 56 }; 57 58 int gpioiic_match(device_t, cfdata_t, void *); 59 void gpioiic_attach(device_t, device_t, void *); 60 int gpioiic_detach(device_t, int); 61 int gpioiic_activate(device_t, enum devact); 62 63 int gpioiic_i2c_acquire_bus(void *, int); 64 void gpioiic_i2c_release_bus(void *, int); 65 int gpioiic_i2c_send_start(void *, int); 66 int gpioiic_i2c_send_stop(void *, int); 67 int gpioiic_i2c_initiate_xfer(void *, i2c_addr_t, int); 68 int gpioiic_i2c_read_byte(void *, u_int8_t *, int); 69 int gpioiic_i2c_write_byte(void *, u_int8_t, int); 70 71 void gpioiic_bb_set_bits(void *, u_int32_t); 72 void gpioiic_bb_set_dir(void *, u_int32_t); 73 u_int32_t gpioiic_bb_read_bits(void *); 74 75 CFATTACH_DECL_NEW(gpioiic, sizeof(struct gpioiic_softc), 76 gpioiic_match, gpioiic_attach, gpioiic_detach, gpioiic_activate); 77 78 extern struct cfdriver gpioiic_cd; 79 80 static const struct i2c_bitbang_ops gpioiic_bbops = { 81 gpioiic_bb_set_bits, 82 gpioiic_bb_set_dir, 83 gpioiic_bb_read_bits, 84 { GPIOIIC_SDA, GPIOIIC_SCL, GPIOIIC_SDA, 0 } 85 }; 86 87 int 88 gpioiic_match(device_t parent, cfdata_t cf, void *aux) 89 { 90 struct gpio_attach_args *ga = aux; 91 92 if (strcmp(ga->ga_dvname, cf->cf_name)) 93 return 0; 94 95 if (ga->ga_offset == -1) 96 return 0; 97 98 /* Check that we have enough pins */ 99 if (gpio_npins(ga->ga_mask) != GPIOIIC_NPINS) { 100 aprint_debug("%s: invalid pin mask 0x%02x\n", cf->cf_name, 101 ga->ga_mask); 102 return 0; 103 } 104 return 1; 105 } 106 107 void 108 gpioiic_attach(struct device *parent, struct device *self, void *aux) 109 { 110 struct gpioiic_softc *sc = device_private(self); 111 struct gpio_attach_args *ga = aux; 112 struct i2cbus_attach_args iba; 113 int caps; 114 115 /* Map pins */ 116 sc->sc_gpio = ga->ga_gpio; 117 sc->sc_map.pm_map = sc->_map; 118 if (gpio_pin_map(sc->sc_gpio, ga->ga_offset, ga->ga_mask, 119 &sc->sc_map)) { 120 aprint_error(": can't map pins\n"); 121 return; 122 } 123 124 /* Configure SDA pin */ 125 caps = gpio_pin_caps(sc->sc_gpio, &sc->sc_map, GPIOIIC_PIN_SDA); 126 if (!(caps & GPIO_PIN_OUTPUT)) { 127 aprint_error(": SDA pin is unable to drive output\n"); 128 goto fail; 129 } 130 if (!(caps & GPIO_PIN_INPUT)) { 131 aprint_error(": SDA pin is unable to read input\n"); 132 goto fail; 133 } 134 aprint_normal(": SDA[%d]", sc->sc_map.pm_map[GPIOIIC_PIN_SDA]); 135 sc->sc_sda = GPIO_PIN_OUTPUT; 136 if (caps & GPIO_PIN_OPENDRAIN) { 137 aprint_normal(" open-drain"); 138 sc->sc_sda |= GPIO_PIN_OPENDRAIN; 139 } else if ((caps & GPIO_PIN_PUSHPULL) && (caps & GPIO_PIN_TRISTATE)) { 140 aprint_normal(" push-pull tri-state"); 141 sc->sc_sda |= GPIO_PIN_PUSHPULL; 142 } 143 if (caps & GPIO_PIN_PULLUP) { 144 aprint_normal(" pull-up"); 145 sc->sc_sda |= GPIO_PIN_PULLUP; 146 } 147 gpio_pin_ctl(sc->sc_gpio, &sc->sc_map, GPIOIIC_PIN_SDA, sc->sc_sda); 148 149 /* Configure SCL pin */ 150 caps = gpio_pin_caps(sc->sc_gpio, &sc->sc_map, GPIOIIC_PIN_SCL); 151 if (!(caps & GPIO_PIN_OUTPUT)) { 152 aprint_error(": SCL pin is unable to drive output\n"); 153 goto fail; 154 } 155 aprint_normal(", SCL[%d]", sc->sc_map.pm_map[GPIOIIC_PIN_SCL]); 156 sc->sc_scl = GPIO_PIN_OUTPUT; 157 if (caps & GPIO_PIN_OPENDRAIN) { 158 aprint_normal(" open-drain"); 159 sc->sc_scl |= GPIO_PIN_OPENDRAIN; 160 if (caps & GPIO_PIN_PULLUP) { 161 aprint_normal(" pull-up"); 162 sc->sc_scl |= GPIO_PIN_PULLUP; 163 } 164 } else if (caps & GPIO_PIN_PUSHPULL) { 165 aprint_normal(" push-pull"); 166 sc->sc_scl |= GPIO_PIN_PUSHPULL; 167 } 168 gpio_pin_ctl(sc->sc_gpio, &sc->sc_map, GPIOIIC_PIN_SCL, sc->sc_scl); 169 170 aprint_normal("\n"); 171 172 /* Attach I2C bus */ 173 rw_init(&sc->sc_i2c_lock); 174 sc->sc_i2c_tag.ic_cookie = sc; 175 sc->sc_i2c_tag.ic_acquire_bus = gpioiic_i2c_acquire_bus; 176 sc->sc_i2c_tag.ic_release_bus = gpioiic_i2c_release_bus; 177 sc->sc_i2c_tag.ic_send_start = gpioiic_i2c_send_start; 178 sc->sc_i2c_tag.ic_send_stop = gpioiic_i2c_send_stop; 179 sc->sc_i2c_tag.ic_initiate_xfer = gpioiic_i2c_initiate_xfer; 180 sc->sc_i2c_tag.ic_read_byte = gpioiic_i2c_read_byte; 181 sc->sc_i2c_tag.ic_write_byte = gpioiic_i2c_write_byte; 182 sc->sc_i2c_tag.ic_exec = NULL; 183 184 memset(&iba, 0, sizeof(iba)); 185 iba.iba_type = I2C_TYPE_SMBUS; 186 iba.iba_tag = &sc->sc_i2c_tag; 187 sc->sc_i2c_dev = config_found(self, &iba, iicbus_print); 188 189 if (!pmf_device_register(self, NULL, NULL)) 190 aprint_error("%s: could not establish power handler\n", 191 device_xname(self)); 192 return; 193 194 fail: 195 gpio_pin_unmap(sc->sc_gpio, &sc->sc_map); 196 } 197 198 int 199 gpioiic_detach(struct device *self, int flags) 200 { 201 struct gpioiic_softc *sc = device_private(self); 202 int rv = 0; 203 204 if (sc->sc_i2c_dev != NULL) 205 rv = config_detach(sc->sc_i2c_dev, flags); 206 207 if (!rv) { 208 gpio_pin_unmap(sc->sc_gpio, &sc->sc_map); 209 pmf_device_deregister(self); 210 } 211 return rv; 212 } 213 214 int 215 gpioiic_activate(device_t self, enum devact act) 216 { 217 int rv = 0; 218 219 switch (act) { 220 case DVACT_ACTIVATE: 221 return EOPNOTSUPP; 222 case DVACT_DEACTIVATE: 223 break; 224 } 225 return rv; 226 } 227 228 int 229 gpioiic_i2c_acquire_bus(void *cookie, int flags) 230 { 231 struct gpioiic_softc *sc = cookie; 232 233 if (flags & I2C_F_POLL) 234 return 0; 235 236 rw_enter(&sc->sc_i2c_lock, RW_WRITER); 237 return 1; 238 } 239 240 void 241 gpioiic_i2c_release_bus(void *cookie, int flags) 242 { 243 struct gpioiic_softc *sc = cookie; 244 245 if (flags & I2C_F_POLL) 246 return; 247 248 rw_exit(&sc->sc_i2c_lock); 249 } 250 251 int 252 gpioiic_i2c_send_start(void *cookie, int flags) 253 { 254 return i2c_bitbang_send_start(cookie, flags, &gpioiic_bbops); 255 } 256 257 int 258 gpioiic_i2c_send_stop(void *cookie, int flags) 259 { 260 return i2c_bitbang_send_stop(cookie, flags, &gpioiic_bbops); 261 } 262 263 int 264 gpioiic_i2c_initiate_xfer(void *cookie, i2c_addr_t addr, int flags) 265 { 266 return i2c_bitbang_initiate_xfer(cookie, addr, flags, &gpioiic_bbops); 267 } 268 269 int 270 gpioiic_i2c_read_byte(void *cookie, u_int8_t *bytep, int flags) 271 { 272 return i2c_bitbang_read_byte(cookie, bytep, flags, &gpioiic_bbops); 273 } 274 275 int 276 gpioiic_i2c_write_byte(void *cookie, u_int8_t byte, int flags) 277 { 278 return i2c_bitbang_write_byte(cookie, byte, flags, &gpioiic_bbops); 279 } 280 281 void 282 gpioiic_bb_set_bits(void *cookie, u_int32_t bits) 283 { 284 struct gpioiic_softc *sc = cookie; 285 286 gpio_pin_write(sc->sc_gpio, &sc->sc_map, GPIOIIC_PIN_SDA, 287 bits & GPIOIIC_SDA ? GPIO_PIN_HIGH : GPIO_PIN_LOW); 288 gpio_pin_write(sc->sc_gpio, &sc->sc_map, GPIOIIC_PIN_SCL, 289 bits & GPIOIIC_SCL ? GPIO_PIN_HIGH : GPIO_PIN_LOW); 290 } 291 292 void 293 gpioiic_bb_set_dir(void *cookie, u_int32_t bits) 294 { 295 struct gpioiic_softc *sc = cookie; 296 int sda = sc->sc_sda; 297 298 sda &= ~(GPIO_PIN_INPUT | GPIO_PIN_OUTPUT | GPIO_PIN_TRISTATE); 299 sda |= (bits & GPIOIIC_SDA ? GPIO_PIN_OUTPUT : GPIO_PIN_INPUT); 300 if ((sda & GPIO_PIN_PUSHPULL) && !(bits & GPIOIIC_SDA)) 301 sda |= GPIO_PIN_TRISTATE; 302 if (sc->sc_sda != sda) { 303 sc->sc_sda = sda; 304 gpio_pin_ctl(sc->sc_gpio, &sc->sc_map, GPIOIIC_PIN_SDA, 305 sc->sc_sda); 306 } 307 } 308 309 u_int32_t 310 gpioiic_bb_read_bits(void *cookie) 311 { 312 struct gpioiic_softc *sc = cookie; 313 314 return gpio_pin_read(sc->sc_gpio, &sc->sc_map, 315 GPIOIIC_PIN_SDA) == GPIO_PIN_HIGH ? GPIOIIC_SDA : 0; 316 } 317
Indexes created Wed Sep 24 05:09:52 GMT 2025